On Fri, 2010-01-29 at 12:23 +1100, Benjamin Herrenschmidt wrote:
On machine that don't have SMT, I would like to avoid calling
arch_scale_smt_power() at all if possible (in addition to not compiling
it in if SMT is not enabled in .config).
Now, I must say I'm utterly confused by how the
On Thu, Jan 28, 2010 at 05:20:55PM -0600, Joel Schopp wrote:
On Power7 processors running in SMT4 mode with 2, 3, or 4 idle threads
there is performance benefit to idling the higher numbered threads in
the core.
Really 2, 3, or 4? When you have 4 idle threads out of 4, performance
becomes
Gabriel Paubert wrote:
On Thu, Jan 28, 2010 at 05:20:55PM -0600, Joel Schopp wrote:
On Power7 processors running in SMT4 mode with 2, 3, or 4 idle threads
there is performance benefit to idling the higher numbered threads in
the core.
Really 2, 3, or 4? When you have 4 idle threads
That said, I'm still not entirely convinced I like this usage of
cpupower, its supposed to be a normalization scale for load-balancing,
not a placement hook.
Even if you do a placement hook you'll need to address it in the load
balancing as well. Consider a single 4 thread SMT core with 4
Benjamin Herrenschmidt wrote:
On Thu, 2010-01-28 at 17:24 -0600, Joel Schopp wrote:
On Power7 processors running in SMT4 mode with 2, 3, or 4 idle threads
there is performance benefit to idling the higher numbered threads in
the core.
This patch implements arch_scale_smt_power to
On Power7 processors running in SMT4 mode with 2, 3, or 4 idle threads
there is performance benefit to idling the higher numbered threads in
the core.
This patch implements arch_scale_smt_power to dynamically update smt
thread power in these idle cases in order to prefer threads 0,1 over
On Power7 processors running in SMT4 mode with 2, 3, or 4 idle threads
there is performance benefit to idling the higher numbered threads in
the core.
This patch implements arch_scale_smt_power to dynamically update smt
thread power in these idle cases in order to prefer threads 0,1 over
On Thu, 2010-01-28 at 17:24 -0600, Joel Schopp wrote:
On Power7 processors running in SMT4 mode with 2, 3, or 4 idle threads
there is performance benefit to idling the higher numbered threads in
the core.
This patch implements arch_scale_smt_power to dynamically update smt
thread power
