On Thu, May 20, 2010 at 11:10:03PM +1000, Paul Mackerras wrote:
On Thu, May 20, 2010 at 09:36:03AM +0530, K.Prasad wrote:
(Had this mail composed along with the patchset...but mail server issues
caused delay in sending this...)
Hi Paul,
While we continue to discuss some of the design
On Thu, May 20, 2010 at 09:36:03AM +0530, K.Prasad wrote:
Right. However, the thread is running the signal handler without the
DABR being set, which is unfortunate.
In order to keep the breakpoint active during signal handling, a
PowerPC specific signal handling code, say
On Mon, May 17, 2010 at 10:32:41PM +1000, Paul Mackerras wrote:
On Fri, May 14, 2010 at 12:25:31PM +0530, K.Prasad wrote:
Okay. I will re-use single_step_exception() after modifications; it
appearsto have no in-kernel users for it.
It's called from exceptions-64s.S, head_32.S and
On Fri, May 14, 2010 at 12:25:31PM +0530, K.Prasad wrote:
Okay. I will re-use single_step_exception() after modifications; it
appearsto have no in-kernel users for it.
It's called from exceptions-64s.S, head_32.S and head_8xx.S in
arch/powerpc/kernel.
Suppose the address at which the data
On Wed, May 12, 2010 at 04:32:47PM +1000, Paul Mackerras wrote:
On Wed, May 05, 2010 at 02:03:03AM +0530, K.Prasad wrote:
It is true that the breakpoint exceptions will go amiss following the
alignment exception, and be restored when the thread single-steps due
to other requests causing
On Wed, May 05, 2010 at 02:03:03AM +0530, K.Prasad wrote:
It is true that the breakpoint exceptions will go amiss following the
alignment exception, and be restored when the thread single-steps due
to other requests causing undesirable effects. (Borrowing from some of
the discussions I had
On Wed, May 05, 2010 at 02:03:03AM +0530, K.Prasad wrote:
On Mon, May 03, 2010 at 04:23:30PM +1000, Paul Mackerras wrote:
On Wed, Apr 14, 2010 at 09:18:27AM +0530, K.Prasad wrote:
[snipped]
It has been pointed out to me before (Roland's mail Ref:linuxppc-dev
message-id:
On Mon, May 03, 2010 at 04:23:30PM +1000, Paul Mackerras wrote:
On Wed, Apr 14, 2010 at 09:18:27AM +0530, K.Prasad wrote:
Implement perf-events based hw-breakpoint interfaces for PPC64 processors.
These interfaces help arbitrate requests from various users and schedules
them as
On Wed, Apr 14, 2010 at 09:18:27AM +0530, K.Prasad wrote:
Implement perf-events based hw-breakpoint interfaces for PPC64 processors.
These interfaces help arbitrate requests from various users and schedules
them as appropriate.
[snip]
--- /dev/null
+++
Implement perf-events based hw-breakpoint interfaces for PPC64 processors.
These interfaces help arbitrate requests from various users and schedules
them as appropriate.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/Kconfig |1
Implement perf-events based hw-breakpoint interfaces for PPC64 processors.
These interfaces help arbitrate requests from various users and schedules
them as appropriate.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/Kconfig |1
On Mon, Mar 29, 2010 at 02:53:36PM -0500, Dave Kleikamp wrote:
On Mon, 2010-03-29 at 17:01 +0530, K.Prasad wrote:
On Fri, Mar 26, 2010 at 04:11:45PM -0500, Dave Kleikamp wrote:
On Tue, 2010-03-23 at 19:37 +0530, K.Prasad wrote:
plain text document attachment (ppc64_hbkpt_02)
On Fri, Mar 26, 2010 at 04:11:45PM -0500, Dave Kleikamp wrote:
On Tue, 2010-03-23 at 19:37 +0530, K.Prasad wrote:
plain text document attachment (ppc64_hbkpt_02)
Implement perf-events based hw-breakpoint interfaces for PPC64 processors.
These interfaces help arbitrate requests from various
On Mon, 2010-03-29 at 17:01 +0530, K.Prasad wrote:
On Fri, Mar 26, 2010 at 04:11:45PM -0500, Dave Kleikamp wrote:
On Tue, 2010-03-23 at 19:37 +0530, K.Prasad wrote:
plain text document attachment (ppc64_hbkpt_02)
Implement perf-events based hw-breakpoint interfaces for PPC64 processors.
On Tue, 2010-03-23 at 19:37 +0530, K.Prasad wrote:
plain text document attachment (ppc64_hbkpt_02)
Implement perf-events based hw-breakpoint interfaces for PPC64 processors.
These interfaces help arbitrate requests from various users and schedules
them as appropriate.
Signed-off-by:
Implement perf-events based hw-breakpoint interfaces for PPC64 processors.
These interfaces help arbitrate requests from various users and schedules
them as appropriate.
Signed-off-by: K.Prasad pra...@linux.vnet.ibm.com
---
arch/powerpc/Kconfig |1
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