Re: [RFC PATCH v2 4/7] powerpc/ppc-opcode: consolidate powerpc instructions from bpf_jit.h

2020-04-28 Thread Naveen N. Rao

Balamuruhan S wrote:

move macro definitions of powerpc instructions from bpf_jit.h to ppc-opcode.h
and adopt the users of the macros accordingly. `PPC_MR()` is defined twice in
bpf_jit.h, remove the duplicate one.

Signed-off-by: Balamuruhan S 
---
 arch/powerpc/include/asm/ppc-opcode.h | 139 +
 arch/powerpc/net/bpf_jit.h| 166 ++-
 arch/powerpc/net/bpf_jit32.h  |  24 +--
 arch/powerpc/net/bpf_jit64.h  |  12 +-
 arch/powerpc/net/bpf_jit_comp.c   | 132 ++--
 arch/powerpc/net/bpf_jit_comp64.c | 278 +-
 6 files changed, 378 insertions(+), 373 deletions(-)

diff --git a/arch/powerpc/include/asm/ppc-opcode.h 
b/arch/powerpc/include/asm/ppc-opcode.h
index 2ae0afc5c2bb..6b9a891884be 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -79,6 +79,16 @@
 #define IMM_L(i)   ((uintptr_t)(i) & 0x)
 #define IMM_DS(i)  ((uintptr_t)(i) & 0xfffc)

+/*
+ * 16-bit immediate helper macros: HA() is for use with sign-extending instrs
+ * (e.g. LD, ADDI).  If the bottom 16 bits is "-ve", add another bit into the
+ * top half to negate the effect (i.e. 0x + 1 = 0x(1)).
+ */
+#define IMM_H(i)((uintptr_t)(i)>>16)
+#define IMM_HA(i)   (((uintptr_t)(i)>>16) +   \
+   (((uintptr_t)(i) & 0x8000) >> 15))
+


Not needed for this patch series, but at some point, we should move over 
to using the PPC_LO(), PPC_HI() and PPC_HA() macros that are defined 
later in this file.



- Naveen



[RFC PATCH v2 4/7] powerpc/ppc-opcode: consolidate powerpc instructions from bpf_jit.h

2020-04-24 Thread Balamuruhan S
move macro definitions of powerpc instructions from bpf_jit.h to ppc-opcode.h
and adopt the users of the macros accordingly. `PPC_MR()` is defined twice in
bpf_jit.h, remove the duplicate one.

Signed-off-by: Balamuruhan S 
---
 arch/powerpc/include/asm/ppc-opcode.h | 139 +
 arch/powerpc/net/bpf_jit.h| 166 ++-
 arch/powerpc/net/bpf_jit32.h  |  24 +--
 arch/powerpc/net/bpf_jit64.h  |  12 +-
 arch/powerpc/net/bpf_jit_comp.c   | 132 ++--
 arch/powerpc/net/bpf_jit_comp64.c | 278 +-
 6 files changed, 378 insertions(+), 373 deletions(-)

diff --git a/arch/powerpc/include/asm/ppc-opcode.h 
b/arch/powerpc/include/asm/ppc-opcode.h
index 2ae0afc5c2bb..6b9a891884be 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -79,6 +79,16 @@
 #define IMM_L(i)   ((uintptr_t)(i) & 0x)
 #define IMM_DS(i)  ((uintptr_t)(i) & 0xfffc)
 
+/*
+ * 16-bit immediate helper macros: HA() is for use with sign-extending instrs
+ * (e.g. LD, ADDI).  If the bottom 16 bits is "-ve", add another bit into the
+ * top half to negate the effect (i.e. 0x + 1 = 0x(1)).
+ */
+#define IMM_H(i)((uintptr_t)(i)>>16)
+#define IMM_HA(i)   (((uintptr_t)(i)>>16) +   \
+   (((uintptr_t)(i) & 0x8000) >> 15))
+
+
 /* opcode and xopcode for instructions */
 #define OP_TRAP 3
 #define OP_TRAP_64 2
@@ -637,6 +647,135 @@
 #define PPC_RAW_ADDC_DOT(t, a, b)  (PPC_INST_ADDC | ___PPC_RT(t) | \
___PPC_RA(a) | ___PPC_RB(b) | \
0x1)
+#define PPC_RAW_NOP()  (PPC_INST_NOP)
+#define PPC_RAW_BLR()  (PPC_INST_BLR)
+#define PPC_RAW_BLRL() (PPC_INST_BLRL)
+#define PPC_RAW_MTLR(r)(PPC_INST_MTLR | ___PPC_RT(r))
+#define PPC_RAW_BCTR() (PPC_INST_BCTR)
+#define PPC_RAW_MTCTR(r)   (PPC_INST_MTCTR | ___PPC_RT(r))
+#define PPC_RAW_ADDI(d, a, i)  (PPC_INST_ADDI | ___PPC_RT(d) | \
+   ___PPC_RA(a) | IMM_L(i))
+#define PPC_RAW_LI(r, i)   PPC_RAW_ADDI(r, 0, i)
+#define PPC_RAW_ADDIS(d, a, i) (PPC_INST_ADDIS | \
+   ___PPC_RT(d) | ___PPC_RA(a) | \
+   IMM_L(i))
+#define PPC_RAW_LIS(r, i)  PPC_RAW_ADDIS(r, 0, i)
+#define PPC_RAW_STDX(r, base, b)   (PPC_INST_STDX | ___PPC_RS(r) | \
+   ___PPC_RA(base) | ___PPC_RB(b))
+#define PPC_RAW_STDU(r, base, i)   (PPC_INST_STDU | ___PPC_RS(r) | \
+   ___PPC_RA(base) | \
+   ((i) & 0xfffc))
+#define PPC_RAW_STW(r, base, i)(PPC_INST_STW | ___PPC_RS(r) | \
+   ___PPC_RA(base) | IMM_L(i))
+#define PPC_RAW_STWU(r, base, i)   (PPC_INST_STWU | ___PPC_RS(r) | \
+   ___PPC_RA(base) | IMM_L(i))
+#define PPC_RAW_STH(r, base, i)(PPC_INST_STH | ___PPC_RS(r) | \
+   ___PPC_RA(base) | IMM_L(i))
+#define PPC_RAW_STB(r, base, i)(PPC_INST_STB | ___PPC_RS(r) | \
+   ___PPC_RA(base) | IMM_L(i))
+#define PPC_RAW_LBZ(r, base, i)(PPC_INST_LBZ | ___PPC_RT(r) | \
+   ___PPC_RA(base) | IMM_L(i))
+#define PPC_RAW_LDX(r, base, b)(PPC_INST_LDX | ___PPC_RT(r) | \
+   ___PPC_RA(base) | ___PPC_RB(b))
+#define PPC_RAW_LHZ(r, base, i)(PPC_INST_LHZ | ___PPC_RT(r) | \
+   ___PPC_RA(base) | IMM_L(i))
+#define PPC_RAW_LHBRX(r, base, b)  (PPC_INST_LHBRX | ___PPC_RT(r) | \
+   ___PPC_RA(base) | ___PPC_RB(b))
+#define PPC_RAW_LDBRX(r, base, b)  (PPC_INST_LDBRX | ___PPC_RT(r) | \
+   ___PPC_RA(base) | ___PPC_RB(b))
+#define PPC_RAW_STWCX(s, a, b) (PPC_INST_STWCX | ___PPC_RS(s) | \
+   ___PPC_RA(a) | ___PPC_RB(b))
+#define PPC_RAW_CMPWI(a, i)(PPC_INST_CMPWI | ___PPC_RA(a) | 
IMM_L(i))
+#define PPC_RAW_CMPDI(a, i)(PPC_INST_CMPDI | ___PPC_RA(a) | 
IMM_L(i))
+#define PPC_RAW_CMPW(a, b) (PPC_INST_CMPW | ___PPC_RA(a) | \
+   ___PPC_RB(b))
+#define PPC_RAW_CMPD(a, b) (PPC_INST_CMPD | ___PPC_RA(a) | \
+   ___PPC_RB(b))
+#define PPC_RAW_CMPLWI(a, i)   (PPC_INST_CM