Hi All,
Please find a patch that implements hardware-breakpoint interfaces for
BookE processors. The patches are under continuous development and are sent
to receive early comments. For the moment, they are (only) compile tested (with
ppc64e_defconfig), further testing will accompany the ongoing development.
A few notes about the patchset, as below:
- The patch is designed with reference to BookIII-E type processors
specification (having two DAC/DVC registers).
- Instruction breakpoint requests are not implemented through the generic
breakpoint interfaces. Such requests are still possible for user-space
through
ptrace.
- Breakpoint exceptions are designed to 'trigger-after-execute', although the
processors raise the exception before instruction execution. To achieve this,
the causative insruction is single-stepped over and the breakpoint handler is
invoked in the ICMP exception handler.
- The patches are dependant on the recent submissions (not yet integrated into
mainline) that bring support for hw-breakpoint weight (patchset from Frederic
Weisbecker LKML ref:1271999639-23605-1-git-send-regression-fweis...@gmail.com)
and PPC64 hw-breakpoint support (linuxppc-dev
ref:20100414034340.ga6...@in.ibm.com).
Here are a few items identified to work upon in the successive versions.
TO DO
------
- Modify ptrace requests to use the generic hw-breakpoint interfaces
(PTRACE_<GET><SET>_DEBUGREG, PTRACE_SETHWDEBUG)
- Explore intergration of BookE and BookS code intergration
(hw_breakpoint.c and hw_breakpoint_booke.c)
- Code clean-up and reduction.
Kindly let me know about comments/suggestions, if any.
Thank You,
K.Prasad
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