Re: [v3 12/15] powerpc/perf: Add support for outputting extended regs in perf intr_regs
> On 24-Jul-2020, at 5:56 PM, Ravi Bangoria wrote:
>
> Hi Athira,
>
>> +/* Function to return the extended register values */
>> +static u64 get_ext_regs_value(int idx)
>> +{
>> +switch (idx) {
>> +case PERF_REG_POWERPC_MMCR0:
>> +return mfspr(SPRN_MMCR0);
>> +case PERF_REG_POWERPC_MMCR1:
>> +return mfspr(SPRN_MMCR1);
>> +case PERF_REG_POWERPC_MMCR2:
>> +return mfspr(SPRN_MMCR2);
>> +default: return 0;
>> +}
>> +}
>> +
>> u64 perf_reg_value(struct pt_regs *regs, int idx)
>> {
>> -if (WARN_ON_ONCE(idx >= PERF_REG_POWERPC_MAX))
>> -return 0;
>> +u64 PERF_REG_EXTENDED_MAX;
>
> PERF_REG_EXTENDED_MAX should be initialized. otherwise ...
>
>> +
>> +if (cpu_has_feature(CPU_FTR_ARCH_300))
>> +PERF_REG_EXTENDED_MAX = PERF_REG_MAX_ISA_300;
>> if (idx == PERF_REG_POWERPC_SIER &&
>> (IS_ENABLED(CONFIG_FSL_EMB_PERF_EVENT) ||
>> @@ -85,6 +103,16 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
>> IS_ENABLED(CONFIG_PPC32)))
>> return 0;
>> + if (idx >= PERF_REG_POWERPC_MAX && idx < PERF_REG_EXTENDED_MAX)
>> +return get_ext_regs_value(idx);
>
> On non p9/p10 machine, PERF_REG_EXTENDED_MAX may contain random value which
> will
> allow user to pass this if condition unintentionally.
>
> Neat: PERF_REG_EXTENDED_MAX is a local variable so it should be in lowercase.
> Any specific reason to define it in capital?
Hi Ravi
There is no specific reason. I will include both these changes in next version
Thanks
Athira Rajeev
>
> Ravi
Re: [v3 12/15] powerpc/perf: Add support for outputting extended regs in perf intr_regs
Hi Athira,
+/* Function to return the extended register values */
+static u64 get_ext_regs_value(int idx)
+{
+ switch (idx) {
+ case PERF_REG_POWERPC_MMCR0:
+ return mfspr(SPRN_MMCR0);
+ case PERF_REG_POWERPC_MMCR1:
+ return mfspr(SPRN_MMCR1);
+ case PERF_REG_POWERPC_MMCR2:
+ return mfspr(SPRN_MMCR2);
+ default: return 0;
+ }
+}
+
u64 perf_reg_value(struct pt_regs *regs, int idx)
{
- if (WARN_ON_ONCE(idx >= PERF_REG_POWERPC_MAX))
- return 0;
+ u64 PERF_REG_EXTENDED_MAX;
PERF_REG_EXTENDED_MAX should be initialized. otherwise ...
+
+ if (cpu_has_feature(CPU_FTR_ARCH_300))
+ PERF_REG_EXTENDED_MAX = PERF_REG_MAX_ISA_300;
if (idx == PERF_REG_POWERPC_SIER &&
(IS_ENABLED(CONFIG_FSL_EMB_PERF_EVENT) ||
@@ -85,6 +103,16 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
IS_ENABLED(CONFIG_PPC32)))
return 0;
+ if (idx >= PERF_REG_POWERPC_MAX && idx < PERF_REG_EXTENDED_MAX)
+ return get_ext_regs_value(idx);
On non p9/p10 machine, PERF_REG_EXTENDED_MAX may contain random value which will
allow user to pass this if condition unintentionally.
Neat: PERF_REG_EXTENDED_MAX is a local variable so it should be in lowercase.
Any specific reason to define it in capital?
Ravi
Re: [v3 12/15] powerpc/perf: Add support for outputting extended regs in perf intr_regs
> On 23-Jul-2020, at 8:26 PM, Arnaldo Carvalho de Melo wrote: > > Em Thu, Jul 23, 2020 at 11:14:16AM +0530, kajoljain escreveu: >> >> >> On 7/21/20 11:32 AM, kajoljain wrote: >>> >>> >>> On 7/17/20 8:08 PM, Athira Rajeev wrote: From: Anju T Sudhakar Add support for perf extended register capability in powerpc. The capability flag PERF_PMU_CAP_EXTENDED_REGS, is used to indicate the PMU which support extended registers. The generic code define the mask of extended registers as 0 for non supported architectures. Patch adds extended regs support for power9 platform by exposing MMCR0, MMCR1 and MMCR2 registers. REG_RESERVED mask needs update to include extended regs. `PERF_REG_EXTENDED_MASK`, contains mask value of the supported registers, is defined at runtime in the kernel based on platform since the supported registers may differ from one processor version to another and hence the MASK value. with patch -- available registers: r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 r26 r27 r28 r29 r30 r31 nip msr orig_r3 ctr link xer ccr softe trap dar dsisr sier mmcra mmcr0 mmcr1 mmcr2 PERF_RECORD_SAMPLE(IP, 0x1): 4784/4784: 0 period: 1 addr: 0 ... intr regs: mask 0x ABI 64-bit r00xc012b77c r10xc03fe5e03930 r20xc1b0e000 r30xc03fdcddf800 r40xc03fc788 r50x9c422724be r60xc03fe5e03908 r70xff63bddc8706 r80x9e4 r90x0 r10 0x1 r11 0x0 r12 0xc01299c0 r13 0xc03c4800 r14 0x0 r15 0x7fffdd8b8b00 r16 0x0 r17 0x7fffdd8be6b8 r18 0x7e7076607730 r19 0x2f r20 0xc0001fc26c68 r21 0xc0002041e4227e00 r22 0xc0002018fb60 r23 0x1 r24 0xc03ffec4d900 r25 0x8000 r26 0x0 r27 0x1 r28 0x1 r29 0xc1be1260 r30 0x6008010 r31 0xc03ffebb7218 nip 0xc012b910 msr 0x90009033 orig_r3 0xc012b86c ctr 0xc01299c0 link 0xc012b77c xer 0x0 ccr 0x2800 softe 0x1 trap 0xf00 dar 0x0 dsisr 0x800 sier 0x0 mmcra 0x800 mmcr0 0x82008090 mmcr1 0x1e00 mmcr2 0x0 ... thread: perf:4784 Signed-off-by: Anju T Sudhakar [Defined PERF_REG_EXTENDED_MASK at run time to add support for different platforms ] Signed-off-by: Athira Rajeev Reviewed-by: Madhavan Srinivasan --- >>> >>> Patch looks good to me. >>> >>> Reviewed-by: Kajol Jain >> >> Hi Arnaldo and Jiri, >> Please let me know if you have any comments on these patches. Can you >> pull/ack these >> patches if they seems fine to you. > > Can you please clarify something here, I think I saw a kernel build bot > complaint followed by a fix, in these cases I think, for reviewer's > sake, that this would entail a v4 patchkit? One that has no such build > issues? > > Or have I got something wrong? Hi Arnaldo, yes you are right, I will send version 4 as a new series with changes to add support for extended regs and including fix for the build issue. Thanks for your response. Athira > > - Arnaldo
Re: [v3 12/15] powerpc/perf: Add support for outputting extended regs in perf intr_regs
Em Thu, Jul 23, 2020 at 11:14:16AM +0530, kajoljain escreveu: > > > On 7/21/20 11:32 AM, kajoljain wrote: > > > > > > On 7/17/20 8:08 PM, Athira Rajeev wrote: > >> From: Anju T Sudhakar > >> > >> Add support for perf extended register capability in powerpc. > >> The capability flag PERF_PMU_CAP_EXTENDED_REGS, is used to indicate the > >> PMU which support extended registers. The generic code define the mask > >> of extended registers as 0 for non supported architectures. > >> > >> Patch adds extended regs support for power9 platform by > >> exposing MMCR0, MMCR1 and MMCR2 registers. > >> > >> REG_RESERVED mask needs update to include extended regs. > >> `PERF_REG_EXTENDED_MASK`, contains mask value of the supported registers, > >> is defined at runtime in the kernel based on platform since the supported > >> registers may differ from one processor version to another and hence the > >> MASK value. > >> > >> with patch > >> -- > >> > >> available registers: r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 > >> r12 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 r26 > >> r27 r28 r29 r30 r31 nip msr orig_r3 ctr link xer ccr softe > >> trap dar dsisr sier mmcra mmcr0 mmcr1 mmcr2 > >> > >> PERF_RECORD_SAMPLE(IP, 0x1): 4784/4784: 0 period: 1 addr: 0 > >> ... intr regs: mask 0x ABI 64-bit > >> r00xc012b77c > >> r10xc03fe5e03930 > >> r20xc1b0e000 > >> r30xc03fdcddf800 > >> r40xc03fc788 > >> r50x9c422724be > >> r60xc03fe5e03908 > >> r70xff63bddc8706 > >> r80x9e4 > >> r90x0 > >> r10 0x1 > >> r11 0x0 > >> r12 0xc01299c0 > >> r13 0xc03c4800 > >> r14 0x0 > >> r15 0x7fffdd8b8b00 > >> r16 0x0 > >> r17 0x7fffdd8be6b8 > >> r18 0x7e7076607730 > >> r19 0x2f > >> r20 0xc0001fc26c68 > >> r21 0xc0002041e4227e00 > >> r22 0xc0002018fb60 > >> r23 0x1 > >> r24 0xc03ffec4d900 > >> r25 0x8000 > >> r26 0x0 > >> r27 0x1 > >> r28 0x1 > >> r29 0xc1be1260 > >> r30 0x6008010 > >> r31 0xc03ffebb7218 > >> nip 0xc012b910 > >> msr 0x90009033 > >> orig_r3 0xc012b86c > >> ctr 0xc01299c0 > >> link 0xc012b77c > >> xer 0x0 > >> ccr 0x2800 > >> softe 0x1 > >> trap 0xf00 > >> dar 0x0 > >> dsisr 0x800 > >> sier 0x0 > >> mmcra 0x800 > >> mmcr0 0x82008090 > >> mmcr1 0x1e00 > >> mmcr2 0x0 > >> ... thread: perf:4784 > >> > >> Signed-off-by: Anju T Sudhakar > >> [Defined PERF_REG_EXTENDED_MASK at run time to add support for different > >> platforms ] > >> Signed-off-by: Athira Rajeev > >> Reviewed-by: Madhavan Srinivasan > >> --- > > > > Patch looks good to me. > > > > Reviewed-by: Kajol Jain > > Hi Arnaldo and Jiri, >Please let me know if you have any comments on these patches. Can you > pull/ack these > patches if they seems fine to you. Can you please clarify something here, I think I saw a kernel build bot complaint followed by a fix, in these cases I think, for reviewer's sake, that this would entail a v4 patchkit? One that has no such build issues? Or have I got something wrong? - Arnaldo
Re: [v3 12/15] powerpc/perf: Add support for outputting extended regs in perf intr_regs
On 7/21/20 11:32 AM, kajoljain wrote:
>
>
> On 7/17/20 8:08 PM, Athira Rajeev wrote:
>> From: Anju T Sudhakar
>>
>> Add support for perf extended register capability in powerpc.
>> The capability flag PERF_PMU_CAP_EXTENDED_REGS, is used to indicate the
>> PMU which support extended registers. The generic code define the mask
>> of extended registers as 0 for non supported architectures.
>>
>> Patch adds extended regs support for power9 platform by
>> exposing MMCR0, MMCR1 and MMCR2 registers.
>>
>> REG_RESERVED mask needs update to include extended regs.
>> `PERF_REG_EXTENDED_MASK`, contains mask value of the supported registers,
>> is defined at runtime in the kernel based on platform since the supported
>> registers may differ from one processor version to another and hence the
>> MASK value.
>>
>> with patch
>> --
>>
>> available registers: r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11
>> r12 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 r26
>> r27 r28 r29 r30 r31 nip msr orig_r3 ctr link xer ccr softe
>> trap dar dsisr sier mmcra mmcr0 mmcr1 mmcr2
>>
>> PERF_RECORD_SAMPLE(IP, 0x1): 4784/4784: 0 period: 1 addr: 0
>> ... intr regs: mask 0x ABI 64-bit
>> r00xc012b77c
>> r10xc03fe5e03930
>> r20xc1b0e000
>> r30xc03fdcddf800
>> r40xc03fc788
>> r50x9c422724be
>> r60xc03fe5e03908
>> r70xff63bddc8706
>> r80x9e4
>> r90x0
>> r10 0x1
>> r11 0x0
>> r12 0xc01299c0
>> r13 0xc03c4800
>> r14 0x0
>> r15 0x7fffdd8b8b00
>> r16 0x0
>> r17 0x7fffdd8be6b8
>> r18 0x7e7076607730
>> r19 0x2f
>> r20 0xc0001fc26c68
>> r21 0xc0002041e4227e00
>> r22 0xc0002018fb60
>> r23 0x1
>> r24 0xc03ffec4d900
>> r25 0x8000
>> r26 0x0
>> r27 0x1
>> r28 0x1
>> r29 0xc1be1260
>> r30 0x6008010
>> r31 0xc03ffebb7218
>> nip 0xc012b910
>> msr 0x90009033
>> orig_r3 0xc012b86c
>> ctr 0xc01299c0
>> link 0xc012b77c
>> xer 0x0
>> ccr 0x2800
>> softe 0x1
>> trap 0xf00
>> dar 0x0
>> dsisr 0x800
>> sier 0x0
>> mmcra 0x800
>> mmcr0 0x82008090
>> mmcr1 0x1e00
>> mmcr2 0x0
>> ... thread: perf:4784
>>
>> Signed-off-by: Anju T Sudhakar
>> [Defined PERF_REG_EXTENDED_MASK at run time to add support for different
>> platforms ]
>> Signed-off-by: Athira Rajeev
>> Reviewed-by: Madhavan Srinivasan
>> ---
>
> Patch looks good to me.
>
> Reviewed-by: Kajol Jain
Hi Arnaldo and Jiri,
Please let me know if you have any comments on these patches. Can you
pull/ack these
patches if they seems fine to you.
Thanks,
Kajol Jain
>
> Thanks,
> Kajol Jain
>
>> arch/powerpc/include/asm/perf_event_server.h | 8 +++
>> arch/powerpc/include/uapi/asm/perf_regs.h| 14 +++-
>> arch/powerpc/perf/core-book3s.c | 1 +
>> arch/powerpc/perf/perf_regs.c| 34
>> +---
>> arch/powerpc/perf/power9-pmu.c | 6 +
>> 5 files changed, 59 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/powerpc/include/asm/perf_event_server.h
>> b/arch/powerpc/include/asm/perf_event_server.h
>> index 832450a..bf85d1a 100644
>> --- a/arch/powerpc/include/asm/perf_event_server.h
>> +++ b/arch/powerpc/include/asm/perf_event_server.h
>> @@ -15,6 +15,9 @@
>> #define MAX_EVENT_ALTERNATIVES 8
>> #define MAX_LIMITED_HWCOUNTERS 2
>>
>> +extern u64 PERF_REG_EXTENDED_MASK;
>> +#define PERF_REG_EXTENDED_MASK PERF_REG_EXTENDED_MASK
>> +
>> struct perf_event;
>>
>> struct mmcr_regs {
>> @@ -62,6 +65,11 @@ struct power_pmu {
>> int *blacklist_ev;
>> /* BHRB entries in the PMU */
>> int bhrb_nr;
>> +/*
>> + * set this flag with `PERF_PMU_CAP_EXTENDED_REGS` if
>> + * the pmu supports extended perf regs capability
>> + */
>> +int capabilities;
>> };
>>
>> /*
>> diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h
>> b/arch/powerpc/include/uapi/asm/perf_regs.h
>> index f599064..225c64c 100644
>> --- a/arch/powerpc/include/uapi/asm/perf_regs.h
>> +++ b/arch/powerpc/include/uapi/asm/perf_regs.h
>> @@ -48,6 +48,18 @@ enum perf_event_powerpc_regs {
>> PERF_REG_POWERPC_DSISR,
>> PERF_REG_POWERPC_SIER,
>> PERF_REG_POWERPC_MMCRA,
>> -PERF_REG_POWERPC_MAX,
>> +/* Extended registers */
>> +PERF_REG_POWERPC_MMCR0,
>> +PERF_REG_POWERPC_MMCR1,
>> +PERF_REG_POWERPC_MMCR2,
>> +/* Max regs without the extended regs */
>> +PERF_REG_POWERPC_MAX = PERF_REG_POWERPC_MMCRA + 1,
>> };
>> +
>> +#define PERF_REG_PMU_MASK ((1ULL << PERF_REG_POWERPC_MAX) - 1)
>> +
>> +/* PERF_REG_EXTENDED_MASK value for
Re: [v3 12/15] powerpc/perf: Add support for outputting extended regs in perf intr_regs
On 7/17/20 8:08 PM, Athira Rajeev wrote:
> From: Anju T Sudhakar
>
> Add support for perf extended register capability in powerpc.
> The capability flag PERF_PMU_CAP_EXTENDED_REGS, is used to indicate the
> PMU which support extended registers. The generic code define the mask
> of extended registers as 0 for non supported architectures.
>
> Patch adds extended regs support for power9 platform by
> exposing MMCR0, MMCR1 and MMCR2 registers.
>
> REG_RESERVED mask needs update to include extended regs.
> `PERF_REG_EXTENDED_MASK`, contains mask value of the supported registers,
> is defined at runtime in the kernel based on platform since the supported
> registers may differ from one processor version to another and hence the
> MASK value.
>
> with patch
> --
>
> available registers: r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11
> r12 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 r26
> r27 r28 r29 r30 r31 nip msr orig_r3 ctr link xer ccr softe
> trap dar dsisr sier mmcra mmcr0 mmcr1 mmcr2
>
> PERF_RECORD_SAMPLE(IP, 0x1): 4784/4784: 0 period: 1 addr: 0
> ... intr regs: mask 0x ABI 64-bit
> r00xc012b77c
> r10xc03fe5e03930
> r20xc1b0e000
> r30xc03fdcddf800
> r40xc03fc788
> r50x9c422724be
> r60xc03fe5e03908
> r70xff63bddc8706
> r80x9e4
> r90x0
> r10 0x1
> r11 0x0
> r12 0xc01299c0
> r13 0xc03c4800
> r14 0x0
> r15 0x7fffdd8b8b00
> r16 0x0
> r17 0x7fffdd8be6b8
> r18 0x7e7076607730
> r19 0x2f
> r20 0xc0001fc26c68
> r21 0xc0002041e4227e00
> r22 0xc0002018fb60
> r23 0x1
> r24 0xc03ffec4d900
> r25 0x8000
> r26 0x0
> r27 0x1
> r28 0x1
> r29 0xc1be1260
> r30 0x6008010
> r31 0xc03ffebb7218
> nip 0xc012b910
> msr 0x90009033
> orig_r3 0xc012b86c
> ctr 0xc01299c0
> link 0xc012b77c
> xer 0x0
> ccr 0x2800
> softe 0x1
> trap 0xf00
> dar 0x0
> dsisr 0x800
> sier 0x0
> mmcra 0x800
> mmcr0 0x82008090
> mmcr1 0x1e00
> mmcr2 0x0
> ... thread: perf:4784
>
> Signed-off-by: Anju T Sudhakar
> [Defined PERF_REG_EXTENDED_MASK at run time to add support for different
> platforms ]
> Signed-off-by: Athira Rajeev
> Reviewed-by: Madhavan Srinivasan
> ---
Patch looks good to me.
Reviewed-by: Kajol Jain
Thanks,
Kajol Jain
> arch/powerpc/include/asm/perf_event_server.h | 8 +++
> arch/powerpc/include/uapi/asm/perf_regs.h| 14 +++-
> arch/powerpc/perf/core-book3s.c | 1 +
> arch/powerpc/perf/perf_regs.c| 34
> +---
> arch/powerpc/perf/power9-pmu.c | 6 +
> 5 files changed, 59 insertions(+), 4 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/perf_event_server.h
> b/arch/powerpc/include/asm/perf_event_server.h
> index 832450a..bf85d1a 100644
> --- a/arch/powerpc/include/asm/perf_event_server.h
> +++ b/arch/powerpc/include/asm/perf_event_server.h
> @@ -15,6 +15,9 @@
> #define MAX_EVENT_ALTERNATIVES 8
> #define MAX_LIMITED_HWCOUNTERS 2
>
> +extern u64 PERF_REG_EXTENDED_MASK;
> +#define PERF_REG_EXTENDED_MASK PERF_REG_EXTENDED_MASK
> +
> struct perf_event;
>
> struct mmcr_regs {
> @@ -62,6 +65,11 @@ struct power_pmu {
> int *blacklist_ev;
> /* BHRB entries in the PMU */
> int bhrb_nr;
> + /*
> + * set this flag with `PERF_PMU_CAP_EXTENDED_REGS` if
> + * the pmu supports extended perf regs capability
> + */
> + int capabilities;
> };
>
> /*
> diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h
> b/arch/powerpc/include/uapi/asm/perf_regs.h
> index f599064..225c64c 100644
> --- a/arch/powerpc/include/uapi/asm/perf_regs.h
> +++ b/arch/powerpc/include/uapi/asm/perf_regs.h
> @@ -48,6 +48,18 @@ enum perf_event_powerpc_regs {
> PERF_REG_POWERPC_DSISR,
> PERF_REG_POWERPC_SIER,
> PERF_REG_POWERPC_MMCRA,
> - PERF_REG_POWERPC_MAX,
> + /* Extended registers */
> + PERF_REG_POWERPC_MMCR0,
> + PERF_REG_POWERPC_MMCR1,
> + PERF_REG_POWERPC_MMCR2,
> + /* Max regs without the extended regs */
> + PERF_REG_POWERPC_MAX = PERF_REG_POWERPC_MMCRA + 1,
> };
> +
> +#define PERF_REG_PMU_MASK((1ULL << PERF_REG_POWERPC_MAX) - 1)
> +
> +/* PERF_REG_EXTENDED_MASK value for CPU_FTR_ARCH_300 */
> +#define PERF_REG_PMU_MASK_300 (((1ULL << (PERF_REG_POWERPC_MMCR2 + 1)) -
> 1) - PERF_REG_PMU_MASK)
> +
> +#define PERF_REG_MAX_ISA_300 (PERF_REG_POWERPC_MMCR2 + 1)
> #endif /* _UAPI_ASM_POWERPC_PERF_REGS_H */
> diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
> index
Re: [v3 12/15] powerpc/perf: Add support for outputting extended regs in perf intr_regs
> On 19-Jul-2020, at 4:47 PM, kernel test robot wrote: > > Hi Athira, > > Thank you for the patch! Yet something to improve: > > [auto build test ERROR on powerpc/next] > [also build test ERROR on tip/perf/core v5.8-rc5 next-20200717] > [If your patch is applied to the wrong git tree, kindly drop us a note. > And when submitting patch, we suggest to use '--base' as documented in > https://git-scm.com/docs/git-format-patch] > > url: > https://github.com/0day-ci/linux/commits/Athira-Rajeev/powerpc-perf-Add-support-for-power10-PMU-Hardware/20200717-224353 > base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next > config: powerpc64-randconfig-r024-20200719 (attached as .config) > compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project > ed6b578040a85977026c93bf4188f996148f3218) > reproduce (this is a W=1 build): >wget > https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O > ~/bin/make.cross >chmod +x ~/bin/make.cross ># install powerpc64 cross compiling tool for clang build ># apt-get install binutils-powerpc64-linux-gnu ># save the attached .config to linux build tree >COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross > ARCH=powerpc64 > > If you fix the issue, kindly add following tag as appropriate > Reported-by: kernel test robot > > All errors (new ones prefixed by >>): > > arch/powerpc/include/asm/io-defs.h:45:1: warning: performing pointer > arithmetic on a null pointer has undefined behavior > [-Wnull-pointer-arithmetic] > DEF_PCI_AC_NORET(insw, (unsigned long p, void *b, unsigned long c), > ^~~ > arch/powerpc/include/asm/io.h:601:3: note: expanded from macro > 'DEF_PCI_AC_NORET' > __do_##name al; \ > ^~ > :221:1: note: expanded from here > __do_insw > ^ > arch/powerpc/include/asm/io.h:542:56: note: expanded from macro '__do_insw' > #define __do_insw(p, b, n) readsw((PCI_IO_ADDR)_IO_BASE+(p), (b), (n)) > ~^ > In file included from arch/powerpc/perf/perf_regs.c:10: > In file included from include/linux/perf_event.h:57: > In file included from include/linux/cgroup.h:26: > In file included from include/linux/kernel_stat.h:9: > In file included from include/linux/interrupt.h:11: > In file included from include/linux/hardirq.h:10: > In file included from arch/powerpc/include/asm/hardirq.h:6: > In file included from include/linux/irq.h:20: > In file included from include/linux/io.h:13: > In file included from arch/powerpc/include/asm/io.h:604: > arch/powerpc/include/asm/io-defs.h:47:1: warning: performing pointer > arithmetic on a null pointer has undefined behavior > [-Wnull-pointer-arithmetic] > DEF_PCI_AC_NORET(insl, (unsigned long p, void *b, unsigned long c), > ^~~ > arch/powerpc/include/asm/io.h:601:3: note: expanded from macro > 'DEF_PCI_AC_NORET' > __do_##name al; \ > ^~ > :223:1: note: expanded from here > __do_insl > ^ > arch/powerpc/include/asm/io.h:543:56: note: expanded from macro '__do_insl' > #define __do_insl(p, b, n) readsl((PCI_IO_ADDR)_IO_BASE+(p), (b), (n)) > ~^ > In file included from arch/powerpc/perf/perf_regs.c:10: > In file included from include/linux/perf_event.h:57: > In file included from include/linux/cgroup.h:26: > In file included from include/linux/kernel_stat.h:9: > In file included from include/linux/interrupt.h:11: > In file included from include/linux/hardirq.h:10: > In file included from arch/powerpc/include/asm/hardirq.h:6: > In file included from include/linux/irq.h:20: > In file included from include/linux/io.h:13: > In file included from arch/powerpc/include/asm/io.h:604: > arch/powerpc/include/asm/io-defs.h:49:1: warning: performing pointer > arithmetic on a null pointer has undefined behavior > [-Wnull-pointer-arithmetic] > DEF_PCI_AC_NORET(outsb, (unsigned long p, const void *b, unsigned long c), > ^~ > arch/powerpc/include/asm/io.h:601:3: note: expanded from macro > 'DEF_PCI_AC_NORET' > __do_##name al; \ > ^~ > :225:1: note: expanded from here > __do_outsb > ^ > arch/powerpc/include/asm/io.h:544:58: note: expanded from macro '__do_outsb' > #define __do_outsb(p, b, n) writesb((PCI_IO_ADDR)_IO_BASE+(p),(b),(n)) > ~^ > In file included from arch/powerpc/perf/perf_regs.c:10: > In file included from
Re: [v3 12/15] powerpc/perf: Add support for outputting extended regs in perf intr_regs
Hi Athira, Thank you for the patch! Yet something to improve: [auto build test ERROR on powerpc/next] [also build test ERROR on tip/perf/core v5.8-rc5 next-20200717] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Athira-Rajeev/powerpc-perf-Add-support-for-power10-PMU-Hardware/20200717-224353 base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next config: powerpc64-randconfig-r024-20200719 (attached as .config) compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project ed6b578040a85977026c93bf4188f996148f3218) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install powerpc64 cross compiling tool for clang build # apt-get install binutils-powerpc64-linux-gnu # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=powerpc64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot All errors (new ones prefixed by >>): arch/powerpc/include/asm/io-defs.h:45:1: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] DEF_PCI_AC_NORET(insw, (unsigned long p, void *b, unsigned long c), ^~~ arch/powerpc/include/asm/io.h:601:3: note: expanded from macro 'DEF_PCI_AC_NORET' __do_##name al; \ ^~ :221:1: note: expanded from here __do_insw ^ arch/powerpc/include/asm/io.h:542:56: note: expanded from macro '__do_insw' #define __do_insw(p, b, n) readsw((PCI_IO_ADDR)_IO_BASE+(p), (b), (n)) ~^ In file included from arch/powerpc/perf/perf_regs.c:10: In file included from include/linux/perf_event.h:57: In file included from include/linux/cgroup.h:26: In file included from include/linux/kernel_stat.h:9: In file included from include/linux/interrupt.h:11: In file included from include/linux/hardirq.h:10: In file included from arch/powerpc/include/asm/hardirq.h:6: In file included from include/linux/irq.h:20: In file included from include/linux/io.h:13: In file included from arch/powerpc/include/asm/io.h:604: arch/powerpc/include/asm/io-defs.h:47:1: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] DEF_PCI_AC_NORET(insl, (unsigned long p, void *b, unsigned long c), ^~~ arch/powerpc/include/asm/io.h:601:3: note: expanded from macro 'DEF_PCI_AC_NORET' __do_##name al; \ ^~ :223:1: note: expanded from here __do_insl ^ arch/powerpc/include/asm/io.h:543:56: note: expanded from macro '__do_insl' #define __do_insl(p, b, n) readsl((PCI_IO_ADDR)_IO_BASE+(p), (b), (n)) ~^ In file included from arch/powerpc/perf/perf_regs.c:10: In file included from include/linux/perf_event.h:57: In file included from include/linux/cgroup.h:26: In file included from include/linux/kernel_stat.h:9: In file included from include/linux/interrupt.h:11: In file included from include/linux/hardirq.h:10: In file included from arch/powerpc/include/asm/hardirq.h:6: In file included from include/linux/irq.h:20: In file included from include/linux/io.h:13: In file included from arch/powerpc/include/asm/io.h:604: arch/powerpc/include/asm/io-defs.h:49:1: warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic] DEF_PCI_AC_NORET(outsb, (unsigned long p, const void *b, unsigned long c), ^~ arch/powerpc/include/asm/io.h:601:3: note: expanded from macro 'DEF_PCI_AC_NORET' __do_##name al; \ ^~ :225:1: note: expanded from here __do_outsb ^ arch/powerpc/include/asm/io.h:544:58: note: expanded from macro '__do_outsb' #define __do_outsb(p, b, n) writesb((PCI_IO_ADDR)_IO_BASE+(p),(b),(n)) ~^ In file included from arch/powerpc/perf/perf_regs.c:10: In file included from include/linux/perf_event.h:57: In file included from include/linux/cgroup.h:26: In file included from include/linux/kernel_stat.h:9: In file included from include/linux/interrupt.h:11: In
[v3 12/15] powerpc/perf: Add support for outputting extended regs in perf intr_regs
From: Anju T Sudhakar
Add support for perf extended register capability in powerpc.
The capability flag PERF_PMU_CAP_EXTENDED_REGS, is used to indicate the
PMU which support extended registers. The generic code define the mask
of extended registers as 0 for non supported architectures.
Patch adds extended regs support for power9 platform by
exposing MMCR0, MMCR1 and MMCR2 registers.
REG_RESERVED mask needs update to include extended regs.
`PERF_REG_EXTENDED_MASK`, contains mask value of the supported registers,
is defined at runtime in the kernel based on platform since the supported
registers may differ from one processor version to another and hence the
MASK value.
with patch
--
available registers: r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11
r12 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 r26
r27 r28 r29 r30 r31 nip msr orig_r3 ctr link xer ccr softe
trap dar dsisr sier mmcra mmcr0 mmcr1 mmcr2
PERF_RECORD_SAMPLE(IP, 0x1): 4784/4784: 0 period: 1 addr: 0
... intr regs: mask 0x ABI 64-bit
r00xc012b77c
r10xc03fe5e03930
r20xc1b0e000
r30xc03fdcddf800
r40xc03fc788
r50x9c422724be
r60xc03fe5e03908
r70xff63bddc8706
r80x9e4
r90x0
r10 0x1
r11 0x0
r12 0xc01299c0
r13 0xc03c4800
r14 0x0
r15 0x7fffdd8b8b00
r16 0x0
r17 0x7fffdd8be6b8
r18 0x7e7076607730
r19 0x2f
r20 0xc0001fc26c68
r21 0xc0002041e4227e00
r22 0xc0002018fb60
r23 0x1
r24 0xc03ffec4d900
r25 0x8000
r26 0x0
r27 0x1
r28 0x1
r29 0xc1be1260
r30 0x6008010
r31 0xc03ffebb7218
nip 0xc012b910
msr 0x90009033
orig_r3 0xc012b86c
ctr 0xc01299c0
link 0xc012b77c
xer 0x0
ccr 0x2800
softe 0x1
trap 0xf00
dar 0x0
dsisr 0x800
sier 0x0
mmcra 0x800
mmcr0 0x82008090
mmcr1 0x1e00
mmcr2 0x0
... thread: perf:4784
Signed-off-by: Anju T Sudhakar
[Defined PERF_REG_EXTENDED_MASK at run time to add support for different
platforms ]
Signed-off-by: Athira Rajeev
Reviewed-by: Madhavan Srinivasan
---
arch/powerpc/include/asm/perf_event_server.h | 8 +++
arch/powerpc/include/uapi/asm/perf_regs.h| 14 +++-
arch/powerpc/perf/core-book3s.c | 1 +
arch/powerpc/perf/perf_regs.c| 34 +---
arch/powerpc/perf/power9-pmu.c | 6 +
5 files changed, 59 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/include/asm/perf_event_server.h
b/arch/powerpc/include/asm/perf_event_server.h
index 832450a..bf85d1a 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -15,6 +15,9 @@
#define MAX_EVENT_ALTERNATIVES 8
#define MAX_LIMITED_HWCOUNTERS 2
+extern u64 PERF_REG_EXTENDED_MASK;
+#define PERF_REG_EXTENDED_MASK PERF_REG_EXTENDED_MASK
+
struct perf_event;
struct mmcr_regs {
@@ -62,6 +65,11 @@ struct power_pmu {
int *blacklist_ev;
/* BHRB entries in the PMU */
int bhrb_nr;
+ /*
+* set this flag with `PERF_PMU_CAP_EXTENDED_REGS` if
+* the pmu supports extended perf regs capability
+*/
+ int capabilities;
};
/*
diff --git a/arch/powerpc/include/uapi/asm/perf_regs.h
b/arch/powerpc/include/uapi/asm/perf_regs.h
index f599064..225c64c 100644
--- a/arch/powerpc/include/uapi/asm/perf_regs.h
+++ b/arch/powerpc/include/uapi/asm/perf_regs.h
@@ -48,6 +48,18 @@ enum perf_event_powerpc_regs {
PERF_REG_POWERPC_DSISR,
PERF_REG_POWERPC_SIER,
PERF_REG_POWERPC_MMCRA,
- PERF_REG_POWERPC_MAX,
+ /* Extended registers */
+ PERF_REG_POWERPC_MMCR0,
+ PERF_REG_POWERPC_MMCR1,
+ PERF_REG_POWERPC_MMCR2,
+ /* Max regs without the extended regs */
+ PERF_REG_POWERPC_MAX = PERF_REG_POWERPC_MMCRA + 1,
};
+
+#define PERF_REG_PMU_MASK ((1ULL << PERF_REG_POWERPC_MAX) - 1)
+
+/* PERF_REG_EXTENDED_MASK value for CPU_FTR_ARCH_300 */
+#define PERF_REG_PMU_MASK_300 (((1ULL << (PERF_REG_POWERPC_MMCR2 + 1)) - 1)
- PERF_REG_PMU_MASK)
+
+#define PERF_REG_MAX_ISA_300 (PERF_REG_POWERPC_MMCR2 + 1)
#endif /* _UAPI_ASM_POWERPC_PERF_REGS_H */
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 31c0535..d5a9529 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -2316,6 +2316,7 @@ int register_power_pmu(struct power_pmu *pmu)
pmu->name);
power_pmu.attr_groups = ppmu->attr_groups;
+ power_pmu.capabilities |= (ppmu->capabilities &
PERF_PMU_CAP_EXTENDED_REGS);
#ifdef MSR_HV
/*
diff --git
