;
devicet...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org
Subject: Re: 答复: [v7] clk: corenet: Adds the clock binding
On Wed, 2014-01-08 at 09:30 +, Mark Rutland wrote:
On Wed, Jan 08, 2014 at 08:53:56AM +, Yuantian Tang wrote:
发件人
: Re: 答复: [v7] clk: corenet: Adds the clock binding
On Wed, 2014-01-08 at 20:57 -0600, Tang Yuantian-B29983 wrote:
Thanks for you review.
See my response inline.
Thanks,
Yuantian
-Original Message-
From: Wood Scott-B07421
Sent: 2014年1月9日 星期四 2:44
To: Mark Rutland
发件人: Wood Scott-B07421
发送时间: 2014年1月8日 8:21
收件人: Tang Yuantian-B29983
抄送: ga...@kernel.crashing.org; mark.rutl...@arm.com;
devicet...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org
主题: Re: [v7] clk: corenet: Adds the clock binding
On Wed, Nov 20, 2013
: Re: [v7] clk: corenet: Adds the clock binding
On Wed, Nov 20, 2013 at 05:04:49PM +0800, tang yuantian wrote:
+Recommended properties:
+- ranges: Allows valid translation between child's address space and
+ parent's. Must be present if the device has sub-nodes.
+- #address-cells
...@kernel.crashing.org; mark.rutl...@arm.com;
devicet...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org
主题: Re: [v7] clk: corenet: Adds the clock binding
On Wed, Nov 20, 2013 at 05:04:49PM +0800, tang yuantian wrote:
+Recommended properties:
+- ranges: Allows valid translation
On Wed, Nov 20, 2013 at 05:04:49PM +0800, tang yuantian wrote:
+Recommended properties:
+- ranges: Allows valid translation between child's address space and
+ parent's. Must be present if the device has sub-nodes.
+- #address-cells: Specifies the number of cells used to represent
+
; Tang Yuantian-B29983; Li Yang-Leo-R58472
Subject: [PATCH v7] clk: corenet: Adds the clock binding
From: Tang Yuantian yuantian.t...@freescale.com
Adds the clock bindings for Freescale PowerPC CoreNet platforms
Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
Signed-off-by: Li Yang
...@arm.com; Wood Scott-B07421; grant.lik...@secretlab.ca; Tang
Yuantian-B29983; Tang Yuantian-B29983; Li Yang-Leo-R58472
Subject: [PATCH v7] clk: corenet: Adds the clock binding
From: Tang Yuantian yuantian.t...@freescale.com
Adds the clock bindings for Freescale PowerPC CoreNet platforms
Signed
From: Tang Yuantian yuantian.t...@freescale.com
Adds the clock bindings for Freescale PowerPC CoreNet platforms
Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
---
v7:
- refined some properties' definitions
v6:
- splited the
