I2C bus clock on MPC85XX systems

Hi, Almost all MPC85XX based systems have the compatible=:fsl-i2c in respective i2c device tree nodes. This causes FSL i2c driver to use the following backward compatible values: FSR=0x31 DFSR=0x10. This is regardless of CCB clock frequency and i2c clock prescaler. On my custom MPC8536 based

Re: I2C bus clock on MPC85XX systems

Felix Radensky wrote: Hi, Almost all MPC85XX based systems have the compatible=:fsl-i2c in respective i2c device tree nodes. This causes FSL i2c driver to use the following backward compatible values: FSR=0x31 DFSR=0x10. This is regardless of CCB clock frequency and i2c clock prescaler.

Re: I2C bus clock on MPC85XX systems

Hi, Wolfgang Wolfgang Grandegger wrote: Felix Radensky wrote: Hi, Almost all MPC85XX based systems have the compatible=:fsl-i2c in respective i2c device tree nodes. This causes FSL i2c driver to use the following backward compatible values: FSR=0x31 DFSR=0x10. This is regardless of CCB

Re: I2C bus clock on MPC85XX systems

Felix Radensky wrote: Hi, Wolfgang Wolfgang Grandegger wrote: Felix Radensky wrote: Hi, Almost all MPC85XX based systems have the compatible=:fsl-i2c in respective i2c device tree nodes. This causes FSL i2c driver to use the following backward compatible values: FSR=0x31 DFSR=0x10.

Re: I2C bus clock on MPC85XX systems

Hi, Wolfgang Wolfgang Grandegger wrote: Felix Radensky wrote: Hi, Wolfgang Wolfgang Grandegger wrote: Felix Radensky wrote: Hi, Almost all MPC85XX based systems have the compatible=:fsl-i2c in respective i2c device tree nodes. This causes FSL i2c driver to use the

Re: I2C bus clock on MPC85XX systems

Hi Felix, Felix Radensky wrote: Hi, Wolfgang Wolfgang Grandegger wrote: [snip] The trees provided by Freescale are usually based on older kernel version. Borrow from such trees is OK, but the project developers should use a recent kernel version for development. I was talking about