Hi Ben
Benjamin Herrenschmidt wrote:
On Tue, 2010-01-12 at 00:48 +0200, Felix Radensky wrote:
Maybe because the bus behind root P2P bridge is bus 0, and type 1
cycles are
needed for bus numbers greater than 0. That's what 460EX manual says.
Well, no... the bus behind the root P2P is
B.V.
-Original Message-
From: Felix Radensky [mailto:fe...@embedded-sol.com]
Sent: dinsdag 12 januari 2010 12:03
To: Benjamin Herrenschmidt
Cc: Stef van Os; Stefan Roese; Feng Kan; linuxppc-...@ozlabs.org
Subject: Re: PCI-PCI bridge scanning broken on 460EX
Hi Ben
Benjamin
-bounces+stef.van.os=prodrive...@lists.ozlabs.org
[mailto:linuxppc-dev-bounces+stef.van.os=prodrive...@lists.ozlabs.org]
On Behalf Of Benjamin Herrenschmidt
Sent: zondag 10 januari 2010 22:32
To: Felix Radensky
Cc: linuxppc-...@ozlabs.org; Stefan Roese; Feng Kan
Subject: Re: PCI-PCI bridge scanning
Hi Stef,
Stef van Os wrote:
Hello Felix,
I had a problem similar to this on the 440GX, the PCI code was not
sending type 1 transactions when scanning behind bridges. Perhaps you
could try this:
Index: linux/arch/powerpc/sysdev/ppc4xx_pci.c
Hi Stef
Felix Radensky wrote:
Hi Stef,
Stef van Os wrote:
Hello Felix,
I had a problem similar to this on the 440GX, the PCI code was not
sending type 1 transactions when scanning behind bridges. Perhaps you
could try this:
Index: linux/arch/powerpc/sysdev/ppc4xx_pci.c
It seems I was wrong. I've manually applied the patch at the wrong
place. After patching the correct function
I'm not getting hard resets any more, which is a great improvement !
Thanks a lot, I really appreciate your help !
This is somewhat funny... I wonder how it would have managed to
Hi, Ben
Benjamin Herrenschmidt wrote:
It seems I was wrong. I've manually applied the patch at the wrong
place. After patching the correct function
I'm not getting hard resets any more, which is a great improvement !
Thanks a lot, I really appreciate your help !
This is somewhat
On Tue, 2010-01-12 at 00:48 +0200, Felix Radensky wrote:
Maybe because the bus behind root P2P bridge is bus 0, and type 1
cycles are
needed for bus numbers greater than 0. That's what 460EX manual says.
Well, no... the bus behind the root P2P is bus 1 ... the root P2P itself
is on bus 0...
Hi, Ben
Felix Radensky wrote:
Hi, Ben
Adding Feng Kan from AMCC to CC.
Benjamin Herrenschmidt wrote:
On Mon, 2009-12-28 at 12:51 +0200, Felix Radensky wrote:
Hi,
I'm running linux-2.6.33-rc2 on Canyonlands board. When PLX 6254
transparent PCI-PCI
bridge is plugged into PCI slot the
On Sun, 2010-01-10 at 14:56 +0200, Felix Radensky wrote:
I now have a custom board with 460EX and the same PLX bridge, running
2.6.23-rc3
Things look better here, as u-boot is now able to properly detect PLX
and device behind
it, but kernel still has problems. First, I'm still getting hard
Benjamin Herrenschmidt wrote:
On Sun, 2010-01-10 at 14:56 +0200, Felix Radensky wrote:
I now have a custom board with 460EX and the same PLX bridge, running
2.6.23-rc3
Things look better here, as u-boot is now able to properly detect PLX
and device behind
it, but kernel still has
OK, I'll try writing byte by byte. The funny thing is the u-boot also
writes the
same value to PCI_PRIMARY_BUS register and it doesn't cause reset.
Maybe the bridge doesn't want to be programmed more than once on these
registers ? In any case, that's very very fishy I wonder if the
Hi, Ben
Adding Feng Kan from AMCC to CC.
Benjamin Herrenschmidt wrote:
On Mon, 2009-12-28 at 12:51 +0200, Felix Radensky wrote:
Hi,
I'm running linux-2.6.33-rc2 on Canyonlands board. When PLX 6254
transparent PCI-PCI
bridge is plugged into PCI slot the kernel simply resets the board
On Mon, 2009-12-28 at 12:51 +0200, Felix Radensky wrote:
Hi,
I'm running linux-2.6.33-rc2 on Canyonlands board. When PLX 6254
transparent PCI-PCI
bridge is plugged into PCI slot the kernel simply resets the board
without printing anything
to console. Without PLX bridge kernel boots fine.
Hi,
I'm running linux-2.6.33-rc2 on Canyonlands board. When PLX 6254
transparent PCI-PCI
bridge is plugged into PCI slot the kernel simply resets the board
without printing anything
to console. Without PLX bridge kernel boots fine.
I've tracked down the problem to the following code in
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