Re: powerpc/powernv: copy/paste - Mask XERS0 bit in CR

2018-06-04 Thread Michael Ellerman
Haren Myneni writes: > On 06/03/2018 03:48 AM, Michael Ellerman wrote: >> Haren Myneni writes: >>> NX can set 3rd bit in CR register for XER[SO] (Summation overflow) >>> which is not related to paste request. The current paste function >>> returns failure for the successful request when this bit

Re: powerpc/powernv: copy/paste - Mask XERS0 bit in CR

2018-06-03 Thread Haren Myneni
On 06/03/2018 03:48 AM, Michael Ellerman wrote: > Hi Haren, > > Haren Myneni writes: >> >> NX can set 3rd bit in CR register for XER[SO] (Summation overflow) >> which is not related to paste request. The current paste function >> returns failure for the successful request when this bit is

Re: powerpc/powernv: copy/paste - Mask XERS0 bit in CR

2018-06-03 Thread Michael Ellerman
Hi Haren, Haren Myneni writes: > > NX can set 3rd bit in CR register for XER[SO] (Summation overflow) > which is not related to paste request. The current paste function > returns failure for the successful request when this bit is set. > So mask this bit and check the proper return status.

powerpc/powernv: copy/paste - Mask XERS0 bit in CR

2018-05-31 Thread Haren Myneni
NX can set 3rd bit in CR register for XER[SO] (Summation overflow) which is not related to paste request. The current paste function returns failure for the successful request when this bit is set. So mask this bit and check the proper return status. Fixes: 2392c8c8c045