On 07/10/2015 06:19 PM, Eric B Munson wrote:
On Fri, 10 Jul 2015, Jonathan Corbet wrote:
On Thu, 9 Jul 2015 14:46:35 -0400
Eric B Munson emun...@akamai.com wrote:
One other question...if I call mlock2(MLOCK_ONFAULT) on a range that
already has resident pages, I believe that those pages will
On 21.07.2015 [10:32:34 -0500], Chris J Arges wrote:
Some architectures like POWER can have a NUMA node_possible_map that
contains sparse entries. This causes memory corruption with openvswitch
since it allocates flow_cache with a multiple of num_possible_nodes() and
Couldn't this also be
Hi Finn,
I'm afraid I cannot test anything on Atari hardware at present - my
Falcon ate it's IDE disk partition table with all the fun that entails.
Haven't even begun to try and recover that yet.
If you send a patch I could build a kernel and send that to Christian
for testing (if he's got
Always include a timeout when waiting for secondary cpus to enter OPAL
in the kexec path, rather than only when crashing.
Signed-off-by: Samuel Mendoza-Jonas sam...@au1.ibm.com
---
arch/powerpc/platforms/powernv/setup.c | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
On powernv secondary cpus are returned to OPAL, and will then enter
the target kernel in big-endian. However if it is set the HILE bit
will persist, causing the first exception in the target kernel to be
delivered in litte-endian regardless of the current endianess.
If running on top of OPAL make
Hi Anton,
[PATCH] Fix crash due to processing memory-controller nodes as memory
Looks good to me. If you apply this to your kexec-lite repo, I'll update
op-build to use the new version, and send the merge requests for op-build.
I'd expect we'd have those changes upstream in the next couple of
Hi,
On Wed, Jul 15, 2015 at 08:31:54AM +0200, Robert Baldyga wrote:
Convert endpoint configuration to new capabilities model.
Signed-off-by: Robert Baldyga r.bald...@samsung.com
---
drivers/usb/dwc3/gadget.c | 13 +
1 file changed, 13 insertions(+)
diff --git
On 06/29/15 23:29, Michael Ellerman wrote:
On Wed, 2015-06-17 at 14:30 -0400, David Long wrote:
On 06/16/15 09:17, Rob Herring wrote:
On Mon, Jun 15, 2015 at 11:42 AM, David Long dave.l...@linaro.org wrote:
#define REG_OFFSET_NAME(r) \
{.name = #r, .offset = offsetof(struct
Hi Ian,
Nice catch! I wonder if we should be checking for device_type
memory. Ben?
Yes. That's what Linux does.
Ian: I made that change, and slightly modified your commit message.
Look ok?
Looks good to me :)
Excellent, I just pushed the fix.
Anton
On Tue, Jul 21, 2015 at 06:50:45PM -0700, Sukadev Bhattiprolu wrote:
We are trying to use the following interface:
start_txn(pmu, PERF_PMU_TXN_READ);
perf_event_read(leader);
list_for_each(sibling, leader-sibling_list, group_entry)
perf_event_read(sibling)
On Tue, 2015-07-21 at 15:55 +0200, Vlastimil Babka wrote:
The function alloc_pages_exact_node() was introduced in 6484eb3e2a81 (page
allocator: do not check NUMA node ID when the caller knows the node is valid)
as an optimized variant of alloc_pages_node(), that doesn't allow the node id
to be
On Tue, 2015-07-21 at 13:44 -0700, Andrew Morton wrote:
On Tue, 21 Jul 2015 15:59:37 -0400 Eric B Munson emun...@akamai.com wrote:
With the refactored mlock code, introduce new system calls for mlock,
munlock, and munlockall. The new calls will allow the user to specify
what lock states
On Thu, 2015-07-16 at 16:43 +0530, Madhavan Srinivasan wrote:
Add code to create event/format attributes and attribute groups for
each nest pmu.
Cc: Michael Ellerman m...@ellerman.id.au
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Cc: Paul Mackerras pau...@samba.org
Cc: Anton
On Wed, 2015-07-22 at 00:46 -0400, David Long wrote:
On 06/29/15 23:29, Michael Ellerman wrote:
On Wed, 2015-06-17 at 14:30 -0400, David Long wrote:
On 06/16/15 09:17, Rob Herring wrote:
On Mon, Jun 15, 2015 at 11:42 AM, David Long dave.l...@linaro.org wrote:
#define
On Tue, 2015-07-21 at 12:28 +0530, Anshuman Khandual wrote:
From: khand...@linux.vnet.ibm.com khand...@linux.vnet.ibm.com
This patch adds some documentation to 'patch_slb_encoding' function
explaining about how it clears the existing immediate value in the
given instruction and inserts a new
On Tue, 2015-07-21 at 16:34 -0500, Nathan Fontenot wrote:
On 07/21/2015 04:27 AM, Michael Ellerman wrote:
On Mon, 2015-22-06 at 21:00:49 UTC, Nathan Fontenot wrote:
+static int dlpar_cpu_remove_by_count(struct device_node *parent,
+ u32 cpus_to_remove)
+{
+
On Wed, 2015-07-22 at 08:39 +0800, jer...@ozlabs.au.ibm.com wrote:
Hi Anton,
[PATCH] Fix crash due to processing memory-controller nodes as memory
Looks good to me. If you apply this to your kexec-lite repo, I'll update
op-build to use the new version, and send the merge requests for
Peter Zijlstra [pet...@infradead.org] wrote:
| On Tue, Jul 14, 2015 at 08:01:54PM -0700, Sukadev Bhattiprolu wrote:
| +/*
| + * Use the transaction interface to read the group of events in @leader.
| + * PMUs like the 24x7 counters in Power, can use this to queue the events
| + * in the
Hi,
+static struct perchip_nest_info p8_nest_perchip_info[P8_NEST_MAX_CHIPS];
+
+static int nest_ima_dt_parser(void)
+{
+ const __be32 *gcid;
+ const __be64 *chip_ima_reg;
+ const __be64 *chip_ima_size;
+ struct device_node *dev;
+ struct perchip_nest_info *p8ni;
+
static struct perchip_nest_info p8_nest_perchip_info[P8_NEST_MAX_CHIPS];
+static struct nest_pmu *per_nest_pmu_arr[P8_NEST_MAX_PMUS];
+
+static int nest_event_info(struct property *pp, char *name,
+ struct nest_ima_events *p8_events, int string, u32 val)
'int string' is
On Wed, 22 Jul 2015, Michael Schmitz wrote:
Hi Finn,
I'm afraid I cannot test anything on Atari hardware at present - my
Falcon ate it's IDE disk partition table with all the fun that entails.
That doesn't sound good.
Haven't even begun to try and recover that yet.
If you send a
On Tue, 2015-07-21 at 17:15 +0530, Anshuman Khandual wrote:
On 07/21/2015 03:30 PM, Michael Ellerman wrote:
On Tue, 2015-21-07 at 06:58:45 UTC, Anshuman Khandual wrote:
From: khand...@linux.vnet.ibm.com khand...@linux.vnet.ibm.com
Value of 'valid' is zero when 'esid' is zero and it
+static void nest_change_cpu_context(int old_cpu, int new_cpu)
+{
+ int i;
+
+ for (i = 0; per_nest_pmu_arr[i] != NULL; i++)
+ perf_pmu_migrate_context(per_nest_pmu_arr[i]-pmu,
+ old_cpu, new_cpu);
From patch 4, I see
From: Chris J Arges chris.j.ar...@canonical.com
Date: Tue, 21 Jul 2015 12:36:33 -0500
Some architectures like POWER can have a NUMA node_possible_map that
contains sparse entries. This causes memory corruption with openvswitch
since it allocates flow_cache with a multiple of
If the target kernel does not inlcude the FIXUP_ENDIAN check, coming
from a different-endian kernel will cause the target kernel to panic.
All ppc64 kernels can handle starting in big-endian mode, so return to
big-endian before branching into the target kernel.
This mainly affects pseries as
Older ppc64 kernels, namely those missing FIXUP_ENDIAN or opal_reinit_cpus,
will fail to boot if started via kexec from a little-endian kernel.
The following two patches make sure that the current endianess is reset to
big-endian just before entering the target kernel, and are accompanied by
a
Excerpts from Anton Blanchard's message of 2015-07-22 09:18:44 +1000:
Hi,
Nice catch! I wonder if we should be checking for device_type
memory. Ben?
Yes. That's what Linux does.
Ian: I made that change, and slightly modified your commit message.
Look ok?
Looks good to me :)
+static void p8_nest_read_counter(struct perf_event *event)
+{
+ uint64_t *addr;
+ u64 data = 0;
You've got a u64 and a uint64_t, and then...
+
+ addr = (u64 *)event-hw.event_base;
... you cast to event_base to a u64 pointer, which you assign to a
uint64_t pointer.
+ data =
On Tue, 2015-07-21 at 14:14 -0500, Nathan Fontenot wrote:
On 07/20/2015 11:46 PM, Michael Ellerman wrote:
So the pr_info()s should go entirely and the pr_debugs() should become
pr_warns(). The warning messages should become more verbose so they stand on
their own, ie. include the drc_index.
On 07/20/2015 11:46 PM, Michael Ellerman wrote:
On Mon, 2015-22-06 at 20:59:20 UTC, Nathan Fontenot wrote:
Update the cpu dlpar add/remove paths to do better error recovery when
a failure occurs during the add/remove operation. This includes adding
some pr_info and pr_debug statements.
So
The cost of faulting in all memory to be locked can be very high when
working with large mappings. If only portions of the mapping will be
used this can incur a high penalty for locking.
For the example of a large file, this is the usage pattern for a large
statical language model (probably
mlock() allows a user to control page out of program memory, but this
comes at the cost of faulting in the entire mapping when it is
allocated. For large mappings where the entire area is not necessary
this is not ideal. Instead of forcing all locked pages to be present
when they are allocated,
The cost of faulting in all memory to be locked can be very high when
working with large mappings. If only portions of the mapping will be
used this can incur a high penalty for locking.
Now that we have the new VMA flag for the locked but not present state,
expose it as an mmap option like
With the refactored mlock code, introduce new system calls for mlock,
munlock, and munlockall. The new calls will allow the user to specify
what lock states are being added or cleared. mlock2 and munlock2 are
trivial at the moment, but a follow on patch will add a new mlock state
making them
On Tue, 21 Jul 2015, Vlastimil Babka wrote:
The function alloc_pages_exact_node() was introduced in 6484eb3e2a81 (page
allocator: do not check NUMA node ID when the caller knows the node is valid)
as an optimized variant of alloc_pages_node(), that doesn't allow the node id
to be -1.
On 07/21/2015 04:27 AM, Michael Ellerman wrote:
On Mon, 2015-22-06 at 21:00:49 UTC, Nathan Fontenot wrote:
Add the ability to dlpar remove CPUs via hotplug rtas events, either by
specifying the drc-index of the CPU to remove or providing a count of cpus
to remove.
To accomplish we create a
On Tue, Jul 21, 2015 at 8:55 AM, Vlastimil Babka vba...@suse.cz wrote:
The function alloc_pages_exact_node() was introduced in 6484eb3e2a81 (page
allocator: do not check NUMA node ID when the caller knows the node is valid)
as an optimized variant of alloc_pages_node(), that doesn't allow the
On Tue, Jul 21, 2015 at 09:24:18AM -0700, Nishanth Aravamudan wrote:
On 21.07.2015 [10:32:34 -0500], Chris J Arges wrote:
Some architectures like POWER can have a NUMA node_possible_map that
contains sparse entries. This causes memory corruption with openvswitch
since it allocates
On Tue, Jul 21, 2015 at 10:36 AM, Chris J Arges
chris.j.ar...@canonical.com wrote:
Some architectures like POWER can have a NUMA node_possible_map that
contains sparse entries. This causes memory corruption with openvswitch
since it allocates flow_cache with a multiple of num_possible_nodes()
On 21.07.2015 [11:30:58 -0500], Chris J Arges wrote:
On Tue, Jul 21, 2015 at 09:24:18AM -0700, Nishanth Aravamudan wrote:
On 21.07.2015 [10:32:34 -0500], Chris J Arges wrote:
Some architectures like POWER can have a NUMA node_possible_map that
contains sparse entries. This causes memory
Some architectures like POWER can have a NUMA node_possible_map that
contains sparse entries. This causes memory corruption with openvswitch
since it allocates flow_cache with a multiple of num_possible_nodes() and
assumes the node variable returned by for_each_node will index into
Some architectures like POWER can have a NUMA node_possible_map that
contains sparse entries. This causes memory corruption with openvswitch
since it allocates flow_cache with a multiple of num_possible_nodes() and
assumes the node variable returned by for_each_node will index into
On 21.07.2015 [12:36:33 -0500], Chris J Arges wrote:
Some architectures like POWER can have a NUMA node_possible_map that
contains sparse entries. This causes memory corruption with openvswitch
since it allocates flow_cache with a multiple of num_possible_nodes() and
assumes the node variable
On Tue, 21 Jul 2015 15:59:37 -0400 Eric B Munson emun...@akamai.com wrote:
With the refactored mlock code, introduce new system calls for mlock,
munlock, and munlockall. The new calls will allow the user to specify
what lock states are being added or cleared. mlock2 and munlock2 are
trivial
Hi,
Nice catch! I wonder if we should be checking for device_type
memory. Ben?
Yes. That's what Linux does.
Ian: I made that change, and slightly modified your commit message.
Look ok?
Anton
--
[PATCH] Fix crash due to processing memory-controller nodes as memory
If the system has a
在 2015年07月21日 14:40, Michael Ellerman 写道:
On Fri, 2015-07-17 at 13:28 +0800, Zumeng Chen wrote:
On 2015年07月17日 12:07, Michael Ellerman wrote:
On Fri, 2015-07-17 at 09:27 +0800, Zumeng Chen wrote:
On 2015年07月16日 17:04, Michael Ellerman wrote:
On Thu, 2015-07-16 at 13:57 +0800, Zumeng Chen
From: khand...@linux.vnet.ibm.com khand...@linux.vnet.ibm.com
This patch defines macros for all the three bolted SLB slots. This also
renames the 'create_shadowed_slb' function as 'new_shadowed_slb'.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/mm/slb.c | 27
These were introduced in commit 25ae3a0739c6 ([POWERPC] mpc512x: Add
MPC512x PSC support to MPC52xx psc driver) and never used. Moreover
according to the datasheet[1] MEMERROR is bit 25 (0x40) and ORERR is
bit 27 (0x10).
[1] MPC5125RM Rev. 2; 11/2009
Signed-off-by: Uwe Kleine-König
On Mon, 2015-07-20 at 20:45 +1000, Alexey Kardashevskiy wrote:
The existing code stores the amount of memory allocated for a TCE table.
At the moment it uses @offset which is a virtual offset in the TCE table
which is only correct for a one level tables and it does not include
memory allocated
From: khand...@linux.vnet.ibm.com khand...@linux.vnet.ibm.com
These are essentially SLB individual slots what we are dealing with
in these functions. Usage of both 'entry' and 'slot' synonyms makes
it real confusing sometimes. This patch makes it uniform across the
file by replacing all those
This fixes several warnings like:
drivers/spi/spi-mpc512x-psc.c: In function
'mpc512x_psc_spi_prep_xfer_hw':
arch/powerpc/include/asm/io.h:163:2: warning: '__ret' may be used
uninitialized in this function [-Wmaybe-uninitialized]
introduced in commit 8bf960985dfc for some build
From: khand...@linux.vnet.ibm.com khand...@linux.vnet.ibm.com
This patch just removes one redundant entry for one extern variable
'slb_compare_rr_to_size' from the scope. This patch does not change
any functionality.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
From: khand...@linux.vnet.ibm.com khand...@linux.vnet.ibm.com
This patch adds some more elements to the existing PACA dump list
inside a xmon session which can be listed here.
- hmi_event_available
- dscr_default
- vmalloc_sllp
- slb_cache_ptr
- sprg_vdso
Add 'cpu-rev' property for cpus node to support getting cpu revision
from dts, since it's not good to get cpu revision using powerpc specific
function(like SVR_REV()) in common drivers.
Signed-off-by: Yangbo Lu yangbo...@freescale.com
---
arch/powerpc/platforms/85xx/common.c | 34
On Tue, 2015-21-07 at 06:58:44 UTC, Anshuman Khandual wrote:
From: khand...@linux.vnet.ibm.com khand...@linux.vnet.ibm.com
This patch just simplifies the existing code logic while fetching
the SLB size property from the device tree.
Signed-off-by: Anshuman Khandual
On 2015/07/21 13:34, Ananth N Mavinakayanahalli wrote:
On Tue, Jul 21, 2015 at 12:53:07PM +1000, Michael Ellerman wrote:
On Sun, 2015-07-19 at 11:21 +0900, Masami Hiramatsu wrote:
On 2015/07/16 19:56, Ananth N Mavinakayanahalli wrote:
Kprobes uses a breakpoint instruction to trap into
Vasant,
On 21.07.2015 08:55, Vasant Hegde wrote:
On 07/21/2015 11:24 AM, Vasant Hegde wrote:
On 07/20/2015 03:10 AM, Jacek Anaszewski wrote:
Hi Vasant,
Jacek,
I've revised your patch and found few more issues.
Please refer to my comments below.
Thanks.
.../...
Please don't exceed
On Tue, 2015-21-07 at 06:58:45 UTC, Anshuman Khandual wrote:
From: khand...@linux.vnet.ibm.com khand...@linux.vnet.ibm.com
Value of 'valid' is zero when 'esid' is zero and it does not matter
when 'esid' is non-zero.
Yes it does. It tells you whether the entry is valid?
In practice maybe
On Tue, 2015-21-07 at 06:58:46 UTC, Anshuman Khandual wrote:
From: khand...@linux.vnet.ibm.com khand...@linux.vnet.ibm.com
This patch adds some more elements to the existing PACA dump list
inside a xmon session which can be listed here.
- hmi_event_available
- dscr_default
On Fri, 2015-07-17 at 13:28 +0800, Zumeng Chen wrote:
On 2015年07月17日 12:07, Michael Ellerman wrote:
On Fri, 2015-07-17 at 09:27 +0800, Zumeng Chen wrote:
On 2015年07月16日 17:04, Michael Ellerman wrote:
On Thu, 2015-07-16 at 13:57 +0800, Zumeng Chen wrote:
Hi All,
1028ccf5 did a change
On 07/21/2015 03:51 PM, Michael Ellerman wrote:
On Tue, 2015-21-07 at 06:58:44 UTC, Anshuman Khandual wrote:
From: khand...@linux.vnet.ibm.com khand...@linux.vnet.ibm.com
This patch just simplifies the existing code logic while fetching
the SLB size property from the device tree.
On 07/21/2015 03:30 PM, Michael Ellerman wrote:
On Tue, 2015-21-07 at 06:58:45 UTC, Anshuman Khandual wrote:
From: khand...@linux.vnet.ibm.com khand...@linux.vnet.ibm.com
Value of 'valid' is zero when 'esid' is zero and it does not matter
when 'esid' is non-zero.
Yes it does. It tells
On 07/21/2015 03:16 PM, Michael Ellerman wrote:
On Tue, 2015-21-07 at 06:58:40 UTC, Anshuman Khandual wrote:
From: khand...@linux.vnet.ibm.com khand...@linux.vnet.ibm.com
These are essentially SLB individual slots what we are dealing with
in these functions. Usage of both 'entry' and
On 07/21/2015 03:38 PM, Michael Ellerman wrote:
On Tue, 2015-21-07 at 06:58:46 UTC, Anshuman Khandual wrote:
From: khand...@linux.vnet.ibm.com khand...@linux.vnet.ibm.com
This patch adds some more elements to the existing PACA dump list
inside a xmon session which can be listed here.
Hi Vasant,
On 21.07.2015 07:54, Vasant Hegde wrote:
On 07/20/2015 03:10 AM, Jacek Anaszewski wrote:
Hi Vasant,
Jacek,
I've revised your patch and found few more issues.
Please refer to my comments below.
Thanks.
.../...
Please don't exceed 75 character line length limit.
Ok. I
Move sdhci_get_of_property and other getting property code from
sdhci_esdhc_probe into esdhc_get_property.
Signed-off-by: Yangbo Lu yangbo...@freescale.com
---
drivers/mmc/host/sdhci-of-esdhc.c | 31 +--
1 file changed, 17 insertions(+), 14 deletions(-)
diff --git
On Mon, 2015-22-06 at 21:00:49 UTC, Nathan Fontenot wrote:
Add the ability to dlpar remove CPUs via hotplug rtas events, either by
specifying the drc-index of the CPU to remove or providing a count of cpus
to remove.
To accomplish we create a list of possible dr cpus and their drc indexes
On Tue, 2015-21-07 at 06:58:40 UTC, Anshuman Khandual wrote:
From: khand...@linux.vnet.ibm.com khand...@linux.vnet.ibm.com
These are essentially SLB individual slots what we are dealing with
in these functions. Usage of both 'entry' and 'slot' synonyms makes
it real confusing sometimes. This
On Mon, 2015-22-06 at 21:00:49 UTC, Nathan Fontenot wrote:
Add the ability to dlpar remove CPUs via hotplug rtas events, either by
specifying the drc-index of the CPU to remove or providing a count of cpus
to remove.
To accomplish we create a list of possible dr cpus and their drc indexes
For T4240-R1.0-R2.0, the HOSTVER register has incorrcet vender
version value and sdhc spec version value. This will break down
the ADMA data transfer. So add workaround to get right value
VVN=0x13, SVN = 0x1.
Signed-off-by: Yangbo Lu yangbo...@freescale.com
---
drivers/mmc/host/sdhci-esdhc.h
From: khand...@linux.vnet.ibm.com khand...@linux.vnet.ibm.com
Value of 'valid' is zero when 'esid' is zero and it does not matter
when 'esid' is non-zero. Hence the variable 'value' can be dropped
from the conditional statement. This patch does that.
Signed-off-by: Anshuman Khandual
From: khand...@linux.vnet.ibm.com khand...@linux.vnet.ibm.com
This patch just simplifies the existing code logic while fetching
the SLB size property from the device tree.
Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com
---
arch/powerpc/kernel/prom.c | 12 +---
1 file
From: khand...@linux.vnet.ibm.com khand...@linux.vnet.ibm.com
This patch adds some documentation to 'patch_slb_encoding' function
explaining about how it clears the existing immediate value in the
given instruction and inserts a new one there.
Signed-off-by: Anshuman Khandual
The function alloc_pages_exact_node() was introduced in 6484eb3e2a81 (page
allocator: do not check NUMA node ID when the caller knows the node is valid)
as an optimized variant of alloc_pages_node(), that doesn't allow the node id
to be -1. Unfortunately the name of the function can easily suggest
On 07/21/2015 11:24 AM, Vasant Hegde wrote:
On 07/20/2015 03:10 AM, Jacek Anaszewski wrote:
Hi Vasant,
Jacek,
I've revised your patch and found few more issues.
Please refer to my comments below.
Thanks.
.../...
Please don't exceed 75 character line length limit.
Ok. I will
From: khand...@linux.vnet.ibm.com khand...@linux.vnet.ibm.com
This patch adds the following helper functions to improve modularization
and readability of the code.
(1) slb_invalid_all:Invalidates entire SLB
(2) slb_invalid_paca_slots: Invalidate SLB entries present in PACA
(3)
On 07/13/2015 01:46 PM, Anshuman Khandual wrote:
This patch enables facility unavailable exceptions for generic facility,
FPU, ALTIVEC and VSX in /proc/interrupts listing by incrementing their
newly added IRQ statistical counters as and when these exceptions happen.
This also adds couple of
On Tue, Jul 21, 2015 at 6:43 PM, Ulf Hansson ulf.hans...@linaro.org wrote:
On 19 June 2015 at 14:28, Suman Tripathi stripa...@apm.com wrote:
Hi ,
On Fri, Jun 19, 2015 at 5:30 PM, Suman Tripathi stripa...@apm.com wrote:
This patch disables the 1.8V signaling for arasan 4.9a version
of SDHCI
On Mon, 2015-07-20 at 13:33 +, Madalin-Cristian Bucur wrote:
-Original Message-
From: Joakim Tjernlund [mailto:joakim.tjernl...@transmode.se]
Sent: Monday, July 20, 2015 3:57 PM
To: net...@vger.kernel.org; Liberman Igal-B31950; Bucur Madalin-Cristian-
B32716
Cc:
From: Hou Zhiqiang b48...@freescale.com
The c293pcie board is an endpoint device, and it does't need PM.
Signed-off-by: Hou Zhiqiang b48...@freescale.com
---
arch/powerpc/platforms/85xx/c293pcie.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/platforms/85xx/c293pcie.c
On 21 July 2015 at 11:45, Yangbo Lu yangbo...@freescale.com wrote:
For T4240-R1.0-R2.0, the HOSTVER register has incorrcet vender
version value and sdhc spec version value. This will break down
the ADMA data transfer. So add workaround to get right value
VVN=0x13, SVN = 0x1.
So
On 19 June 2015 at 14:28, Suman Tripathi stripa...@apm.com wrote:
Hi ,
On Fri, Jun 19, 2015 at 5:30 PM, Suman Tripathi stripa...@apm.com wrote:
This patch disables the 1.8V signaling for arasan 4.9a version
of SDHCI controller with the help SDHCI_QUIRK2_NO_1_8_V quirk.
Signed-off-by: Suman
On Tue, 21 Jul 2015, Vlastimil Babka wrote:
The function alloc_pages_exact_node() was introduced in 6484eb3e2a81 (page
allocator: do not check NUMA node ID when the caller knows the node is valid)
as an optimized variant of alloc_pages_node(), that doesn't allow the node id
to be -1.
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