Re: [PATCH 2/6] cxlflash: Cache owning adapter within context

Acked-by: Manoj N. Kumar On 8/9/2016 6:39 PM, Matthew R. Ochs wrote: The context removal routine requires access to the owning adapter structure to reset the context within the AFU as part of the tear down sequence. In order to support kref adoption, the owning

[RFC/PATCH 1/2] cpuidle: Allow idle-states to be disabled at start

From: "Gautham R. Shenoy" Currently all the idle states registered by a cpu-idle driver are enabled by default. This patch adds a mechanism which allows the driver to hint if an idle-state should start in a disabled state. The cpu-idle core will use this hint to

Re: [PATCH v2] powerpc: move hmi.c to arch/powerpc/kvm/

On Thu, 2016-08-18 at 10:53 +0200, Paolo Bonzini wrote: > > On 11/08/2016 15:07, Paolo Bonzini wrote: > > > > hmi.c functions are unused unless sibling_subcore_state is nonzero, > > and > > that in turn happens only if KVM is in use.  So move the code to > > arch/powerpc/kvm/, putting it under

[RFC/PATCH 0/2] powernv:cpuidle: Enable winkle idle state

From: "Gautham R. Shenoy" Hi, The patches in these series enable support for Winkle idle state in CPU-Idle. The first patch is a platform-independent CPU-Idle patch that allows CPU-Idle states to be disabled at start (Currently they are all enabled by default). The

Re: [PATCH] cxl: use pcibios_free_controller_deferred() when removing vPHBs

Acked-by: Ian Munsie

[PATCH v5 0/7] perf: Cross arch annotate + few miscellaneous fixes

Currently Perf annotate support code navigation (branches and calls) only when run on the same architecture where perf.data was recorded. But, for example, record on powerpc server and annotate on client's x86 desktop is not supported. This patchset enables cross arch annotate. Currently I've

[PATCH 04/13] KVM: PPC: Book3S HV: Introduce kvmppc_passthru_irqmap

From: Suresh Warrier This patch introduces an IRQ mapping structure, the kvmppc_passthru_irqmap structure that is to be used to map the real hardware IRQ in the host with the virtual hardware IRQ (gsi) that is injected into a guest by KVM for passthrough adapters.

[PATCH 03/13] KVM: PPC: select IRQ_BYPASS_MANAGER

From: Suresh Warrier Select IRQ_BYPASS_MANAGER for PPC when CONFIG_KVM is set. Add the PPC producer functions for add and del producer. [pau...@ozlabs.org - Moved new functions from book3s.c to powerpc.c so booke compiles; added kvm_arch_has_irq_bypass

[PATCH 13/13] KVM: PPC: Book3S HV: Counters for passthrough IRQ stats

From: Suresh Warrier Add VCPU stat counters to track affinity for passthrough interrupts. pthru_all: Counts all passthrough interrupts whose IRQ mappings are in the kvmppc_passthru_irq_map structure. pthru_host: Counts all cached passthrough interrupts

Re: [PATCH 4/6] cxlflash: Transition to application close model

Acked-by: Manoj N. Kumar On 8/9/2016 6:39 PM, Matthew R. Ochs wrote: Caching the adapter file descriptor and performing a close on behalf of an application is a poor design. This is due to the fact that once a file descriptor in installed, it is free to be altered

[PATCH v5 7/7] perf annotate: Fix jump target outside of function address range

If jump target is outside of function range, perf is not handling it correctly. Especially when target address is lesser than function start address, target offset will be negative. But, target address declared to be unsigned, converts negative number into 2's complement. See below example. Here

[PATCH 09/13] KVM: PPC: Book3S HV: Dump irqmap in debugfs

From: Suresh Warrier Dump the passthrough irqmap structure associated with a guest as part of /sys/kernel/debug/powerpc/kvm-xics-*. Signed-off-by: Suresh Warrier Signed-off-by: Paul Mackerras ---

[PATCH 07/13] KVM: PPC: Book3S HV: Handle passthrough interrupts in guest

From: Suresh Warrier Currently, KVM switches back to the host to handle any external interrupt (when the interrupt is received while running in the guest). This patch updates real-mode KVM to check if an interrupt is generated by a passthrough adapter that is owned by

Re: [PATCH v3 19/21] powerpc: tm: Always use fp_state and vr_state to store live registers

On Wed, Aug 17, 2016 at 01:43:21PM +1000, Cyril Bur wrote: > There is currently an inconsistency as to how the entire CPU register > state is saved and restored when a thread uses transactional memory > (TM). > > Using transactional memory results in the CPU having duplicated > (almost all) of

[PATCH v5 6/7] perf annotate: Support jump instruction with target as second operand

Current perf is not able to parse jump instruction when second operand contains target address. Arch like powerpc has such instructions. For example, 'beq cr7,10173e60'. Signed-off-by: Ravi Bangoria --- Changes in v5: - New patch tools/perf/util/annotate.c

[PATCH 02/13] KVM: PPC: Book3S HV: Convert kvmppc_read_intr to a C function

From: Suresh Warrier Modify kvmppc_read_intr to make it a C function. Because it is called from kvmppc_check_wake_reason, any of the assembler code that calls either kvmppc_read_intr or kvmppc_check_wake_reason now has to assume that the volatile registers might have

Re: linux-next: build warnings after merge of the kbuild tree

Hi Nick, On Thu, 18 Aug 2016 11:09:48 +1000 Nicholas Piggin wrote: > > On Wed, 17 Aug 2016 14:59:59 +0200 > Michal Marek wrote: > > > On 2016-08-17 03:44, Stephen Rothwell wrote: > > > > > > After merging the kbuild tree, today's linux-next build (powerpc

Re: linux-next: build warnings after merge of the kbuild tree

On Fri, 19 Aug 2016 15:09:14 +1000 Stephen Rothwell wrote: > Hi Nick, > > On Fri, 19 Aug 2016 13:38:54 +1000 Stephen Rothwell > wrote: > > > > On Thu, 18 Aug 2016 11:09:48 +1000 Nicholas Piggin > > wrote: > > > > > > On Wed,

[PATCH v5 3/7] perf annotate: Add support for powerpc

From: "Naveen N. Rao" Current perf can disassemble annotated function but it does not have parsing logic for powerpc instructions. So all navigation options are not available for powerpc. Apart from that, Powerpc has long list of branch instructions and

[PATCH 05/13] powerpc/powernv: Provide facilities for EOI, usable from real mode

From: Suresh Warrier This adds a new function pnv_opal_pci_msi_eoi() which does the part of end-of-interrupt (EOI) handling of an MSI which involves doing an OPAL call. This function can be called in real mode. This doesn't just export pnv_ioda2_msi_eoi() because

Re: linux-next: build warnings after merge of the kbuild tree

Hi Nick, On Fri, 19 Aug 2016 13:38:54 +1000 Stephen Rothwell wrote: > > On Thu, 18 Aug 2016 11:09:48 +1000 Nicholas Piggin wrote: > > > > On Wed, 17 Aug 2016 14:59:59 +0200 > > Michal Marek wrote: > > > > > On 2016-08-17 03:44,

[PATCH v5 1/7] perf: Define macro for normalized arch names

Define macro for each normalized arch name and use them instead of using arch name as string. Signed-off-by: Ravi Bangoria --- Changes in v5: - No changes. tools/perf/arch/common.c | 36 ++-- tools/perf/arch/common.h

[PATCH v5 5/7] perf annotate: Show raw form for jump instruction with indirect target

For jump instructions that does not include target address as direct operand, use raw value for that. This is needed for certain powerpc jump instructions that use target address in a register (such as bctr, btar, ...). Suggested-by: Michael Ellerman Signed-off-by: Ravi

[PATCH 11/13] KVM: PPC: Book3S HV: Update irq stats for IRQs handled in real mode

From: Suresh Warrier When a passthrough IRQ is handled completely within KVM real mode code, it has to also update the IRQ stats since this does not go through the generic IRQ handling code. However, the per CPU kstat_irqs field is an allocated (not static) field and

[PATCH 12/13] KVM: PPC: Book3S HV: Set server for passed-through interrupts

When a guest has a PCI pass-through device with an interrupt, it will direct the interrupt to a particular guest VCPU. In fact the physical interrupt might arrive on any CPU, and then get delivered to the target VCPU in the emulated XICS (guest interrupt controller), and eventually delivered to

[PATCH v5 2/7] perf annotate: Add cross arch annotate support

Change current data structures and function to enable cross arch annotate. Current perf implementation does not support cross arch annotate. To make it truly cross arch, instruction table of all arch should be present in perf binary. And use appropriate table based on arch where perf.data was

[PATCH 01/13] powerpc: Add simple cache inhibited MMIO accessors

From: Suresh Warrier Add simple cache inhibited accessors for memory mapped I/O. Unlike the accessors built from the DEF_MMIO_* macros, these don't include any hardware memory barriers, callers need to manage memory barriers on their own. These can only be called in

[PATCH 00/13] Real-mode acceleration of device interrupts in HV KVM

This patch set reduces the latency for presenting interrupts from PCI pass-through devices to a Book3S HV guest. Currently, if an interrupt arrives from a PCI pass-through device while a guest is running, it causes an exit of all threads on the core to the host, where the interrupt is handled by

[PATCH 10/13] KVM: PPC: Book3S HV: Tunable to disable KVM IRQ bypass

From: Suresh Warrier Add a module parameter kvm_irq_bypass for kvm_hv.ko to disable IRQ bypass for passthrough interrupts. The default value of this tunable is 1 - that is enable the feature. Since the tunable is used by built-in kernel code, we use the

[PATCH 08/13] KVM: PPC: Book3S HV: Complete passthrough interrupt in host

From: Suresh Warrier In existing real mode ICP code, when updating the virtual ICP state, if there is a required action that cannot be completely handled in real mode, as for instance, a VCPU needs to be woken up, flags are set in the ICP to indicate the required

Re: [PATCH 0/6] cxlflash: Improvements and cleanup

> "Matthew" == Matthew R Ochs writes: Matthew> This patch set contains various code improvements and cleanups Matthew> that were inspired by Al Viro upon reviewing the cxlflash Matthew> driver. The core improvement is that the driver will no longer Matthew> cache

[PATCH v5 4/7] perf annotate: Do not ignore call instruction with indirect target

Do not ignore call instruction with indirect target when its already identified as a call. This is an extension of commit e8ea1561952b ("perf annotate: Use raw form for register indirect call instructions") to generalize annotation for all instructions with indirect calls. This is needed for

[PATCH 06/13] KVM: PPC: Book3S HV: Enable IRQ bypass

From: Suresh Warrier Add the irq_bypass_add_producer and irq_bypass_del_producer functions. These functions get called whenever a GSI is being defined for a guest. They create/remove the mapping between host real IRQ numbers and the guest GSI. Add the following

[RFC/PATCH 2/2] powernv:cpuidle: Enable winkle idle state in CPU-Idle.

From: "Gautham R. Shenoy" cpu-idle on powernv currently has support for only snooze, nap and fastsleep states. Winkle idle state was excluded due to its large exit-latency. This patch adds winkle as a cpu-idle state for experimental purposes. This state is disabled at

Re: [PATCH] powerpc/8xx: use SPRN_EIE and SPRN_EID to enable/disable interrupts

On Thu, Aug 18, 2016 at 06:52:47PM +0200, Christophe Leroy wrote: > Le 18/08/2016 à 18:34, Segher Boessenkool a écrit : > >On Thu, Aug 18, 2016 at 05:56:02PM +0200, Christophe Leroy wrote: > >>The 8xx has two special registers called EID (External Interrupt > >>Disable) and EIE (External Interrupt

Re: [PowerPC] today's main line failed to build on PowerPC

On Thursday18 August 2016 11:50 AM, Abdul Haleem wrote: Hi, The main line stable 4.8.0-rc2 failed to build on PowerPC with following build errors. config : pseries_le_defconfig Machine Type : PowerPC Bare Metal My mistake, The build is failing on the attached config and not for

Re: [PATCH v2 2/2] kexec: extend kexec_file_load system call

Since Eric was objecting the extension, I think you should convince him, but I will review from code point of view. On 08/11/16 at 08:03pm, Thiago Jung Bauermann wrote: > From: AKASHI Takahiro > > Device tree blob must be passed to a second kernel on DTB-capable >

[PowerPC] today's main line failed to build on PowerPC

Hi, The main line stable 4.8.0-rc2 failed to build on PowerPC with following build errors. config : pseries_le_defconfig Machine Type : PowerPC Bare Metal 09:34:22 00:04:59 INFO | make -j 160 vmlinux 09:34:24 00:05:01 ERROR| [stderr] arch/powerpc/mm/hash_low_32.S: Assembler messages:

[PATCH] cxl: use pcibios_free_controller_deferred() when removing vPHBs

When cxl removes a vPHB, it's possible that the pci_controller may be freed before all references to the devices on the vPHB have been released. This in turn causes an invalid memory access when the devices are eventually released, as pcibios_release_device() attempts to call the phb's

Re: [PATCH v2] powerpc: move hmi.c to arch/powerpc/kvm/

On 11/08/2016 15:07, Paolo Bonzini wrote: > hmi.c functions are unused unless sibling_subcore_state is nonzero, and > that in turn happens only if KVM is in use. So move the code to > arch/powerpc/kvm/, putting it under CONFIG_KVM_BOOK3S_HV_POSSIBLE > rather than CONFIG_PPC_BOOK3S_64. The

Re: [PATCH v2 1/2] kexec: add dtb info to struct kimage

On 08/11/16 at 08:03pm, Thiago Jung Bauermann wrote: > From: AKASHI Takahiro > > Device tree blob must be passed to a second kernel on DTB-capable > archs, like powerpc and arm64, but the current kernel interface > lacks this support. > > This patch adds dtb buffer

Re: [PATCH v2 3/6] kexec_file: Allow skipping checksum calculation for some segments.

On 08/13/16 at 12:18am, Thiago Jung Bauermann wrote: > Adds checksum argument to kexec_add_buffer specifying whether the given > segment should be part of the checksum calculation. > Since it is used with add buffer, could it be added to kbuf as a new field? Like kbuf.no_checksum, default value

Re: debug problems on ppc 83xx target due to changed struct task_struct

Le 17/08/2016 à 17:27, Holger Brunck a écrit : On 16/08/16 19:27, christophe leroy wrote: Le 15/08/2016 à 18:19, Dave Hansen a écrit : On 08/15/2016 07:35 AM, Holger Brunck wrote: I tried this but unfortunately the error only occurs while remote debugging. Locally with gdb everything works

[PATCH] powerpc/8xx: fix single_step debug

SPRN_ICR must be read for clearing the internal freeze signal which is asserted by the single step exception, otherwise the timebase and decrementer remain freezed Signed-off-by: Christophe Leroy --- arch/powerpc/include/asm/reg_8xx.h | 1 + arch/powerpc/kernel/traps.c

Re: [PATCH] powerpc/8xx: fix single_step debug

Le 18/08/2016 à 11:58, Gabriel Paubert a écrit : On Thu, Aug 18, 2016 at 11:44:20AM +0200, Christophe Leroy wrote: SPRN_ICR must be read for clearing the internal freeze signal which is asserted by the single step exception, otherwise the timebase and decrementer remain freezed Minor nit:

Re: [PATCH v2 0/2] extend kexec_file_load system call

On Thu, Aug 11, 2016 at 08:03:56PM -0300, Thiago Jung Bauermann wrote: > This patch series is from AKASHI Takahiro. I will use it in my next > version of the kexec_file_load implementation for powerpc, so I am > rebasing it on top of v4.8-rc1. [...] > Original cover letter: > > Device tree blob

Re: [PATCH] powerpc/8xx: fix single_step debug

On Thu, Aug 18, 2016 at 11:44:20AM +0200, Christophe Leroy wrote: > SPRN_ICR must be read for clearing the internal freeze signal which > is asserted by the single step exception, otherwise the timebase and > decrementer remain freezed Minor nit: s/freezed/frozen/ If the timebase and decrementer

Re: [PATCH] powerpc/8xx: fix single_step debug

On Thu, Aug 18, 2016 at 12:13:21PM +0200, Christophe Leroy wrote: > > > Le 18/08/2016 à 11:58, Gabriel Paubert a écrit : > >On Thu, Aug 18, 2016 at 11:44:20AM +0200, Christophe Leroy wrote: > >>SPRN_ICR must be read for clearing the internal freeze signal which > >>is asserted by the single step

Re: [PATCH] powerpc/8xx: fix single_step debug

Le 18/08/2016 à 12:16, Gabriel Paubert a écrit : On Thu, Aug 18, 2016 at 12:13:21PM +0200, Christophe Leroy wrote: Le 18/08/2016 à 11:58, Gabriel Paubert a écrit : On Thu, Aug 18, 2016 at 11:44:20AM +0200, Christophe Leroy wrote: SPRN_ICR must be read for clearing the internal freeze

[PATCH 16/16] powerpc: mmu nohash: Convert to hotplug state machine

Install the callbacks via the state machine. Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Michael Ellerman Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Sebastian Andrzej Siewior ---

[PATCH V4 2/8] powerpc/memory: Parse new memory property to register blocks.

powerpc/memory: Add parallel routines to parse the new property "ibm,dynamic-memory-v2" property when it is present, and then to register the relevant memory blocks with the operating system. This property format is intended to provide a more compact representation of memory when communicating

[PATCH V4 4/8] pseries/hotplug init: Convert new DRC memory property for hotplug runtime

hotplug_init: Simplify the code needed for runtime memory hotplug and maintenance with a conversion routine that transforms the compressed property "ibm,dynamic-memory-v2" to the form of "ibm,dynamic-memory" within the "ibm,dynamic-reconfiguration-memory" property. Thus only a single set of

Re: [PowerPC] today's main line failed to build on PowerPC

On Thu, Aug 18, 2016 at 11:50:28AM +0530, Abdul Haleem wrote: > Hi, > > The main line stable 4.8.0-rc2 failed to build on PowerPC with following > build errors. config : pseries_le_defconfig Machine Type : PowerPC Bare > Metal > > 09:34:22 00:04:59 INFO | make -j 160 vmlinux > 09:34:24 00:05:01

[PATCH V4 3/8] powerpc/memory: Parse new memory property to initialize structures.

powerpc/memory: Add parallel routines to parse the new property "ibm,dynamic-memory-v2" property when it is present, and then to finish initialization of the relevant memory structures with the operating system. This code is shared between the boot-time initialization functions and the runtime

[PATCH 15/16] powerpc: powermac: Convert to hotplug state machine

Install the callbacks via the state machine. I assume here that the powermac has two CPUs and so only one can go up or down at a time. The variable smp_core99_host_open is here to ensure that we do not try to open or close the i2c host twice if something goes wrong and we invoke the prepare or

[PATCH] powerpc/8xx: use SPRN_EIE and SPRN_EID to enable/disable interrupts

The 8xx has two special registers called EID (External Interrupt Disable) and EIE (External Interrupt Enable) for clearing/setting EE in MSR. It avoids the three instructions set mfmsr/ori/mtmsr or mfmsr/rlwinm/mtmsr. We just have to write something in the register to change MSR EE bit. So we

Re: [PowerPC] today's main line failed to build on PowerPC

On Thu, Aug 18, 2016 at 12:48:17PM +0530, Abdul Haleem wrote: > >09:34:24 00:05:01 ERROR| [stderr] arch/powerpc/mm/hash_low_32.S: > >Assembler messages: > >09:34:24 00:05:01 ERROR| [stderr] arch/powerpc/mm/hash_low_32.S:353: > >Error: missing operand > >09:34:24 00:05:01 ERROR| [stderr]

Re: [PATCH] powerpc/8xx: use SPRN_EIE and SPRN_EID to enable/disable interrupts

On Thu, Aug 18, 2016 at 05:56:02PM +0200, Christophe Leroy wrote: > The 8xx has two special registers called EID (External Interrupt > Disable) and EIE (External Interrupt Enable) for clearing/setting > EE in MSR. It avoids the three instructions set mfmsr/ori/mtmsr or > mfmsr/rlwinm/mtmsr. All

[PATCH] ibmvnic: Handle backing device failover and reinitialization

An upcoming feature of IBM VNIC protocol is the ability to configure redundant backing devices for a VNIC client. In case of a failure on the current backing device, the driver will receive a signal from the hypervisor indicating that a failover will occur. The driver will then wait for a message

Re: [PATCH] powerpc/8xx: use SPRN_EIE and SPRN_EID to enable/disable interrupts

Le 18/08/2016 à 18:34, Segher Boessenkool a écrit : On Thu, Aug 18, 2016 at 05:56:02PM +0200, Christophe Leroy wrote: The 8xx has two special registers called EID (External Interrupt Disable) and EIE (External Interrupt Enable) for clearing/setting EE in MSR. It avoids the three instructions

Re: [PATCH] cxl: use pcibios_free_controller_deferred() when removing vPHBs

> On Aug 18, 2016, at 2:35 AM, Andrew Donnellan > wrote: > > When cxl removes a vPHB, it's possible that the pci_controller may be freed > before all references to the devices on the vPHB have been released. This > in turn causes an invalid memory access when the

Re: [PATCH 3/6] cxlflash: Add kref to context

Acked-by: Manoj N. Kumar On 8/9/2016 6:39 PM, Matthew R. Ochs wrote: Currently, context user references are tracked via the list of LUNs that have attached to the context. While convenient, this is not intuitive without a deep study of the code and is inconsistent

Re: [PATCH v2 3/6] kexec_file: Allow skipping checksum calculation for some segments.

Hello Dave, Thanks for your review! [ Trimming down Cc: list a little to try to clear the "too many recipients" mailing list restriction. ] Am Donnerstag, 18 August 2016, 17:03:30 schrieb Dave Young: > On 08/13/16 at 12:18am, Thiago Jung Bauermann wrote: > > Adds checksum argument to