Re: [PATCH kernel v3] KVM: PPC: Add in-kernel acceleration for VFIO

On 12/01/17 16:04, David Gibson wrote: > On Tue, Dec 20, 2016 at 05:52:29PM +1100, Alexey Kardashevskiy wrote: >> This allows the host kernel to handle H_PUT_TCE, H_PUT_TCE_INDIRECT >> and H_STUFF_TCE requests targeted an IOMMU TCE table used for VFIO >> without passing them to user space which

Re: [PATCH v2 7/7] uapi: export all headers under uapi directories

On Thu, Jan 12, 2017 at 05:32:09PM +0100, Nicolas Dichtel wrote: > What I was trying to say is that I export those directories like other are. > Removing those files is not related to that series. Perhaps the correct solution is to only copy files matching "*.h" to reduce the risk of copying

Re: [PATCH v5 2/5] powernv:stop: Uniformly rename power9 to arch300

On Thu, Jan 12, 2017 at 03:17:33PM +0530, Balbir Singh wrote: > On Tue, Jan 10, 2017 at 02:37:01PM +0530, Gautham R. Shenoy wrote: > > From: "Gautham R. Shenoy" > > > > Balbir pointed out that in idle_book3s.S and powernv/idle.c some > > functions and variables had

Re: [PATCH v5 2/5] powernv:stop: Uniformly rename power9 to arch300

On Fri, Jan 13, 2017 at 2:44 PM, Gautham R Shenoy wrote: > On Thu, Jan 12, 2017 at 03:17:33PM +0530, Balbir Singh wrote: >> On Tue, Jan 10, 2017 at 02:37:01PM +0530, Gautham R. Shenoy wrote: >> > From: "Gautham R. Shenoy" >> > >> > Balbir pointed

Re: [PATCH kernel v3] KVM: PPC: Add in-kernel acceleration for VFIO

On Fri, Jan 13, 2017 at 01:23:46PM +1100, Alexey Kardashevskiy wrote: > On 13/01/17 10:53, David Gibson wrote: > > On Thu, Jan 12, 2017 at 07:09:01PM +1100, Alexey Kardashevskiy wrote: > >> On 12/01/17 16:04, David Gibson wrote: > >>> On Tue, Dec 20, 2016 at 05:52:29PM +1100, Alexey Kardashevskiy

Re: [PATCH v2] pci: hotplug: This patch removes unnecessary return statement using spatch tool

On Thu, Jan 12, 2017 at 2:25 AM, Bjorn Helgaas wrote: > On Sat, Dec 24, 2016 at 03:08:00PM +0530, Rahul Krishnan wrote: > > > > This patch removes unnecessary return statement using spatch tool > > > > Signed-off-by: Rahul Krishnan > > Applied to

Re: [PATCH kernel v3] KVM: PPC: Add in-kernel acceleration for VFIO

On 13/01/17 10:53, David Gibson wrote: > On Thu, Jan 12, 2017 at 07:09:01PM +1100, Alexey Kardashevskiy wrote: >> On 12/01/17 16:04, David Gibson wrote: >>> On Tue, Dec 20, 2016 at 05:52:29PM +1100, Alexey Kardashevskiy wrote: This allows the host kernel to handle H_PUT_TCE,

[PATCH] powerpc: opal-msglog: Report size of memcons log

The OPAL memory console is reported to be size zero, as we do not initialise the struct attr with any size information due to the size being variable. This leads users to think that the console is empty. Instead report the maximum size. Signed-off-by: Joel Stanley ---

Re: [PATCH v4 1/2] KVM: PPC: Add new capability to control MCE behaviour

On Mon, Jan 09, 2017 at 05:10:35PM +0530, Aravinda Prasad wrote: > This patch introduces a new KVM capability to control > how KVM behaves on machine check exception (MCE). > Without this capability, KVM redirects machine check > exceptions to guest's 0x200 vector, if the address in > error

Re: [PATCH kernel v3] KVM: PPC: Add in-kernel acceleration for VFIO

On Thu, Jan 12, 2017 at 07:09:01PM +1100, Alexey Kardashevskiy wrote: > On 12/01/17 16:04, David Gibson wrote: > > On Tue, Dec 20, 2016 at 05:52:29PM +1100, Alexey Kardashevskiy wrote: > >> This allows the host kernel to handle H_PUT_TCE, H_PUT_TCE_INDIRECT > >> and H_STUFF_TCE requests targeted

[PATCH 05/18] powerpc/64: More definitions for POWER9

This adds definitions for bits in the DSISR register which are used by POWER9 for various translation-related exception conditions, and for some more bits in the partition table entry that will be needed by KVM. Signed-off-by: Paul Mackerras ---

[PATCH 13/18] KVM: PPC: Book3S HV: Page table construction and page faults for radix guests

This adds the code to construct the second-level ("partition-scoped" in architecturese) page tables for guests using the radix MMU. Apart from the PGD level, which is allocated when the guest is created, the rest of the tree is all constructed in response to hypervisor page faults. As well as

[PATCH 12/18] KVM: PPC: Book3S HV: Modify guest entry/exit paths to handle radix guests

This adds code to branch around the parts that radix guests don't need - clearing and loading the SLB with the guest SLB contents, flushing the TLB on first entry on each physical CPU, and saving the guest SLB contents on exit. Since the host is now using radix, we need to save and restore the

[PATCH] powerpc/mm: fix a hardcode on memory boundary checking

The offset of hugepage block will not be 16G, if the expected page is more than one. Calculate the totol size instead of the hardcode value. Signed-off-by: Rui Teng --- arch/powerpc/mm/hash_utils_64.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

Re: [PATCH v5 1/5] powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro

On Tue, Jan 10, 2017 at 02:37:00PM +0530, Gautham R. Shenoy wrote: > From: "Gautham R. Shenoy" > > Currently all the low-power idle states are expected to wake up > at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ > that puts the CPU to an idle state

[PATCH 33/37] tools: PCI: Add a userspace tool to test PCI endpoint

Add a userspace tool to invoke the ioctls exposed by the PCI endpoint test driver to perform various PCI tests. Signed-off-by: Kishon Vijay Abraham I --- tools/pci/pcitest.c | 186 +++ 1 file changed, 186 insertions(+) create mode

[PATCH 00/18] Support for radix guest and host on POWER9

The primary purpose of this patch series is to make it possible to run a guest on POWER9 using the radix MMU under a KVM host that also uses the radix MMU. To do this, the guest needs to say that it supports radix in the ibm,client-architecture-support vector, and if the host agrees, the guest

[PATCH 10/18] KVM: PPC: Book3S HV: Set process table for HPT guests on POWER9

This adds the implementation of the KVM_PPC_CONFIGURE_V3_MMU ioctl for HPT guests on POWER9. With this, we can return 1 for the KVM_CAP_PPC_MMU_HASH_V3 capability. Signed-off-by: Paul Mackerras --- arch/powerpc/include/asm/kvm_host.h | 1 + arch/powerpc/kvm/book3s_hv.c

[PATCH 11/18] KVM: PPC: Book3S HV: Add basic infrastructure for radix guests

This adds a field in struct kvm_arch and an inline helper to indicate whether a guest is a radix guest or not, plus a new file to contain the radix MMU code, which currently contains just a translate function which knows how to traverse the guest page tables to translate an address.

[PATCH 09/18] KVM: PPC: Book3S HV: Add userspace interfaces for POWER9 MMU

This adds two capabilities and two ioctls to allow userspace to find out about and configure the POWER9 MMU in a guest. The two capabilities tell userspace whether KVM can support a guest using the radix MMU, or using the hashed page table (HPT) MMU with a process table and segment tables. (Note

Re: [PATCH 2/2] powerpc/64: Add BPF_JIT to powernv and pseries defconfigs

On 2017/01/12 09:17PM, Anton Blanchard wrote: > From: Anton Blanchard > > Commit db9112173b18 ("powerpc: Turn on BPF_JIT in ppc64_defconfig") > only added BPF_JIT to the ppc64 defconfig. Add it to our powernv > and pseries defconfigs too. > > Signed-off-by: Anton Blanchard

[PATCH 27/37] PCI: dwc: dra7xx: Add EP mode support

The PCIe controller integrated in dra7xx SoCs is capable of operating in endpoint mode. Add endpoint mode support to dra7xx driver. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/dwc/Kconfig | 31 +- drivers/pci/dwc/Makefile |4 +-

[PATCH 04/18] powerpc/64: Enable use of radix MMU under hypervisor on POWER9

To use radix as a guest, we first need to tell the hypervisor via the ibm,client-architecture call first that we support POWER9 and architecture v3.00, and that we can do either radix or hash and that we would like to choose later using an hcall (the H_REGISTER_PROC_TBL hcall). Then we need to

[PATCH 03/18] powerpc/64: Always enable radix support for 64-bit Book 3S kernels

This removes the ability for the user to choose whether or not to include support for the radix MMU in kernels built to run on 64-bit Book 3S machines. Excluding radix support saves only about 25kiB of text and 13kiB of data, a total of little over half a page. Having the option expands the space

[PATCH 17/18] KVM: PPC: Book3S HV: Enable radix guest support

This adds a few last pieces of the support for radix guests: * Implement the backends for the KVM_PPC_CONFIGURE_V3_MMU and KVM_PPC_GET_RMMU_INFO ioctls for radix guests * On POWER9, allow secondary threads to be on/off-lined while guests are running. * Set up LPCR and the partition table

Re: [PATCH v5 2/5] powernv:stop: Uniformly rename power9 to arch300

On Tue, Jan 10, 2017 at 02:37:01PM +0530, Gautham R. Shenoy wrote: > From: "Gautham R. Shenoy" > > Balbir pointed out that in idle_book3s.S and powernv/idle.c some > functions and variables had power9 in their names while some others > had arch300. > I would prefer

[PATCH 23/37] PCI: dwc: Add *ops* to start and stop pcie link

Add start_link and stop_link ops in dw_pcie_ops to start or stop the link. This will be used by endpoint functions to start the link once the setup has been done. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/dwc/pcie-designware.h |2 ++ 1 file changed, 2

[PATCH 03/37] PCI: dwc: dra7xx: Populate cpu_addr_fixup ops

Populate cpu_addr_fixup ops to extract the least 28 bits of the corresponding cpu address. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/dwc/pci-dra7xx.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/pci/dwc/pci-dra7xx.c

[PATCH 31/37] misc: Add host side pci driver for pci test function device

Add PCI endpoint test driver that can verify base address register, legacy interrupt/MSI interrupt and read/write/copy buffers between host and device. The corresponding pci-epf-test function driver should be used on the EP side. Signed-off-by: Kishon Vijay Abraham I ---

[PATCH 07/18] powerpc/64: Make type of partition table flush depend on partition type

When changing a partition table entry on POWER9, we do a particular form of the tlbie instruction which flushes all TLBs and caches of the partition table for a given logical partition ID (LPID). This instruction has a field in the instruction word, labelled R (radix), which should be 1 if the

[PATCH 08/18] KVM: PPC: Book3S HV: Don't try to signal cpu -1

If the target vcpu for kvmppc_fast_vcpu_kick_hv() is not running on any CPU, then we will have vcpu->arch.thread_cpu == -1, and as it happens, kvmppc_fast_vcpu_kick_hv will call kvmppc_ipi_thread with -1 as the cpu argument. Although this is not meaningful, in the past, before commit 1704a81ccebc

[PATCH 34/37] tools: PCI: Add sample test script to invoke pcitest

Add a simple test script that invokes the pcitest userspace tool to perform all the PCI endpoint tests (BAR tests, interrupt tests, read tests, write tests and copy tests). Signed-off-by: Kishon Vijay Abraham I --- tools/pci/pcitest.sh | 56

Re: [PATCH v4 2/2] KVM: PPC: Exit guest upon MCE when FWNMI capability is enabled

On Mon, Jan 09, 2017 at 05:10:45PM +0530, Aravinda Prasad wrote: > Enhance KVM to cause a guest exit with KVM_EXIT_NMI > exit reason upon a machine check exception (MCE) in > the guest address space if the KVM_CAP_PPC_FWNMI > capability is enabled (instead of delivering a 0x200 > interrupt to

[PATCH 18/18] KVM: PPC: Book3S HV: Use ASDR for HPT guests on POWER9

POWER9 adds a register called ASDR (Access Segment Descriptor Register), which is set by hypervisor data/instruction storage interrupts to contain the segment descriptor for the address being accessed, assuming the guest is using HPT translation. (For radix guests, it contains the guest real

Re: [PATCH v5 3/5] cpuidle:powernv: Add helper function to populate powernv idle states.

On Tue, Jan 10, 2017 at 02:37:02PM +0530, Gautham R. Shenoy wrote: > From: "Gautham R. Shenoy" > > In the current code for powernv_add_idle_states, there is a lot of code > duplication while initializing an idle state in powernv_states table. > > Add an inline helper

Re: [PATCH v4 2/2] KVM: PPC: Exit guest upon MCE when FWNMI capability is enabled

On Thursday 12 January 2017 02:35 PM, Balbir Singh wrote: > On Mon, Jan 09, 2017 at 05:10:45PM +0530, Aravinda Prasad wrote: [ . . .] >> The reasons for this approach is (i) it is not possible >> to distinguish whether the exception occurred in the >> guest or the host from the pt_regs passed

[PATCH 05/37] PCI: dwc: Add platform_set_drvdata

Add platform_set_drvdata in all designware based drivers to store the private data structure of the driver so that dev_set_drvdata can be used to get back private data pointer in add_pcie_port/host_init. This is in preparation for splitting struct pcie_port into core and host only structures.

[PATCH 13/37] PCI: dwc: Remove dependency of designware to CONFIG_PCI

CONFIG_PCI is used to enable the host mode PCI. In preparation for adding endpoint mode support to designware driver, remove the dependency of designware to CONFIG_PCI and make only the host specific part depend on CONFIG_PCI. Signed-off-by: Kishon Vijay Abraham I ---

[PATCH 37/37] ARM: dts: DRA7: Add pcie1 dt node for EP mode

Add pcie1 dt node in order for the controller to operate in endpoint mode. However since none of the dra7 based boards have slots configured to operate in endpoint mode, keep EP mode disabled. Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/am572x-idk.dts

[PATCH 01/18] powerpc/64: Don't try to use radix MMU under a hypervisor

Currently, if the kernel is running on a POWER9 processor under a hypervisor, it will try to use the radix MMU even though it doesn't have the necessary code to use radix under a hypervisor (it doesn't negotiate use of radix, and it doesn't do the H_REGISTER_PROC_TBL hcall). The result is that

[PATCH 02/18] powerpc/64: Fixes for the ibm, client-architecture-support options

This fixes the values for some of the option vector 5 bits in the ibm,client-architecture-support vector 5. The "platform facilities options" bits are in byte 17 not byte 14, so the upper 8 bits of their definitions need to be 0x11 not 0x0E. The "sub processor support" option is in byte 21 not

[PATCH 15/18] KVM: PPC: Book3S HV: Implement dirty page logging for radix guests

This adds code to keep track of dirty pages when requested (that is, when memslot->dirty_bitmap is non-NULL) for radix guests. We use the dirty bits in the PTEs in the second-level (partition-scoped) page tables, together with a bitmap of pages that were dirty when their PTE was invalidated

[PATCH 14/18] KVM: PPC: Book3S HV: MMU notifier callbacks for radix guests

This adapts our implementations of the MMU notifier callbacks (unmap_hva, unmap_hva_range, age_hva, test_age_hva, set_spte_hva) to call radix functions when the guest is using radix. These implementations are much simpler than for HPT guests because we have only one PTE to deal with, so we don't

[PATCH 2/2] powerpc/64: Add BPF_JIT to powernv and pseries defconfigs

From: Anton Blanchard Commit db9112173b18 ("powerpc: Turn on BPF_JIT in ppc64_defconfig") only added BPF_JIT to the ppc64 defconfig. Add it to our powernv and pseries defconfigs too. Signed-off-by: Anton Blanchard --- arch/powerpc/configs/powernv_defconfig |

[PATCH 1/2] powerpc/64: Move HAVE_CONTEXT_TRACKING from pseries to common Kconfig

From: Anton Blanchard We added support for HAVE_CONTEXT_TRACKING, but placed the option inside PPC_PSERIES. This has the undesirable effect that NO_HZ_FULL can be enabled on a kernel with both powernv and pseries support, but cannot on a kernel with powernv only support.

[PATCH 32/37] Documentation: misc-devices: Add Documentation for pci-endpoint-test driver

Add Documentation for pci-endpoint-test driver. Signed-off-by: Kishon Vijay Abraham I --- Documentation/misc-devices/pci-endpoint-test.txt | 35 ++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/misc-devices/pci-endpoint-test.txt diff

[PATCH 00/37] PCI: Support for configurable PCI endpoint

The RFC series that was sent before this patch series can be found at [1]. The patches are split here so that it can be better reviewed. This main purpose of this patch series is to *) add PCI endpoint core layer *) modifie designware/dra7xx driver to be configured in EP mode *) add a PCI

[PATCH 25/37] dt-bindings: PCI: Add dt bindings for pci designware EP mode

Add device tree binding documentation for pci designware EP mode. Signed-off-by: Kishon Vijay Abraham I --- .../devicetree/bindings/pci/designware-pcie.txt| 26 ++-- 1 file changed, 18 insertions(+), 8 deletions(-) diff --git

[PATCH 06/18] powerpc/64: Export pgtable_cache and pgtable_cache_add for KVM

This exports the pgtable_cache array and the pgtable_cache_add function so that HV KVM can use them for allocating radix page tables for guests. Signed-off-by: Paul Mackerras --- arch/powerpc/mm/init-common.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git

[PATCH 16/18] KVM: PPC: Book3S HV: Make HPT-specific hypercalls return error in radix mode

If the guest is in radix mode, then it doesn't have a hashed page table (HPT), so all of the hypercalls that manipulate the HPT can't work and should return an error. This adds checks to make them return H_FUNCTION ("function not supported"). Signed-off-by: Paul Mackerras ---

Re: bootx_init.c:88: undefined reference to `__stack_chk_fail_local'

Le 12/01/2017 à 08:52, Christophe LEROY a écrit : Le 11/01/2017 à 23:54, Segher Boessenkool a écrit : On Tue, Jan 10, 2017 at 07:26:15AM +0100, Christophe LEROY wrote: Maybe ppc32 is not supposed to be built with CC_STACKPROTECTOR ? Indeed, the latest versions of GCC don't use anymore the

[PATCH -next] powerpc/pseries: Fix typo in parameter description

From: Wei Yongjun Fix typo in parameter description. Signed-off-by: Wei Yongjun --- arch/powerpc/platforms/pseries/cmm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/platforms/pseries/cmm.c

[PATCH 18/37] Documentation: PCI: Add specification for the *pci test* function device

Add specification for the *pci test* virtual function device. The endpoint function driver and the host pci driver should be created based on this specification. Signed-off-by: Kishon Vijay Abraham I --- Documentation/PCI/00-INDEX |2 +

[PATCH 07/37] PCI: dwc: designware: Get device pointer at the start of dw_pcie_host_init

No functional change. Get device pointer at the beginning of dw_pcie_host_init instead of getting it all over dw_pcie_host_init. This is in preparation for splitting struct pcie_port into host and core structures (Once split pcie_port will not have device pointer). Signed-off-by: Kishon Vijay

[PATCH 20/37] Documentation: PCI: Add binding documentation for pci-test endpoint function

Add binding documentation for pci-test endpoint function that helps in adding and configuring pci-test endpoint function. Signed-off-by: Kishon Vijay Abraham I --- Documentation/PCI/00-INDEX |2 ++ .../PCI/endpoint/function/binding/pci-test.txt |

[PATCH 01/37] PCI: dwc: dra7xx: Group all host related setup in add_pcie_port

commit 150645b94348 ("PCI: dra7xx: Move struct pcie_port setup to probe function") moved host related setup to the probe function. However instead of cluttering the probe function with host related setup, group all host related setup in add_pcie_port function. This way when endpoint support is

[PATCH 10/37] PCI: dwc: designware: Fix style errors in pcie-designware.c

No functional change. Fix all checkpatch warnings and check errors in pcie-designware.c Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/dwc/pcie-designware.c | 42 ++--- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git

[PATCH 09/37] PCI: dwc: designware: Parse *num-lanes* property in dw_pcie_setup_rc

*num-lanes* dt property is parsed in dw_pcie_host_init. However *num-lanes* property is applicable to both root complex mode and endpoint mode. As a first step, move the parsing of this property outside dw_pcie_host_init. This is in preparation for splitting pcie-designware.c to pcie-designware.c

[PATCH 02/37] PCI: dwc: designware: Add new *ops* for cpu addr fixup

Some platforms (like dra7xx) require only the least 28 bits of the corresponding 32 bit CPU address to be programmed in the address translation unit. This modified address is stored in io_base/mem_base/ cfg0_base/cfg1_base in dra7xx_pcie_host_init. While this is okay for host mode where the

[PATCH 21/37] PCI: dwc: Modify dbi accessors to take dbi_base as argument

dwc has 2 dbi address space labelled dbics and dbics2. The existing helper to access dbi address space can access only dbics. However dbics2 has to be accessed for programming the BAR registers in the case of EP mode. This is in preparation for adding EP mode support to dwc driver. Signed-off-by:

[PATCH 12/37] PCI: dwc: Create a new config symbol to enable pci dwc host

Now that pci designware host has a separate file, create a new config symbol to select the host only driver. This is in preparation to enable endpoint support to designware driver. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/dwc/Kconfig | 26

[PATCH 24/37] PCI: dwc: designware: Add EP mode support

Add endpoint mode support to designware driver. This uses the EP Core layer introduced recently to add endpoint mode support. *Any* function driver can now use this designware device in order to achieve the EP functionality. Signed-off-by: Kishon Vijay Abraham I ---

[PATCH 17/37] Documentation: PCI: Guide to use pci endpoint configfs

Add Documentation to help users use pci endpoint to configure pci endpoint function and to bind the endpoint function with endpoint controller. Signed-off-by: Kishon Vijay Abraham I --- Documentation/PCI/00-INDEX |2 +

[PATCH 30/37] dt-bindings: PCI: dra7xx: Add dt bindings to enable legacy mode

Update device tree binding documentation of TI's dra7xx PCI controller to include property for enabling legacy mode. Signed-off-by: Kishon Vijay Abraham I --- Documentation/devicetree/bindings/pci/ti-pci.txt |4 1 file changed, 4 insertions(+) diff --git

[PATCH 16/37] PCI: endpoint: Introduce configfs entry for configuring EP functions

Introduce a new configfs entry to configure the EP function (like configuring the standard configuration header entries) and to bind the EP function with EP controller. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/endpoint/Kconfig |4 +-

[PATCH 15/37] Documentation: PCI: Guide to use PCI Endpoint Core Layer

Add Documentation to help users use endpoint library to enable endpoint mode in the PCI controller and add new PCI endpoint functions. Signed-off-by: Kishon Vijay Abraham I --- Documentation/PCI/00-INDEX |2 + Documentation/PCI/endpoint/pci-endpoint.txt |

[PATCH 06/37] PCI: dwc: Rename cfg_read/cfg_write to read/write

No functional change. dw_pcie_cfg_read/dw_pcie_cfg_write doesn't do anything specific to access configuration space. It can be just renamed to dw_pcie_read/dw_pcie_write and used to read/write data to dbi space. This is in preparation for added endpoint support to linux kernel. Cc: Jingoo Han

[PATCH 28/37] dt-bindings: PCI: dra7xx: Add dt bindings for pci dra7xx EP mode

Add device tree binding documentation for pci dra7xx EP mode. Signed-off-by: Kishon Vijay Abraham I --- Documentation/devicetree/bindings/pci/ti-pci.txt | 37 ++ 1 file changed, 30 insertions(+), 7 deletions(-) diff --git

[PATCH 11/37] PCI: dwc: Split pcie-designware.c into host and core files

Split pcie-designware.c into pcie-designware-host.c that contains the host specific parts of the driver and pcie-designware.c that contains the parts used by both host driver and endpoint driver. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/dwc/Makefile |

[RFT PATCH 08/37] PCI: dwc: Split *struct pcie_port* into host only and core structures

Keep only the host specific members in *struct pcie_port* and move the common members (i.e common to both host and endpoint) to *struct dw_pcie*. This is in preparation for adding endpoint mode support to designware driver. While at that also fix checkpatch warnings. Cc: Jingoo Han

[PATCH 29/37] PCI: dwc: dra7xx: Workaround for errata id i870

According to errata i870, access to the PCIe slave port that are not 32-bit aligned will result in incorrect mapping to TLP Address and Byte enable fields. Accessing non 32-bit aligned data causes incorrect data in the target buffer if memcpy is used. Implement the workaround for this errata

[PATCH 04/37] PCI: dwc: designware: Move the register defines to designware header file

No functional change. Move the register defines and other macros from pcie-designware.c to pcie-designware.h. This is in preparation to split the pcie-designware.c file into designware core file and host specific file. While at that also fix a checkpatch warning. Signed-off-by: Kishon Vijay

[PATCH 22/37] PCI: dwc: Modify dbi accessors to access data of 4/2/1 bytes

Previously dbi accessors can be used to access data of size 4 bytes. But there might be situations (like accessing MSI_MESSAGE_CONTROL in order to set/get the number of required MSI interrupts in EP mode) where dbi accessors must be used to access data of size 2. This is in preparation for adding

[PATCH 26/37] PCI: dwc: dra7xx: Facilitate wrapper and msi interrupts to be enabled independently

No functional change. Split dra7xx_pcie_enable_interrupts into dra7xx_pcie_enable_wrapper_interrupts and dra7xx_pcie_enable_msi_interrupts so that wrapper interrupts and msi interrupts can be enabled independently. This is in preparation for adding EP mode support to dra7xx driver since EP mode

[PATCH 14/37] PCI: endpoint: Add EP core layer to enable EP controller and EP functions

Introduce a new EP core layer in order to support endpoint functions in linux kernel. This comprises of EPC library (Endpoint Controller Library) and EPF library (Endpoint Function Library). EPC library implements functions that is specific to an endpoint controller and EPF library implements

[PATCH 35/37] MAINTAINERS: add PCI EP maintainer

Add maintainer for the newly introduced PCI EP framework. Signed-off-by: Kishon Vijay Abraham I --- MAINTAINERS |9 + 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 8672f18..021f676 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9407,6

[PATCH 36/37] ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP

The PCIe programming sequence in TRM suggests CLKSTCTRL of PCIe should be set to SW_WKUP. There are no issues when CLKSTCTRL is set to HW_AUTO in RC mode. However in EP mode, the host system is not able to access the MEMSPACE and setting the CLKSTCTRL to SW_WKUP fixes it. Signed-off-by: Kishon

[PATCH 19/37] PCI: endpoint: functions: Add an EP function to test PCI

This adds a new endpoint function driver (to program the virtual test device) making use of the EP-core library. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/endpoint/Kconfig |2 + drivers/pci/endpoint/Makefile |3 +-

Re: [PATCH] powerpc: Use octal numbers for file permissions

On Thu, 2017-01-12 at 14:54 +1100, Russell Currey wrote: > Symbolic macros are unintuitive and hard to read, whereas octal constants > are much easier to interpret. Replace macros for the basic permission > flags (user/group/other read/write/execute) with numeric constants > instead, across the

Re: [PATCH v4 1/2] KVM: PPC: Add new capability to control MCE behaviour

On Thursday 12 January 2017 03:26 PM, Paul Mackerras wrote: > On Mon, Jan 09, 2017 at 05:10:35PM +0530, Aravinda Prasad wrote: >> This patch introduces a new KVM capability to control >> how KVM behaves on machine check exception (MCE). >> Without this capability, KVM redirects machine check >>

Re: bootx_init.c:88: undefined reference to `__stack_chk_fail_local'

On Thu, 2017-01-12 at 15:42 +0100, Christophe LEROY wrote: > The 4.6.3 uses __stack_chk_guard, while the 4.4.4 and 4.8.3 use > -28680(r2) > > Is it dependent on the way GCC is built ? Then do we have a way to > know,  > when we compile, which method GCC will use ? > > See details below for each

Re: [PATCH v2 7/7] uapi: export all headers under uapi directories

Le 12/01/2017 à 17:28, Jan Engelhardt a écrit : > On Thursday 2017-01-12 16:52, Nicolas Dichtel wrote: > >> Le 09/01/2017 à 13:56, Christoph Hellwig a écrit : >>> On Fri, Jan 06, 2017 at 10:43:59AM +0100, Nicolas Dichtel wrote: Regularly, when a new header is created in include/uapi/, the

Re: [PATCH v2 7/7] uapi: export all headers under uapi directories

On Thursday 2017-01-12 16:52, Nicolas Dichtel wrote: >Le 09/01/2017 à 13:56, Christoph Hellwig a écrit : >> On Fri, Jan 06, 2017 at 10:43:59AM +0100, Nicolas Dichtel wrote: >>> Regularly, when a new header is created in include/uapi/, the developer >>> forgets to add it in the corresponding

Re: [PATCH v2 7/7] uapi: export all headers under uapi directories

Le 09/01/2017 à 13:56, Christoph Hellwig a écrit : > On Fri, Jan 06, 2017 at 10:43:59AM +0100, Nicolas Dichtel wrote: >> Regularly, when a new header is created in include/uapi/, the developer >> forgets to add it in the corresponding Kbuild file. This error is usually >> detected after the

Re: bootx_init.c:88: undefined reference to `__stack_chk_fail_local'

On Thu, Jan 12, 2017 at 09:20:47AM -0600, Benjamin Herrenschmidt wrote: > On Thu, 2017-01-12 at 15:42 +0100, Christophe LEROY wrote: > > The 4.6.3 uses __stack_chk_guard, while the 4.4.4 and 4.8.3 use > > -28680(r2) > > > > Is it dependent on the way GCC is built ? Then do we have a way to > >

Re: [PATCH 01/18] powerpc/64: Don't try to use radix MMU under a hypervisor

On Thu, Jan 12, 2017 at 08:07:09PM +1100, Paul Mackerras wrote: > Currently, if the kernel is running on a POWER9 processor under a > hypervisor, it will try to use the radix MMU even though it doesn't > have the necessary code to use radix under a hypervisor (it doesn't > negotiate use of radix,

Re: [PATCH v5 4/5] powernv: Pass PSSCR value and mask to power9_idle_stop

On Tue, Jan 10, 2017 at 02:37:03PM +0530, Gautham R. Shenoy wrote: > From: "Gautham R. Shenoy" > > The arch300_idle_stop method currently takes only the requested stop power9_idle_stop (see subject :) and second paragraph) > level as a parameter and picks up the

[PATCH v2 03/26] treewide: Consolidate set_dma_ops() implementations

Now that all set_dma_ops() implementations are identical (ignoring BUG_ON() statements), remove the architecture specific definitions and add a definition in . Signed-off-by: Bart Van Assche Cc: Benjamin Herrenschmidt Cc: Chris Metcalf