Re: [PATCH 1/2] powerpc/kdump: Add missing optional dummy functions

Guenter Roeck writes: > If KEXEC_CORE is not enabled, PowerNV builds fail as follows. > > arch/powerpc/platforms/powernv/smp.c: In function 'pnv_smp_cpu_kill_self': > arch/powerpc/platforms/powernv/smp.c:236:4: error: > implicit declaration of function

[PATCH V3] powerpc/mm/hash64: memset the pagetable pages on allocation.

On powerpc we allocate page table pages from slab cache of different sizes. For now we have a constructor that zero out the objects when we allocate then for the first time. We expect the objects to be zeroed out when we free the the object back to slab cache. This happens in the unmap path. For

[PATCH] cxl: Check if PSL data-cache is available before issue flush request

PSL9D doesn't have a data-cache that needs to be flushed before resetting the card. However when cxl tries to flush data-cache on such a card, it times-out as PSL_Control register never indicates flush operation complete due to missing data-cache. This is usually indicated in the kernel logs with

Re: [PATCH kernel v2] powerpc/mm: Flush radix process translations when setting MMU type

On 07/02/2018 18:49, Daniel Henrique Barboza wrote: > > > On 02/07/2018 12:33 PM, Laurent Vivier wrote: >> On 01/02/2018 06:09, Alexey Kardashevskiy wrote: >>> Radix guests do normally invalidate process-scoped translations when >>> a new pid is allocated but migrated guests do not invalidate

Re: [PATCH] powerpc/xive: use hw CPU ids when configuring the CPU queues

On 02/13/2018 10:18 AM, Michael Ellerman wrote: > Cédric Le Goater writes: > >> The CPU event notification queues on sPAPR should be configured using >> a hardware CPU identifier. >> >> The problem did not show up on the Power Hypervisor because pHyp >> supports 8 threads per core

Re: [RFC PATCH 0/5] powerpc/mm/slice: improve slice speed and stack use

Le 13/02/2018 à 09:40, Nicholas Piggin a écrit : On Mon, 12 Feb 2018 18:42:21 +0100 Christophe LEROY wrote: Le 12/02/2018 à 16:24, Nicholas Piggin a écrit : On Mon, 12 Feb 2018 16:02:23 +0100 Christophe LEROY wrote: Le 10/02/2018 à

Re: [PATCH 2/3] cxl: Introduce module parameter 'enable_psltrace'

Frederic Barrat writes: > Le 11/02/2018 à 18:10, Vaibhav Jain a écrit : >> Thanks for reviewing the patch Christophe, >> >> christophe lombard writes: +bool cxl_enable_psltrace = true; +module_param_named(enable_psltrace,

[PATCH] powerpc/xive: use hw CPU ids when configuring the CPU queues

The CPU event notification queues on sPAPR should be configured using a hardware CPU identifier. The problem did not show up on the Power Hypervisor because pHyp supports 8 threads per core which keeps CPU number contiguous. This is not the case on all sPAPR virtual machines, some use SMT=1.

Re: [PATCH] powerpc/xive: use hw CPU ids when configuring the CPU queues

Cédric Le Goater writes: > The CPU event notification queues on sPAPR should be configured using > a hardware CPU identifier. > > The problem did not show up on the Power Hypervisor because pHyp > supports 8 threads per core which keeps CPU number contiguous. This is > not the

Re: [PATCH 5/5] mtd: Stop updating erase_info->state and calling mtd_erase_callback()

Hi Boris, Just a few comments about the form. Otherwise: Reviewed-by: Miquel Raynal > diff --git a/drivers/mtd/devices/lart.c b/drivers/mtd/devices/lart.c > index 555b94406e0b..3d6c8ffd351f 100644 > --- a/drivers/mtd/devices/lart.c > +++ b/drivers/mtd/devices/lart.c

Re: [PATCH 5/5] mtd: Stop updating erase_info->state and calling mtd_erase_callback()

Hi Boris, On Tue, 13 Feb 2018 09:17:14 +0100, Boris Brezillon wrote: > On Tue, 13 Feb 2018 08:42:46 +0100 > Miquel Raynal wrote: > > > Hi Boris, > > > > Just a few comments about the form. > > > > Otherwise: > > Reviewed-by: Miquel

Re: [PATCH 5/5] mtd: Stop updating erase_info->state and calling mtd_erase_callback()

On Tue, 13 Feb 2018 08:42:46 +0100 Miquel Raynal wrote: > Hi Boris, > > Just a few comments about the form. > > Otherwise: > Reviewed-by: Miquel Raynal > > > > diff --git a/drivers/mtd/devices/lart.c b/drivers/mtd/devices/lart.c > >

Re: samples/seccomp/ broken when cross compiling s390, ppc allyesconfig

On Mon 12-02-18 21:54:39, Kees Cook wrote: > On Mon, Feb 12, 2018 at 7:25 PM, Michael Ellerman wrote: > > Michal Hocko writes: > >> Hi, > >> my build test machinery chokes on samples/seccomp when cross compiling > >> s390 and ppc64 allyesconfig. This has

Re: [PATCH] headers: untangle kmemleak.h from mm.h

Randy Dunlap writes: > On 02/12/2018 04:28 AM, Michael Ellerman wrote: >> Randy Dunlap writes: >> >>> From: Randy Dunlap >>> >>> Currently #includes for no obvious >>> reason. It looks like it's only a convenience, so

Re: samples/seccomp/ broken when cross compiling s390, ppc allyesconfig

Kees Cook writes: > On Mon, Feb 12, 2018 at 7:25 PM, Michael Ellerman wrote: >> Michal Hocko writes: >>> Hi, >>> my build test machinery chokes on samples/seccomp when cross compiling >>> s390 and ppc64 allyesconfig. This has been

Re: samples/seccomp/ broken when cross compiling s390, ppc allyesconfig

On Tue 13-02-18 21:16:55, Michael Ellerman wrote: > Kees Cook writes: > > > On Mon, Feb 12, 2018 at 7:25 PM, Michael Ellerman > > wrote: > >> Michal Hocko writes: > >>> Hi, > >>> my build test machinery chokes on samples/seccomp

[bug report] ocxl: Add AFU interrupt support

Hello Frederic Barrat, The patch aeddad1760ae: "ocxl: Add AFU interrupt support" from Jan 23, 2018, leads to the following static checker warning: drivers/misc/ocxl/file.c:163 afu_ioctl() warn: maybe return -EFAULT instead of the bytes remaining? drivers/misc/ocxl/file.c 111 static

Re: [RFC PATCH 0/5] powerpc/mm/slice: improve slice speed and stack use

On Mon, 12 Feb 2018 18:42:21 +0100 Christophe LEROY wrote: > Le 12/02/2018 à 16:24, Nicholas Piggin a écrit : > > On Mon, 12 Feb 2018 16:02:23 +0100 > > Christophe LEROY wrote: > > > >> Le 10/02/2018 à 09:11, Nicholas Piggin a écrit : > >>>

[PATCH 06/14] powerpc/mm/numa: move numa topology discovery earlier

Split sparsemem initialisation from basic numa topology discovery. Move the parsing earlier in boot, before pacas are allocated. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/setup.h | 1 + arch/powerpc/kernel/setup-common.c | 3 +++ arch/powerpc/mm/mem.c

Re: pata-macio WARNING at dmam_alloc_coherent+0xec/0x110

Does this fix your warning? diff --git a/drivers/macintosh/macio_asic.c b/drivers/macintosh/macio_asic.c index 62f541f968f6..07074820a167 100644 --- a/drivers/macintosh/macio_asic.c +++ b/drivers/macintosh/macio_asic.c @@ -375,6 +375,7 @@ static struct macio_dev * macio_add_one_device(struct

[PATCH 00/14] numa aware allocation for pacas, stacks, pagetables

This series allows numa aware allocations for various early data structures for radix. Hash still has a bolted SLB limitation that prevents at least pacas and stacks from node-affine allocations. Fixed up a number of bugs, got pSeries working, added a couple more cases where page tables can be

Re: pata-macio WARNING at dmam_alloc_coherent+0xec/0x110

Hi, On Tue, Feb 13, 2018 at 3:51 PM, Christoph Hellwig wrote: > Does this fix your warning? > > diff --git a/drivers/macintosh/macio_asic.c b/drivers/macintosh/macio_asic.c > index 62f541f968f6..07074820a167 100644 > --- a/drivers/macintosh/macio_asic.c > +++

[PATCH 02/14] powerpc/64: Use array of paca pointers and allocate pacas individually

Change the paca array into an array of pointers to pacas. Allocate pacas individually. This allows flexibility in where the PACAs are allocated. Future work will allocate them node-local. Platforms that don't have address limits on PACAs would be able to defer PACA allocations until later in boot

[PATCH 10/14] powerpc/64: allocate pacas per node

Per-node allocations are possible on 64s with radix that does not have the bolted SLB limitation. Hash would be able to do the same if all CPUs had the bottom of their node-local memory bolted as well. This is left as an exercise for the reader. --- arch/powerpc/kernel/paca.c | 41

[PATCH 12/14] powerpc: pass node id into create_section_mapping

Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/book3s/64/hash.h | 2 +- arch/powerpc/include/asm/book3s/64/radix.h | 2 +- arch/powerpc/include/asm/sparsemem.h | 2 +- arch/powerpc/mm/hash_utils_64.c| 2 +- arch/powerpc/mm/mem.c

[PATCH 04/14] powerpc/64s: allocate slb_shadow structures individually

Allocate slb_shadow structures individually. slb_shadow structures are avoided for radix environment. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/paca.c | 65 +- 1 file changed, 30 insertions(+), 35 deletions(-) diff

[PATCH 07/14] powerpc/64: move default SPR recording

Move this into the early setup code, and don't iterate over CPU masks. We don't want to call into sysfs so early from setup, and a future patch won't initialize CPU masks by the time this is called. --- arch/powerpc/kernel/paca.c | 3 +++ arch/powerpc/kernel/setup.h| 9 +++--

[PATCH 09/14] powerpc/64: defer paca allocation until memory topology is discovered

--- arch/powerpc/include/asm/paca.h| 3 +- arch/powerpc/kernel/paca.c | 90 -- arch/powerpc/kernel/prom.c | 5 ++- arch/powerpc/kernel/setup-common.c | 24 +++--- 4 files changed, 51 insertions(+), 71 deletions(-) diff --git

[PATCH 11/14] powerpc/64: allocate per-cpu stacks node-local if possible

Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/setup_64.c | 51 ++ 1 file changed, 32 insertions(+), 19 deletions(-) diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index 02fa358982e6..16ea71fa1ead

[PATCH 14/14] powerpc/64s/radix: allocate kernel page tables node-local if possible

Try to allocate kernel page tables for direct mapping and vmemmap according to the node of the memory they will map. The node is not available for the linear map in early boot, so use range allocation to allocate the page tables from the region they map, which is effectively node-local.

[PATCH 05/14] mm: make memblock_alloc_base_nid non-static

This will be used by powerpc to allocate per-cpu stacks and other data structures node-local where possible. Signed-off-by: Nicholas Piggin --- include/linux/memblock.h | 5 - mm/memblock.c| 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git

[PATCH 08/14] powerpc/setup: cpu_to_phys_id array

Build an array that finds hardware CPU number from logical CPU number in firmware CPU discovery. Use that rather than setting paca of other CPUs directly, to begin with. Subsequent patch will not have pacas allocated at this point. --- arch/powerpc/include/asm/smp.h | 1 +

[PATCH 13/14] powerpc/64s/radix: split early page table mapping to its own function

Signed-off-by: Nicholas Piggin --- arch/powerpc/mm/pgtable-radix.c | 114 +++- 1 file changed, 66 insertions(+), 48 deletions(-) diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c index 435b19e74508..4c5cc69c92c2

[PATCH 01/14] powerpc/64s: do not allocate lppaca if we are not virtualized

The "lppaca" is a structure registered with the hypervisor. This is unnecessary when running on non-virtualised platforms. One field from the lppaca (pmcregs_in_use) is also used by the host, so move the host part out into the paca (lppaca field is still updated in guest mode). Signed-off-by:

[PATCH 03/14] powerpc/64s: allocate lppacas individually

Allocate LPPACAs individually. We no longer allocate lppacas in an array, so this patch removes the 1kB static alignment for the structure, and enforces the PAPR alignment requirements at allocation time. We can not reduce the 1kB allocation size however, due to existing KVM hypervisors.

Re: [PATCH] headers: untangle kmemleak.h from mm.h

On 02/13/2018 02:09 AM, Michael Ellerman wrote: > Randy Dunlap writes: > >> On 02/12/2018 04:28 AM, Michael Ellerman wrote: >>> Randy Dunlap writes: >>> From: Randy Dunlap Currently #includes for no obvious

Re: pata-macio WARNING at dmam_alloc_coherent+0xec/0x110

> Does this fix your warning? > > diff --git a/drivers/macintosh/macio_asic.c b/drivers/macintosh/macio_asic.c > index 62f541f968f6..07074820a167 100644 > --- a/drivers/macintosh/macio_asic.c > +++ b/drivers/macintosh/macio_asic.c > @@ -375,6 +375,7 @@ static struct macio_dev *

Re: [PATCH V3] powerpc/mm/hash64: memset the pagetable pages on allocation.

On Tue, Feb 13, 2018 at 04:39:33PM +0530, Aneesh Kumar K.V wrote: > On powerpc we allocate page table pages from slab cache of different sizes. > For > now we have a constructor that zero out the objects when we allocate then for > the first time. We expect the objects to be zeroed out when we

Re: [PATCH 5/5] mtd: Stop updating erase_info->state and calling mtd_erase_callback()

On 12/02/18 21:03, Boris Brezillon wrote: > MTD users are no longer checking erase_info->state to determine if the > erase operation failed or succeeded. Moreover, mtd_erase_callback() is > now a NOP. > > We can safely get rid of all mtd_erase_callback() calls and all > erase_info->state

Re: [bug report] ocxl: Add AFU interrupt support

Hi, Thanks for the report. I'll fix the first issue. The 2nd is already on its way to upstream: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id=dedab7f0d3137441a97fe7cf9b9ca5 (though we still have a useless cast in there; will fix as well). May I ask what static

Re: [PATCH 2/2] powerpc/pseries: Declare optional dummy function for find_and_online_cpu_nid

On 02/12/2018 02:34 PM, Guenter Roeck wrote: > Commit e67e02a544e9 ("powerpc/pseries: Fix cpu hotplug crash with > memoryless nodes") adds an unconditional call to find_and_online_cpu_nid(), > which is only declared if CONFIG_PPC_SPLPAR is enabled. This results in > the following build error if

Re: [PATCH v2 04/13] lpfc: Add push-to-adapter support to sli4

On 2/12/2018 9:59 PM, Michael Ellerman wrote: Johannes Thumshirn writes: On Wed, Feb 07, 2018 at 10:51:57AM +0100, Johannes Thumshirn wrote: + /* Enable combined writes for DPP aperture */ + pg_addr = (unsigned

Re: [PATCH] powerpc/via-pmu: Fix section mismatch warning

On 07/02/2018 20:44, Mathieu Malaterre wrote: > Remove the __init annotation from pmu_init() to avoid the > following warning. > > WARNING: vmlinux.o(.data+0x4739c): Section mismatch in reference from the > variable via_pmu_driver to the function .init.text:pmu_init() > The variable

[PATCH 1/2] KVM: PPC: Fix compile error that occurs when CONFIG_ALTIVEC=n

I successfully compiled the latest Git kernel with this patch without enabled AltiVec for my Freescale P5020 board today. The patch works without any problems. — Christian Sent from my iPhone On 13. Feb 2018, at 05:51, Paul Mackerras wrote: Commit accb757d798c ("KVM: Move

[PATCH] Fix cleanup when VAS is not configured

From: Sukadev Bhattiprolu Date: Fri, 9 Feb 2018 11:49:06 -0600 Subject: [PATCH 1/1] powerpc/vas: Fix cleanup when VAS is not configured When VAS is not configured, unregister the platform driver. Also simplify cleanup by delaying vas debugfs init until we know VAS is

Re: [PATCH] cxl: Remove function write_timebase_ctrl_psl9() for PSL9

Le 09/02/2018 à 05:10, Vaibhav Jain a écrit : For PSL9 the time-base enable bit has moved from PSL_TB_CTLSTAT register to PSL_CONTROL register. Hence we don't need an sl_ops implementation for 'write_timebase_ctrl' for PSL9. Hence this patch removes function write_timebase_ctrl_psl9() and its

[PATCH] powerpc: Revert support for ibm,drc-info devtree property

This reverts commit 02ef6dd8109b581343ebeb1c4c973513682535d6. The earlier patch tried to enable support for a new property "ibm,drc-info" on powerpc systems. Unfortunately, some errors in the associated patch set break things in some of the DLPAR operations. In particular when attempting to

Re: samples/seccomp/ broken when cross compiling s390, ppc allyesconfig

On Tue, Feb 13, 2018 at 2:32 AM, Michal Hocko wrote: > On Tue 13-02-18 21:16:55, Michael Ellerman wrote: >> Kees Cook writes: >> >> > On Mon, Feb 12, 2018 at 7:25 PM, Michael Ellerman >> > wrote: >> >> Michal Hocko

Re: [PATCH] powerpc/xmon: Dont register sysrq key when kernel param xmon=off

On Mon, Feb 12, 2018 at 11:35 PM, Vaibhav Jain wrote: > Thanks for reviewing this patch Balbir > > Balbir Singh writes: > >> Any specific issue you've run into without this patch? > Without this patch since xmon is still accessible via sysrq and

Re: [PATCH 1/2] powerpc/kdump: Add missing optional dummy functions

On Mon, 12 Feb 2018 15:25:51 -0800 Guenter Roeck wrote: > On Tue, Feb 13, 2018 at 10:01:57AM +1100, Balbir Singh wrote: > > On Tue, Feb 13, 2018 at 9:34 AM, Guenter Roeck wrote: > > > If KEXEC_CORE is not enabled, PowerNV builds fail as follows. > > > >

[PATCH] powerpc: Expose TSCR via sysfs only on powernv

The TSCR can only be accessed in hypervisor mode. Fixes: 88b5e12eeb11 ("powerpc: Expose TSCR via sysfs") Signed-off-by: Cyril Bur --- arch/powerpc/kernel/sysfs.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/kernel/sysfs.c

Re: [PATCH] powerpc/npu-dma.c: Fix deadlock in mmio_invalidate

> > +struct mmio_atsd_reg { > > + struct npu *npu; > > + int reg; > > +}; > > + > > Is it just easier to move reg to inside of struct npu? I don't think so, struct npu is global to all npu contexts where as this is specific to the given invalidation. We don't have enough registers to assign

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confirm 0da5e6b1343dcc6395ebcc8054c362d930498440

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confirm 179e695f420474677205db49a8cbfe950329975c

Re: [PATCH v2] mm: hwpoison: disable memory error handling on 1GB hugepage

On 02/12/2018 06:48 PM, Michael Ellerman wrote: > Andrew Morton writes: > >> On Thu, 08 Feb 2018 12:30:45 + Punit Agrawal >> wrote: >> So I don't think that the above test result means that errors are properly handled, and

Re: [PATCH] headers: untangle kmemleak.h from mm.h

On 02/11/2018 11:27 PM, Ingo Molnar wrote: > > * Randy Dunlap wrote: > >> From: Randy Dunlap >> >> Currently #includes for no obvious >> reason. It looks like it's only a convenience, so remove kmemleak.h >> from slab.h and add to any users of

4.16-rc1 virtual machine crash on boot

Hello all, I'm seeing this crash trying to boot a KVM virtual machine. This kernel was compiled with pseries_le_defconfig and run using the following qemu commandline: qemu-system-ppc64 -enable-kvm -cpu POWER8 -smp 4 -m 4G -M pseries -nographic -vga none -drive file=vm.raw,if=virtio,format=raw

Re: [bug report] ocxl: Add AFU interrupt support

On Tue, Feb 13, 2018 at 08:29:26PM +0100, Frederic Barrat wrote: > Hi, > > Thanks for the report. I'll fix the first issue. The 2nd is already on its > way to upstream: > https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id=dedab7f0d3137441a97fe7cf9b9ca5 > > (though we

Re: 4.16-rc1 virtual machine crash on boot

On 02/13/2018 05:20 PM, Cyril Bur wrote: > Hello all, Does reverting commit 02ef6dd8109b581343ebeb1c4c973513682535d6 alleviate the issue? -Tyrel > > I'm seeing this crash trying to boot a KVM virtual machine. This kernel > was compiled with pseries_le_defconfig and run using the following

Re: [kernel, v2] powerpc/mm: Flush radix process translations when setting MMU type

On Thu, 2018-02-01 at 05:09:44 UTC, Alexey Kardashevskiy wrote: > Radix guests do normally invalidate process-scoped translations when > a new pid is allocated but migrated guests do not invalidate these so > migrated guests crash sometime, especially easy to reproduce with > migration happening

Re: powerpc/vas: do not set uses_vas for kernel windows

On Thu, 2018-02-08 at 09:18:38 UTC, Nicholas Piggin wrote: > cp_abort is only required or user windows, because kernel context > must not be preempted between a copy/paste pair. > > Without this patch, the init task gets used_vas set when it runs > the nx842_powernv_init initcall, which opens

Re: [V2,1/4] powerpc/mm: Fix crashes with PUD level hugetlb config

On Sun, 2018-02-11 at 15:00:06 UTC, "Aneesh Kumar K.V" wrote: > To support memory keys, we moved the hash pte slot information to the second > half of the page table. This was ok with PTE entries at level 4 and level 3. > We already allocate larger page table pages at those level to accomodate

Re: [V2, 2/4] powerpc/mm/hash64: Allocate larger PMD table if hugetlb config is enabled.

On Sun, 2018-02-11 at 15:00:07 UTC, "Aneesh Kumar K.V" wrote: > Signed-off-by: Aneesh Kumar K.V > Reviewed-by: Ram Pai Applied to powerpc fixes, thanks. https://git.kernel.org/powerpc/c/4a7aa4fecbbf94b5c6fae8a983 cheers

Re: [V2, 3/4] powerpc/mm/hash64: Store the slot information at the right offset.

On Sun, 2018-02-11 at 15:00:08 UTC, "Aneesh Kumar K.V" wrote: > The hugetlb pte entries are at the PMD and PUD level. Use the right offset > for them to get the second half of the table. > > Signed-off-by: Aneesh Kumar K.V > Reviewed-by: Ram Pai

Re: [1/2] powerpc/kdump: Add missing optional dummy functions

On Mon, 2018-02-12 at 22:34:07 UTC, Guenter Roeck wrote: > If KEXEC_CORE is not enabled, PowerNV builds fail as follows. > > arch/powerpc/platforms/powernv/smp.c: In function 'pnv_smp_cpu_kill_self': > arch/powerpc/platforms/powernv/smp.c:236:4: error: > implicit declaration of function

Re: [1/1] powerpc/pseries: Enable RAS hotplug events late

On Mon, 2018-02-12 at 00:19:29 UTC, Sam Bobroff wrote: > Currently if the kernel receives a memory hot-unplug event early > enough, it may get stuck in an infinite loop in > dissolve_free_huge_pages(). This appears as a stall just after: > > pseries-hotplug-mem: Attempting to hot-remove XX LMB(s)

Re: selftests/powerpc: Fix: use ucontext_t instead of struct ucontext

On Tue, 2018-02-13 at 06:32:55 UTC, Harish wrote: > With glibc 2.26 'struct ucontext' is removed to improve POSIX > compliance, which breaks powerpc/alignment_handler selftest. > Fix the test by using ucontext_t. Tested on ppc, works with older > glibc versions as well. > > Fixes the following: >

Re: [2/2] powerpc/pseries: Declare optional dummy function for find_and_online_cpu_nid

On Mon, 2018-02-12 at 22:34:08 UTC, Guenter Roeck wrote: > Commit e67e02a544e9 ("powerpc/pseries: Fix cpu hotplug crash with > memoryless nodes") adds an unconditional call to find_and_online_cpu_nid(), > which is only declared if CONFIG_PPC_SPLPAR is enabled. This results in > the following build

Re: [V3] powerpc/mm/hash64: memset the pagetable pages on allocation.

On Tue, 2018-02-13 at 11:09:33 UTC, "Aneesh Kumar K.V" wrote: > On powerpc we allocate page table pages from slab cache of different sizes. > For > now we have a constructor that zero out the objects when we allocate then for > the first time. We expect the objects to be zeroed out when we free

Re: [PATCH] powerpc/xive: use hw CPU ids when configuring the CPU queues

Cédric Le Goater writes: > On 02/13/2018 10:18 AM, Michael Ellerman wrote: >> Cédric Le Goater writes: >> >>> The CPU event notification queues on sPAPR should be configured using >>> a hardware CPU identifier. >>> >>> The problem did not show up on the Power

Re: 4.16-rc1 virtual machine crash on boot

On Tue, 2018-02-13 at 21:12 -0800, Tyrel Datwyler wrote: > On 02/13/2018 05:20 PM, Cyril Bur wrote: > > Hello all, > > Does reverting commit 02ef6dd8109b581343ebeb1c4c973513682535d6 alleviate the > issue? > Hi Tyrel, No it doesn't. Same backtrace. > -Tyrel > > > > > I'm seeing this crash