ce4 ("[ALSA] snd-aoa: add snd-aoa")
> ---
>
> Problem located by an experimental coccinelle script
>
> Patch was compiletested with: ppc64_defconfig (implies CONFIG_SND_AOA=m)
>
> Patch is against 4.18-rc2 (localversion-next is next-20180629)
Applied, thanks.
Takashi
In the quest to remove all stack VLA usage from the kernel[1], this
switches from an unchanging variable to a constant expression to eliminate
the VLA generation.
[1]
https://lkml.kernel.org/r/CA+55aFzCG-zNmZwX4A2FQpadafLfEzK6CC=qpxydaacu1rq...@mail.gmail.com
Cc: Benjamin Herrenschmidt
Cc:
In the quest to remove all stack VLA usage from the kernel[1], this
switches to using a stack size large enough for the saved routine and
adds a sanity check.
[1]
https://lkml.kernel.org/r/CA+55aFzCG-zNmZwX4A2FQpadafLfEzK6CC=qpxydaacu1rq...@mail.gmail.com
Signed-off-by: Kees Cook
---
On Fri, Jun 29, 2018 at 8:53 PM, Kees Cook wrote:
> In the quest to remove all stack VLA usage from the kernel[1], this
> switches to using a stack size large enough for the saved routine and
> adds a sanity check.
>
> [1]
>
On Fri, Jun 29, 2018 at 1:42 PM Larry Finger wrote:
>
> I have more information regarding this BUG. Line 700 of page-flags.h is the
> macro PAGE_TYPE_OPS(Table, table). For further debugging, I manually expanded
> the macro, and found that the bug line is VM_BUG_ON_PAGE(!PageTable(page),
> page)
My PowerBook G4 Aluminum crashes on boot with 4.18-rcX kernels with a kernel BUG
at include/linux/page-flags.h:700! The problem was bisected to commit
1d40a5ea01d5 ("mm: mark pages in use for page tables"). It is not possible to
capture the bug with anything other than a camera. The first few
mobility/numa: Ensure that numa_update_cpu_topology() can not be
entered multiple times concurrently. It may be accessed through
many different paths / concurrent work functions, and the lock
ordering may be difficult to ensure otherwise.
Signed-off-by: Michael Bringmann
---
On Fri, Jun 29, 2018 at 02:01:46PM -0700, Linus Torvalds wrote:
> On Fri, Jun 29, 2018 at 1:42 PM Larry Finger
> wrote:
> But the real question is what the problem was the *first* time around.
> I assume that has scrolled off the screen? This part:
>
> _exception_pkey+0x58/0x128
>
On 06/29/2018 04:01 PM, Linus Torvalds wrote:
On Fri, Jun 29, 2018 at 1:42 PM Larry Finger wrote:
I have more information regarding this BUG. Line 700 of page-flags.h is the
macro PAGE_TYPE_OPS(Table, table). For further debugging, I manually expanded
the macro, and found that the bug line is
powerpc/cpu: Modify dlpar_cpu_add and dlpar_cpu_remove to allow the
skipping of DRC index acquire or release operations during the CPU
add or remove operations. This is intended to support subsequent
changes to provide a 'CPU readd' operation.
Signed-off-by: Michael Bringmann
---
Changes in
pmt/numa: Disable arch_update_cpu_topology during post migration
CPU readd updates when evaluating device-tree changes after LPM
to avoid thread deadlocks trying to update node assignments.
System timing between all of the threads and timers restarted in
a migrated system overlapped frequently
The migration of LPARs across Power systems affects many attributes
including that of the associativity of memory blocks. The patches
in this set execute when a system is coming up fresh upon a migration
target. They are intended to,
* Recognize changes to the associativity of memory recorded
Gabriel Paubert writes:
> On Thu, Jun 28, 2018 at 11:56:34PM -0300, Thiago Jung Bauermann wrote:
>>
>> Hello,
>>
>> Ram Pai writes:
>>
>> > Key 2 is preallocated and reserved for execute-only key. In rare
>> > cases if key-2 is unavailable, mprotect(PROT_EXEC) will behave
>> > incorrectly.
On Fri, Jun 29, 2018 at 2:46 PM Kirill A. Shutemov wrote:
>
> Looks like pgtable_page_dtor() gets called in __pte_free_tlb() path twice.
> Once in __pte_free_tlb() itself and the second time in pgtable_free().
Ahh, that would certainly do it,. and explains why this hits ppc32 but
not x86, for
numa: Provide mechanism to disable/enable operation of
arch_update_cpu_topology/numa_update_cpu_topology. This is
a simple tool to eliminate some avenues for thread deadlock
observed during system execution.
Signed-off-by: Michael Bringmann
---
arch/powerpc/include/asm/topology.h | 10
hotplug/pmt: Call rebuild_sched_domains after applying changes
to update CPU associativity i.e. 'readd' CPUs. This is to
ensure that the deferred calls to arch_update_cpu_topology are
now reflected in the system data structures.
Signed-off-by: Michael Bringmann
---
powerpc/drmem: Add internal_flags field to each LMB to allow
marking of kernel software-specific operations that need not
be exported to other users. For instance, if information about
selected LMBs needs to be maintained for subsequent passes
through the system, it can be encoded into the LMB
piletested with: ppc64_defconfig (implies CONFIG_SND_AOA=m)
Patch is against 4.18-rc2 (localversion-next is next-20180629)
sound/aoa/core/gpio-feature.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/sound/aoa/core/gpio-feature.c b/sound/aoa/core/gpio-feature.c
index 7196008..6555
On Fri, Jun 29, 2018 at 2:02 PM, Arnd Bergmann wrote:
> On Fri, Jun 29, 2018 at 8:53 PM, Kees Cook wrote:
>> In the quest to remove all stack VLA usage from the kernel[1], this
>> switches to using a stack size large enough for the saved routine and
>> adds a sanity check.
>>
>> [1]
>>
The migration of LPARs across Power systems affects many attributes
including that of the associativity of CPUs. The patches in this
set execute when a system is coming up fresh upon a migration target.
They are intended to,
* Recognize changes to the associativity of CPUs recorded in internal
hotplug/rtas: Disable rtas_event_scan during device-tree property
updates after migration to reduce conflicts with changes propagated
to other parts of the kernel configuration, such as CPUs or memory.
Signed-off-by: Michael Bringmann
---
arch/powerpc/platforms/pseries/hotplug-cpu.c |4
Hi Michael,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on powerpc/next]
[also build test ERROR on v4.18-rc2 next-20180629]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
Hi Linus,
Please pull some more powerpc fixes for 4.18:
The following changes since commit fadd03c615922d8521a2e76d4ba2335891cb2790:
powerpc/mm/hash/4k: Free hugetlb page table caches correctly. (2018-06-20
09:13:25 +1000)
are available in
On Fri, May 25, 2018 at 10:31:36AM +1000, Sam Bobroff wrote:
> EEH recovery currently fails on pSeries for some IOV capable PCI
> devices, if CONFIG_PCI_IOV is on and the hypervisor doesn't provide
> certain device tree properties for the device. (Found on an IOV
> capable device using the ipr
On Fri, 2018-06-29 at 17:34 +1000, Russell Currey wrote:
> DMA pseudo-bypass is a new set of DMA operations that solve some issues for
> devices that want to address more than 32 bits but can't address the 59
> bits required to enable direct DMA.
One thing you may need to add (I didn't see it
On Fri, Jun 29, 2018 at 02:01:46PM -0700, Linus Torvalds wrote:
> On Fri, Jun 29, 2018 at 1:42 PM Larry Finger
> wrote:
> >
> > I have more information regarding this BUG. Line 700 of page-flags.h is the
> > macro PAGE_TYPE_OPS(Table, table). For further debugging, I manually
> > expanded
> >
migration/dlpar: This patch adds function dlpar_queue_action()
which will queued up information about a CPU/Memory 'readd'
operation according to resource type, action code, and DRC index.
At a subsequent point, the list of operations can be run/played
in series. Examples of such oprations
powerpc/drmem: Export many of the functions of DRMEM to parse
"ibm,dynamic-memory" and "ibm,dynamic-memory-v2" during hotplug
operations and for Post Migration events.
Also modify the DRMEM initialization code to allow it to,
* Be called after system initialization
* Provide a separate user copy
migration/memory: This patch adds recognition for changes to the
associativity of memory blocks described by 'ibm,dynamic-memory-v2'.
If the associativity of an LMB has changed, it should be readded to
the system in order to update local and general kernel data structures.
This patch builds upon
On Fri, Jun 29, 2018 at 09:58:37PM -0300, Thiago Jung Bauermann wrote:
>
> Gabriel Paubert writes:
>
> > On Thu, Jun 28, 2018 at 11:56:34PM -0300, Thiago Jung Bauermann wrote:
> >>
> >> Hello,
> >>
> >> Ram Pai writes:
> >>
> >> > Key 2 is preallocated and reserved for execute-only key. In
powerpc/rtas: Provide mechanism by which the rtas_event_scan can
be disabled/re-enabled by other portions of the powerpc code.
Among other things, this simplifies the usage of locking mechanisms
for shared kernel resources.
Signed-off-by: Michael Bringmann
---
arch/powerpc/include/asm/rtas.h |
migration/memory: This patch adds a new pseries hotplug action
for CPU and memory operations, PSERIES_HP_ELOG_ACTION_READD_MULTIPLE.
This is a variant of the READD operation which performs the action
upon multiple instances of the resource at one time. The operation
is to be triggered by
powerpc/dlpar: Provide hotplug CPU 'readd by index' operation to
support LPAR Post Migration state updates. When such changes are
invoked by the PowerPC 'mobility' code, they will be queued up so
that modifications to CPU properties will take place after the new
property value is written to the
migration/memory: This patch adds code that recognizes changes to
the associativity of memory blocks described by the device-tree
properties in order to drive equivalent 'hotplug' operations to
update local and general kernel data structures to reflect those
changes. These differences may
On Thu, Jun 28, 2018 at 11:56:34PM -0300, Thiago Jung Bauermann wrote:
>
> Hello,
>
> Ram Pai writes:
>
> > Key 2 is preallocated and reserved for execute-only key. In rare
> > cases if key-2 is unavailable, mprotect(PROT_EXEC) will behave
> > incorrectly. NOTE: mprotect(PROT_EXEC) uses
On Fri, 29 Jun 2018 15:18:20 +1000
Alexey Kardashevskiy wrote:
> On Fri, 29 Jun 2018 14:57:02 +1000
> David Gibson wrote:
>
> > On Fri, Jun 29, 2018 at 02:51:21PM +1000, Alexey Kardashevskiy wrote:
> > > On Fri, 29 Jun 2018 14:12:41 +1000
> > > David Gibson wrote:
> > >
> > > > On Tue,
Add a new debugfs entry to trigger dumping out the TCEs for a
given PE using pseudo-bypass, for example PE 0x4 of PHB 2:
echo 0x4 > /sys/kernel/debug/powerpc/PCI0002/dump_tces
This will result in the table being dumped out in dmesg.
Signed-off-by: Russell Currey
---
Knowing the largest possible TCE size of a PHB is useful, so get it out
of the device tree. This relies on the property being added in OPAL.
It is assumed that any PHB4 or later machine would be running firmware
that implemented this property, and otherwise assumed to be PHB3, which
has a
From: "Aneesh Kumar K.V"
When computing the starting slot number for a hash page table group we used
to do this
hpte_group = ((hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL;
Multiplying with 8 (HPTES_PER_GROUP) imply the last three bits are 0. Hence we
really don't need to clear then
DMA pseudo-bypass is a new set of DMA operations that solve some issues for
devices that want to address more than 32 bits but can't address the 59
bits required to enable direct DMA.
The previous implementation for POWER8/PHB3 worked around this by
configuring a bypass from the default 32-bit
These patches implement a new set of DMA operations designed to allow
devices that cannot address bit 59 to use more than 32-bit DMA.
The previous implementation for PHB3 assumed contiguous memory, which
is no longer the case on POWER9 and possibly later. As a result, a new
approach was
No functional change
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/mmu-hash.h | 10 +++
arch/powerpc/mm/hash_native_64.c | 27 +--
2 files changed, 17 insertions(+), 20 deletions(-)
diff --git
From: "Aneesh Kumar K.V"
We do this in some part. This patch make sure we always try to search for
hpte without holding lock and redo the compare with lock held once match found.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/hash_native_64.c | 49 +---
1 file
This patch adds error reporting to H_ENTER and H_READ hcalls. A failure for
both these hcalls are mostly fatal and it would be good to log the failure
reason.
We also switch printk to pr_*
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/platforms/pseries/lpar.c | 56
Hi,
Should I rebase the series on top of the latest kernel?
Diana
On 6/11/2018 3:53 PM, Diana Craciun wrote:
> Implement barrier_nospec for NXP PowerPC Book3E processors.
>
> Diana Craciun (3):
> Disable the speculation barrier from the command line
> Add barrier_nospec implementation for
Available vector space accounts ipis and timer interrupts
while spurious vector was not accounted. Also later
mpic_setup_error_int() escape one more vector, seemingly it
assumes one spurious vector.
Signed-off-by: Bharat Bhushan
---
arch/powerpc/sysdev/fsl_mpic_err.c | 2 +-
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