Hi Michael,
On 10/11/18 2:32 AM, Michael Ellerman wrote:
> It still pops a few errors, including in linux/signal.h & compat.h, so
> it's somewhat aspirational until we can get those fixed up :)
>
I wonder if you have a log containing those warnings that you can
share with me.
I'd like to fix
+ devicetree mail list
On 10/11/18 06:22, Akshay Adiga wrote:
> From: Abhishek Goel
>
> This patch moves the saving and restoring of sprs for P9 cpuidle
> from kernel to opal.
> In an attempt to make the powernv idle code backward compatible,
> and to some extent forward compatible, add support
+ devicetree mail list
On 10/11/18 06:22, Akshay Adiga wrote:
> Previously if a older kernel runs on a newer firmware, it may enable
> all available states irrespective of its capability of handling it.
> New device tree format adds a compatible flag, so that only kernel
> which has the
+ devicetree mail list
On 10/11/18 06:22, Akshay Adiga wrote:
> Passing pointer to the pnv_idle_state instead of psscr value and mask.
> This helps us to pass more information to the stop loop. This will help to
> figure out the method to enter/exit idle state.
>
> Signed-off-by: Akshay Adiga
>
On Thu, Oct 11, 2018 at 12:39 AM Frank Rowand wrote:
[resend of my messed up rejected email of a minute ago, sorry]
>
> On 10/10/18 14:03, Frank Rowand wrote:
> > On 10/10/18 13:40, Alan Tull wrote:
> >> On Wed, Oct 10, 2018 at 1:49 AM Frank Rowand
> >> wrote:
> >>>
> >>> On 10/09/18 23:04,
+ devicetree mail list
On 10/11/18 06:22, Akshay Adiga wrote:
> This patch adds support for new device-tree format for idle state
> description.
>
> Previously if a older kernel runs on a newer firmware, it may enable
> all available states irrespective of its capability of handling it.
> New
Checked my notes. I changed read_drconf_v1_cell/read_drconf_v2_cell
to use of_read_number in place of dt_mem_next_cell, because the function
is marked __init, and is not loaded in memory after a migration, so the
system crashes. So, we need that modification, unless we also add some
changes to
On Thu, Oct 11, 2018 at 05:46:55PM +0800, Peng Ma wrote:
> Document the devicetree bindings for NXP Layerscape qDMA controller
> which could be found on NXP QorIQ Layerscape SoCs.
>
> Signed-off-by: Peng Ma
What happened to the version from Wen He that was on v7 and that I
already gave my
Commit 6c1719942e19 ("powerpc/of: Remove useless register save/restore
when calling OF back") removed the saving of srr0 and srr1 when calling
into OpenFirmware. Commit e31aa453bbc4 ("powerpc: Use LOAD_REG_IMMEDIATE
only for constants on 64-bit") did the same for rtas.
This means we don't need to
On 10/11/18 12:33, Alan Tull wrote:
> On Thu, Oct 11, 2018 at 12:39 AM Frank Rowand wrote:
>
> [resend of my messed up rejected email of a minute ago, sorry]
>
>>
>> On 10/10/18 14:03, Frank Rowand wrote:
< snip >
> I understand you're quite busy with all this, but I'm wondering
> whether it
Hi Rob,
> -Original Message-
> From: Rob Herring [mailto:r...@kernel.org]
> Sent: 2018年10月12日 6:09
> To: Peng Ma
> Cc: vk...@kernel.org; Leo Li ; mark.rutl...@arm.com;
> shawn...@kernel.org; dan.j.willi...@intel.com; z...@zh-kernel.org;
> dmaeng...@vger.kernel.org;
Android needs to mremap large regions of memory during memory management
related operations. The mremap system call can be really slow if THP is
not enabled. The bottleneck is move_page_tables, which is copying each
pte at a time, and can be really slow across a large map. Turning on THP
may not
This series speeds up mremap(2) syscall by copying page tables at the
PMD level even for non-THP systems. There is concern that the extra
'address' argument that mremap passes to pte_alloc may do something
subtle architecture related in the future, that makes the scheme not
work. Also we find
On Fri, Oct 05, 2018 at 03:19:34PM -0700, Andrew Morton wrote:
> On Fri, 5 Oct 2018 00:07:04 +0300 Mike Rapoport
> wrote:
>
> > When a memblock allocation APIs are called with align = 0, the alignment is
> > implicitly set to SMP_CACHE_BYTES.
> >
> > Replace all such uses of memblock APIs
On Mon, 2018-10-01 at 06:10:24 UTC, Masahiro Yamada wrote:
> Clean up the leftover of commit f2910f0e6835 ("powerpc: remove old
> GCC version checks").
>
> Signed-off-by: Masahiro Yamada
> Acked-by: Nicholas Piggin
Applied to powerpc next, thanks.
On Mon, 2018-10-01 at 06:21:51 UTC, Daniel Axtens wrote:
> When enumerating page size definitions to check hardware support,
> we construct a constant which is (1U << (def->shift - 10)).
>
> However, the array of page size definitions is only initalised for
> various MMU_PAGE_* constants, so it
On Mon, 2018-10-01 at 23:01:04 UTC, Anton Blanchard wrote:
> We currently cap the decrementer clockevent at 4 seconds, even on systems
> with large decrementer support. Fix this by converting the code to use
> clockevents_register_device() which calculates the upper bound based on
> the max_delta
On Wed, 2018-10-03 at 18:51:32 UTC, Mark Hairgrove wrote:
> There are two types of ATSDs issued to the NPU: invalidates targeting a
> specific virtual address and invalidates targeting the whole address
> space. In both cases prior to this change, the sequence was:
>
> for each NPU
>
On 8/29/2018 3:31 AM, Scott Wood wrote:
> On Tue, 2018-08-21 at 15:45 -0500, Rob Herring wrote:
>> On Mon, Aug 20, 2018 at 1:52 PM Vabhav Sharma wrote:
>>> +/ {
>>> + model = "NXP Layerscape LX2160ARDB";
>>> + compatible = "fsl,lx2160a-rdb", "fsl,lx2160a";
>>> +
>>> + aliases {
Joel Stanley writes:
> Ever since commit 15a3204d24a3 ("powerpc/64s: Set assembler machine type
> to POWER4") we force -mpower4 to be passed to the assembler irrespective
> of the CFLAGS used.
...
>
> By explicitly setting -many we can build with Clang and GCC while
> retaining the -mpower4
add the qDMA device tree nodes for LS1021A devices.
Signed-off-by: Peng Ma
---
arch/arm/boot/dts/ls1021a.dtsi | 16
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index f184905..abc50da 100644
From: Wen He
This patch implement a standard macro call functions is
used to NXP dma drivers.
Signed-off-by: Wen He
---
drivers/dma/fsldma.c | 16
drivers/dma/fsldma.h |4 ++--
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/dma/fsldma.c
add the qDMA device tree nodes for LS1043A devices.
Signed-off-by: Peng Ma
---
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 22 ++
1 files changed, 22 insertions(+), 0 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
add the qDMA device tree nodes for LS1046A devices.
Signed-off-by: Peng Ma
---
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 21 +
1 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
NXP Queue DMA controller(qDMA) on Layerscape SoCs supports channel
virtuallization by allowing DMA jobs to be enqueued into different
command queues.
Signed-off-by: Peng Ma
---
drivers/dma/Kconfig| 13 +
drivers/dma/Makefile |1 +
drivers/dma/fsl-qdma.c | 1282
From: Wen He
This patch add the macro FSL_DMA_IN/OUT implement for ARM platform.
Signed-off-by: Wen He
---
drivers/dma/fsldma.h | 57 +
1 files changed, 38 insertions(+), 19 deletions(-)
diff --git a/drivers/dma/fsldma.h
Document the devicetree bindings for NXP Layerscape qDMA controller
which could be found on NXP QorIQ Layerscape SoCs.
Signed-off-by: Peng Ma
---
Documentation/devicetree/bindings/dma/fsl-qdma.txt | 53
1 files changed, 53 insertions(+), 0 deletions(-)
create mode 100644
Previously if a older kernel runs on a newer firmware, it may enable
all available states irrespective of its capability of handling it.
New device tree format adds a compatible flag, so that only kernel
which has the capability to handle the version of stop state will enable
it.
Older kernel
This patch adds support for new device-tree format for idle state
description.
Previously if a older kernel runs on a newer firmware, it may enable
all available states irrespective of its capability of handling it.
New device tree format adds a compatible flag, so that only kernel
which has the
Passing pointer to the pnv_idle_state instead of psscr value and mask.
This helps us to pass more information to the stop loop. This will help to
figure out the method to enter/exit idle state.
Signed-off-by: Akshay Adiga
---
Changes from v1 :
- Code is rebased on Nick Piggin's v4 patch
From: Abhishek Goel
This patch moves the saving and restoring of sprs for P9 cpuidle
from kernel to opal.
In an attempt to make the powernv idle code backward compatible,
and to some extent forward compatible, add support for pre-stop entry
and post-stop exit actions in OPAL. If a kernel knows
On 10/11/18 3:35 AM, Kees Cook wrote:
> On Wed, Oct 10, 2018 at 5:32 PM, Michael Ellerman wrote:
>> Kees Cook writes:
>>> On Tue, Oct 9, 2018 at 10:13 PM, Michael Ellerman
>>> wrote:
Warn whenever a switch statement has a fallthrough without a comment
annotating it.
Le 09/10/2018 à 15:51, Christophe Leroy a écrit :
_PAGE_NO_CACHE is a platform specific flag. In addition, this flag
is misleading because one would think it requests a noncached page
whereas a noncached page is _PAGE_NO_CACHE | _PAGE_GUARDED
_PAGE_NO_CACHE alone means write combined
Le 09/10/2018 à 14:14, Nicholas Piggin a écrit :
On Tue, 9 Oct 2018 14:01:37 +0200
Christophe LEROY wrote:
Le 09/10/2018 à 13:16, Nicholas Piggin a écrit :
On Tue, 9 Oct 2018 09:36:18 +
Christophe Leroy wrote:
On 10/09/2018 05:30 AM, Nicholas Piggin wrote:
On Tue, 9 Oct 2018
Le 09/10/2018 à 13:16, Nicholas Piggin a écrit :
On Tue, 9 Oct 2018 09:36:18 +
Christophe Leroy wrote:
On 10/09/2018 05:30 AM, Nicholas Piggin wrote:
On Tue, 9 Oct 2018 06:46:30 +0200
Christophe LEROY wrote:
Le 09/10/2018 à 06:32, Nicholas Piggin a écrit :
On Mon, 8 Oct 2018
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