"Jason A. Donenfeld" writes:
> Hi folks,
>
> I'm actually still experiencing this sporadically in the WireGuard test
> suite, which you can see being run on https://build.wireguard.com/ .
Fancy dashboard you got there :)
> About 50% of the time the powerpc64 build will fail at a place like
On Mon, Dec 16, 2019 at 02:25:12PM -0800, John Hubbard wrote:
> Hi,
>
> This implements an API naming change (put_user_page*() -->
> unpin_user_page*()), and also implements tracking of FOLL_PIN pages. It
> extends that tracking to a few select subsystems. More subsystems will
> be added in follow
Hi All,
We still have some issues with PCI cards in our FSL P5020 and P5040
systems since the DMA mapping updates. [1, 2]
We have to limit the RAM to 3500MB for some problematic PCI cards.
(kernel boot argument 'mem=3500M')
The problematic DMA mapping code was added with the PowerPC
Commit d4e58e5928f8 ("powerpc/powernv: Enable POWER8 doorbell IPIs")
added a select of PPC_DOORBELL to PPC_PSERIES, but it already had a
select of PPC_DOORBELL. One is enough.
Reported-by: Jason A. Donenfeld
Signed-off-by: Michael Ellerman
---
arch/powerpc/platforms/pseries/Kconfig | 1 -
1
With CONFIG_QUICC_ENGINE enabled and CONFIG_UCC_GETH + CONFIG_SERIAL_QE
disabled we have an unused variable (np). The code won't compile with
-Werror.
Move the np variable to the block where it is actually used.
Signed-off-by: Sebastian Andrzej Siewior
---
On 19/12/2019 13:45, Michael Ellerman wrote:
> "Jason A. Donenfeld" writes:
>> Hi folks,
>>
>> I'm actually still experiencing this sporadically in the WireGuard test
>> suite, which you can see being run on https://build.wireguard.com/ .
>
> Fancy dashboard you got there :)
>
>> About 50% of
On Thu, Dec 19, 2019 at 02:08:29PM +0100, Cédric Le Goater wrote:
> On 19/12/2019 13:45, Michael Ellerman wrote:
> > "Jason A. Donenfeld" writes:
> >> Hi folks,
> >>
> >> I'm actually still experiencing this sporadically in the WireGuard test
> >> suite, which you can see being run on
On Thu, Dec 19, 2019 at 1:52 PM Michael Ellerman wrote:
> diff --git a/arch/powerpc/kernel/dbell.c b/arch/powerpc/kernel/dbell.c
> index f17ff1200eaa..e45cb9bba193 100644
> --- a/arch/powerpc/kernel/dbell.c
> +++ b/arch/powerpc/kernel/dbell.c
> @@ -63,7 +63,7 @@ int doorbell_try_core_ipi(int cpu)
On 12/19/19 1:07 PM, Jason Gunthorpe wrote:
On Thu, Dec 19, 2019 at 12:30:31PM -0800, John Hubbard wrote:
On 12/19/19 5:26 AM, Leon Romanovsky wrote:
On Mon, Dec 16, 2019 at 02:25:12PM -0800, John Hubbard wrote:
Hi,
This implements an API naming change (put_user_page*() -->
Bharata B Rao [bhar...@linux.ibm.com] wrote:
> On Sat, Dec 14, 2019 at 06:12:08PM -0800, Sukadev Bhattiprolu wrote:
> > +unsigned long kvmppc_h_svm_init_abort(struct kvm *kvm)
> > +{
> > + int i;
> > +
> > + if (!(kvm->arch.secure_guest & KVMPPC_SECURE_INIT_START))
> > + return
On Wed, 2019-12-18 at 15:13 -0800, Haren Myneni wrote:
> On Wed, 2019-12-18 at 18:18 +1100, Oliver O'Halloran wrote:
> > On Wed, Nov 27, 2019 at 12:07 PM Haren Myneni
> > wrote:
> > >
> > > *snip*
> > >
> > > @@ -36,7 +62,18 @@ static int init_vas_instance(struct platform_device
> > > *pdev)
>
On Mon, 2019-11-25 at 23:15 +0800, yingjie_...@126.com wrote:
> From: Bai Yingjie
>
> CPU like P4080 has 36bit physical address, its DDR physical
> start address can be configured above 4G by LAW registers.
>
> For such systems in which their physical memory start address was
> configured
On Thu, Dec 19, 2019 at 12:30:31PM -0800, John Hubbard wrote:
> On 12/19/19 5:26 AM, Leon Romanovsky wrote:
> > On Mon, Dec 16, 2019 at 02:25:12PM -0800, John Hubbard wrote:
> > > Hi,
> > >
> > > This implements an API naming change (put_user_page*() -->
> > > unpin_user_page*()), and also
Implement the H_SVM_INIT_ABORT hcall which the Ultravisor can use to
abort an SVM after it has issued the H_SVM_INIT_START and before the
H_SVM_INIT_DONE hcalls. This hcall could be used when Ultravisor
encounters security violations or other errors when starting an SVM.
Note that this hcall is
Add 'skip_page_out' parameter to kvmppc_uvmem_drop_pages() so the
callers can specify whetheter or not to skip paging out pages. This
will be needed in a follow-on patch that implements H_SVM_INIT_ABORT
hcall
Reviewed-by: Paul Mackerras
Signed-off-by: Sukadev Bhattiprolu
---
Paul Mackerras [pau...@ozlabs.org] wrote:
> On Sat, Dec 14, 2019 at 06:12:08PM -0800, Sukadev Bhattiprolu wrote:
> >
> > Implement the H_SVM_INIT_ABORT hcall which the Ultravisor can use to
> > abort an SVM after it has issued the H_SVM_INIT_START and before the
> > H_SVM_INIT_DONE hcalls. This
From: Colin Ian King
The variable bdp is being initialized with a value that is never
read and it is being updated later with a new value. The initialization
is redundant and can be removed.
Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King
---
drivers/tty/serial/ucc_uart.c |
On 12/19/19 5:26 AM, Leon Romanovsky wrote:
On Mon, Dec 16, 2019 at 02:25:12PM -0800, John Hubbard wrote:
Hi,
This implements an API naming change (put_user_page*() -->
unpin_user_page*()), and also implements tracking of FOLL_PIN pages. It
extends that tracking to a few select subsystems.
On 12/19/19 1:07 PM, Jason Gunthorpe wrote:
...
3. It would be nice if I could reproduce this. I have a two-node mlx5 Infiniband
test setup, but I have done only the tiniest bit of user space IB coding, so
if you have any test programs that aren't too hard to deal with that could
possibly hit
On Thu, 2019-12-19 at 16:16 +0100, Sebastian Andrzej Siewior wrote:
> With CONFIG_QUICC_ENGINE enabled and CONFIG_UCC_GETH + CONFIG_SERIAL_QE
> disabled we have an unused variable (np). The code won't compile with
> -Werror.
>
> Move the np variable to the block where it is actually used.
>
>
On 19/12/2019 10:28, Leonardo Bras wrote:
> On Wed, 2019-12-18 at 15:53 +1100, Alexey Kardashevskiy wrote:
>> H_STUFF_TCE is always called with 0. Well, may be some AIX somewhere
>> calls it with a value other than zero, and I probably saw some other
>> value somewhere but in QEMU/KVM case it
On Thu, Dec 19, 2019 at 12:49:44AM -0800, Haren Myneni wrote:
>
> Virtual Accelerator Switchboard (VAS) can provide support different
> accelerators, Right now only NX is used, but possible to extend to
> others in future. Or different functionalities such as fast thread
> wakeup (VAS feature)
https://bugzilla.kernel.org/show_bug.cgi?id=205283
--- Comment #4 from Christophe Leroy (christophe.le...@c-s.fr) ---
Can you apply https://patchwork.ozlabs.org/patch/1213028/ and select
CONFIG_KASAN_VMALLOC
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On Wed, Dec 18, 2019 at 7:23 PM Daniel Axtens wrote:
>
> Jordan Niethe writes:
>
> > Add the bit definition for exceptions caused by prefixed instructions.
> >
> > Signed-off-by: Jordan Niethe
> > ---
> > arch/powerpc/include/asm/reg.h | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff
On 11/12/2019 21:42, Jan Kara wrote:
> The last jump to free_exit in mm_iommu_do_alloc() happens after page
> pointers in struct mm_iommu_table_group_mem_t were already converted to
> physical addresses. Thus calling put_page() on these physical addresses
> will likely crash. Convert physical
On Wed, Dec 18, 2019 at 7:35 PM Daniel Axtens wrote:
>
> Jordan Niethe writes:
>
> > Currently all instructions are a single word long. A future ISA version
> > will include prefixed instructions which have a double word length. The
> > functions used for analysing and emulating instructions
On Thu, Dec 19, 2019 at 1:15 AM Daniel Axtens wrote:
>
> Jordan Niethe writes:
>
> > Currently all instructions are a single word long. A future ISA version
> > will include prefixed instructions which have a double word length. The
> > functions used for analysing and emulating instructions
Le 20/12/2019 à 06:11, Jordan Niethe a écrit :
On Wed, Dec 18, 2019 at 7:35 PM Daniel Axtens wrote:
Jordan Niethe writes:
Currently all instructions are a single word long. A future ISA version
will include prefixed instructions which have a double word length. The
functions used for
On 18/12/2019 11:27, Alexey Budankov wrote:
Open access to i915_perf monitoring for CAP_SYS_PERFMON privileged
processes. For backward compatibility reasons access to i915_perf
subsystem remains open for CAP_SYS_ADMIN privileged processes but
CAP_SYS_ADMIN usage for secure i915_perf monitoring
Christophe Leroy writes:
> On 12/19/2019 12:36 AM, Daniel Axtens wrote:
>> KASAN support on Book3S is a bit tricky to get right:
>>
>> - It would be good to support inline instrumentation so as to be able to
>> catch stack issues that cannot be caught with outline mode.
>>
>> - Inline
On Tue, 2019-12-17 at 17:33 +0800, Herbert Xu wrote:
> On Sun, Dec 15, 2019 at 05:05:19AM -0800, Haren Myneni wrote:
> >
> > On power9, userspace can send GZIP compression requests directly to NX
> > once kernel establishes NX channel / window. This patch provides GZIP
> > engine access to user
On 12/19/2019 10:05 AM, Christophe Leroy wrote:
Le 19/12/2019 à 10:50, Daniel Axtens a écrit :
Christophe Leroy writes:
On 12/19/2019 12:36 AM, Daniel Axtens wrote:
KASAN support on Book3S is a bit tricky to get right:
- It would be good to support inline instrumentation so as to
Hi folks,
I'm actually still experiencing this sporadically in the WireGuard test
suite, which you can see being run on https://build.wireguard.com/ .
About 50% of the time the powerpc64 build will fail at a place like this:
[ 65.147823] Oops: Exception in kernel mode, sig: 4 [#1]
[
On 2019-12-19 11:41:21 [+0100], Jason A. Donenfeld wrote:
> Hi folks,
Hi,
so this should duct tape it:
diff --git a/arch/powerpc/kernel/dbell.c b/arch/powerpc/kernel/dbell.c
index f17ff1200eaae..ec044bdf362a1 100644
--- a/arch/powerpc/kernel/dbell.c
+++ b/arch/powerpc/kernel/dbell.c
@@ -60,16
On Thu, Dec 19, 2019 at 12:13 PM Sebastian Andrzej Siewior
wrote:
> Based on my understanding is that the doorbell feature is part of the
> architecture. It can be used to signal other siblings on the same CPU.
> qemu TCG doesn't support that and does not allow to announce multiple
> siblings on
Use DEFINE_DEBUGFS_ATTRIBUTE rather than DEFINE_SIMPLE_ATTRIBUTE for
debugfs files.
In order to protect against file removal races, debugfs files created via
debugfs_create_file() are wrapped by a struct file_operations at their
opening.
If the original struct file_operations is known to be safe
Le 19/12/2019 à 10:50, Daniel Axtens a écrit :
Christophe Leroy writes:
On 12/19/2019 12:36 AM, Daniel Axtens wrote:
KASAN support on Book3S is a bit tricky to get right:
- It would be good to support inline instrumentation so as to be able to
catch stack issues that cannot be
Sukadev Bhattiprolu writes:
> Michael Ellerman [m...@ellerman.id.au] wrote:
>>
>> eg. here.
>>
>> This is the fast path of context switch.
>>
>> That expands to:
>>
>> if (!(mfmsr() & MSR_S))
>> asm volatile("mfspr %0, SPRN_BESCR" : "=r" (rval));
>> if (!(mfmsr() &
Daniel Axtens writes:
> Christophe Leroy writes:
>> On 12/19/2019 12:36 AM, Daniel Axtens wrote:
>>> KASAN support on Book3S is a bit tricky to get right:
...
>>> diff --git a/arch/powerpc/include/asm/kasan.h
>>> b/arch/powerpc/include/asm/kasan.h
>>> index 296e51c2f066..f18268cbdc33 100644
>>>
Dave Hansen writes:
> On 12/18/19 12:59 PM, Michal Suchánek wrote:
>>> I'd really just rather do %016lx *everywhere* than sprinkle the
>>> PKEY_REG_FMTs around.
>> Does lx work with u32 without warnings?
>
> Either way, I'd be happy to just make the x86 one u64 to make the whole
> thing look more
Steven Price writes:
> walk_page_range() is going to be allowed to walk page tables other than
> those of user space. For this it needs to know when it has reached a
> 'leaf' entry in the page tables. This information is provided by the
> p?d_leaf() functions/macros.
>
> For powerpc p?d_is_leaf()
On Tue, Dec 17, 2019 at 10:32:35AM -0800, Linus Torvalds wrote:
> On Tue, Dec 17, 2019 at 10:04 AM Linus Torvalds
> wrote:
> >
> > Let me think about it.
>
> How about we just get rid of the union entirely, and just use
> 'unsigned long' or 'unsigned long long' depending on the size.
>
>
Christophe Leroy writes:
> Le 19/12/2019 à 10:50, Daniel Axtens a écrit :
>> Christophe Leroy writes:
>>
>>> On 12/19/2019 12:36 AM, Daniel Axtens wrote:
KASAN support on Book3S is a bit tricky to get right:
- It would be good to support inline instrumentation so as to be
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