On Wed, Apr 01, 2020 at 03:12:53PM +0530, Naveen N. Rao wrote:
> Hi Gautham,
>
> Gautham R. Shenoy wrote:
> >From: "Gautham R. Shenoy"
> >
> >Currently when CPU goes idle, we take a snapshot of PURR via
> >pseries_idle_prolog() which is used at the CPU idle exit to compute
> >the idle PURR
No users of hvcs_driver_string, remove it. This fixes the following gcc
warning:
drivers/tty/hvc/hvcs.c:199:19: warning: ‘hvcs_driver_string’ defined but
not used [-Wunused-const-variable=]
static const char hvcs_driver_string[]
^~
Reported-by: Hulk Robot
Now we have user_read_access_begin() and user_write_access_begin()
in addition to user_access_begin().
Make it explicit that user_access_begin() provides both read and
write by renaming it user_full_access_begin(). And the same for
user_access_end() which becomes user_full_access_end().
Done
Some architectures like powerpc64 have the capability to separate
read access and write access protection.
For get_user() and copy_from_user(), powerpc64 only open read access.
For put_user() and copy_to_user(), powerpc64 only open write access.
But when using unsafe_get_user() or
When opening user access to only perform reads, only open read access.
When opening user access to only perform writes, only open write
access.
Signed-off-by: Christophe Leroy
Reviewed-by: Kees Cook
---
v2: Fixed a mismatched use of _read_ and _write_ in compat_get_bitmap()
and
Hi Wen,
Can you please try this? It contains 3 patches from Christoph Hellwig
plus my patch on top, this should improve performance when DMA-ing not
to/from persistent memory:
https://github.com/aik/linux/commits/dma-bypass.3
I am looking for any benchmarks not related to persistent memory.
Leonardo Bras's on April 3, 2020 10:37 am:
> On Thu, 2020-04-02 at 22:28 +1100, Michael Ellerman wrote:
>> Leonardo Bras writes:
>> > During a crash, there is chance that the cpus that handle the NMI IPI
>> > are holding a spin_lock. If this spin_lock is needed by crashing_cpu it
>> > will cause
Add support for selective read or write user access with
user_read_access_begin/end and user_write_access_begin/end.
Signed-off-by: Christophe Leroy
Reviewed-by: Kees Cook
---
v2: no change
---
arch/powerpc/include/asm/book3s/32/kup.h | 4 ++--
arch/powerpc/include/asm/kup.h | 14
On 03. 04. 20, 9:13, Jason Yan wrote:
> No users of hvcs_driver_string, remove it. This fixes the following gcc
> warning:
>
> drivers/tty/hvc/hvcs.c:199:19: warning: ‘hvcs_driver_string’ defined but
> not used [-Wunused-const-variable=]
> static const char hvcs_driver_string[]
>
On Fri, 2020-04-03 at 00:18 +0530, Naveen N. Rao wrote:
> Naveen N. Rao wrote:
> > Russell Currey wrote:
> > > With CONFIG_STRICT_KERNEL_RWX=y and CONFIG_KPROBES=y, there will
> > > be one
> > > W+X page at boot by default. This can be tested with
> > > CONFIG_PPC_PTDUMP=y and
On 4/2/20 5:43 PM, Frederic Barrat wrote:
> We now allocate interrupts through xive directly.
>
> Signed-off-by: Frederic Barrat
Reviewed-by: Cédric Le Goater
> ---
> arch/powerpc/include/asm/pnv-ocxl.h | 3 ---
> arch/powerpc/platforms/powernv/ocxl.c | 30 ---
>
Hi Naveen,
On Thu, Apr 02, 2020 at 01:04:34PM +0530, Naveen N. Rao wrote:
[..snip..]
> >
> >It does reduce it to 10ms window. I am not sure if anyone samples PURR
> >etc faster than that rate.
> >
> >I measured how much time it takes to read the purr, spurr, idle_purr,
> >idle_spurr files
On 04/02/20 at 09:46pm, Hoan Tran wrote:
> Hi All,
>
> On 3/31/20 7:31 AM, Baoquan He wrote:
> > On 03/31/20 at 04:21pm, Michal Hocko wrote:
> > > On Tue 31-03-20 22:03:32, Baoquan He wrote:
> > > > Hi Michal,
> > > >
> > > > On 03/31/20 at 10:55am, Michal Hocko wrote:
> > > > > On Tue 31-03-20
On 4/2/20 9:00 AM, Haren Myneni wrote:
>
> On power9, Virtual Accelerator Switchboard (VAS) allows user space or
> kernel to communicate with Nest Accelerator (NX) directly using COPY/PASTE
> instructions. NX provides various functionalities such as compression,
> encryption and etc. But only
On 2020/4/3 12:58, Michael Ellerman wrote:
> YueHaibing writes:
>> gcc build fails:
>
> What config? Custom?
A randconfig, CONFIG_PPC_PSERIES is not set, see attach.
>
>> arch/powerpc/mm/ptdump/hashpagetable.c: In function ‘pseries_find’:
>> arch/powerpc/mm/ptdump/hashpagetable.c:262:18:
Michal Suchánek's on March 25, 2020 5:30 am:
> On Tue, Mar 24, 2020 at 06:54:20PM +1000, Nicholas Piggin wrote:
>> Michal Suchanek's on March 19, 2020 10:19 pm:
>> > diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c
>> > index 4b0152108f61..a264989626fd 100644
>> > ---
Christophe Leroy's on April 1, 2020 9:48 pm:
>
>
> Le 31/03/2020 à 17:22, Christophe Leroy a écrit :
>> That's first try to port PPC64 syscall entry/exit logic in C to PPC32.
>> I've do the minimum to get it work. I have not reworked calls
>> to sys_fork() and friends for instance.
>>
>> For
On 26/03/2020 12:26, Alexey Kardashevskiy wrote:
>
>
> On 25/03/2020 19:37, Christoph Hellwig wrote:
>> On Wed, Mar 25, 2020 at 03:51:36PM +1100, Alexey Kardashevskiy wrote:
> This is for persistent memory which you can DMA to/from but yet it does
> not appear in the system as a
Michal Suchánek's on March 25, 2020 5:38 am:
> On Tue, Mar 24, 2020 at 06:48:20PM +1000, Nicholas Piggin wrote:
>> Michal Suchanek's on March 19, 2020 10:19 pm:
>> > There are two almost identical copies for 32bit and 64bit.
>> >
>> > The function is used only in 32bit code which will be split
On Mon, 2020-03-30 at 15:56 +1100, Sam Bobroff wrote:
> When EEH device state was released asynchronously by the device
> release handler, it was possible for an outstanding reference to
> prevent it's release and it was necessary to work around that if a
> device was re-discovered at the same PCI
On 4/2/20 5:43 PM, Frederic Barrat wrote:
> Existing users of ocxl_link_irq_alloc() have been converted to obtain
> the trigger page of an interrupt through xive directly, we therefore
> have no need to return the trigger page when allocating an interrupt.
>
> It also allows ocxl to use the xive
When i915_gem_execbuffer2_ioctl() is using user_access_begin(),
that's only to perform unsafe_put_user() so use
user_write_access_begin() in order to only open write access.
Signed-off-by: Christophe Leroy
Reviewed-by: Kees Cook
---
v2: Rebased (one part of the patch flies away)
---
On 3/4/20 2:43 am, Frederic Barrat wrote:
We can access the trigger page through standard APIs so let's use it
and avoid saving it when allocating the interrupt. It will also allow
to simplify allocation in a later patch.
Signed-off-by: Frederic Barrat
I don't see any obvious issues.
while PPC_PSERIES is not set, gcc build fails:
arch/powerpc/mm/ptdump/hashpagetable.c: In function ‘pseries_find’:
arch/powerpc/mm/ptdump/hashpagetable.c:262:18: error: ‘H_SUCCESS’ undeclared
(first use in this function); did you mean ‘FL_ACCESS’?
if (lpar_rc != H_SUCCESS)
On Thu, 2020-04-02 at 12:34 +0530, Naveen N. Rao wrote:
> Michael Ellerman wrote:
> > "Naveen N. Rao" writes:
> > > Balamuruhan S wrote:
> > > > Few ppc instructions are encoded in test_emulate_step.c, consolidate
> > > > them to
> > > > ppc-opcode.h, fix redefintion errors in bpf_jit caused due
Michal Suchanek's on March 19, 2020 10:19 pm:
> Less code means less bugs so add a knob to skip the compat stuff.
>
> Changes in v2: saner CONFIG_COMPAT ifdefs
> Changes in v3:
> - change llseek to 32bit instead of builing it unconditionally in fs
> - clanup the makefile conditionals
> -
Le 03/04/2020 à 09:25, Nicholas Piggin a écrit :
Michal Suchanek's on March 19, 2020 10:19 pm:
Less code means less bugs so add a knob to skip the compat stuff.
Changes in v2: saner CONFIG_COMPAT ifdefs
Changes in v3:
- change llseek to 32bit instead of builing it unconditionally in fs
On 4/2/20 5:43 PM, Frederic Barrat wrote:
> We can access the trigger page through standard APIs so let's use it
> and avoid saving it when allocating the interrupt. It will also allow
> to simplify allocation in a later patch.
>
> Signed-off-by: Frederic Barrat
Reviewed-by: Cédric Le Goater
Commit 8150a153c013 ("powerpc/64s: Use early_mmu_has_feature() in
set_kuap()"), had to switch to using the _early feature test, because
probe_kernel_read was being called very early. After the previous
patch, probe_kernel_read no longer touches kuap, so it can go back to
using the non-_early
Russell Currey wrote:
On Fri, 2020-04-03 at 15:06 +0530, Naveen N. Rao wrote:
Russell Currey wrote:
> On Fri, 2020-04-03 at 00:18 +0530, Naveen N. Rao wrote:
> > Naveen N. Rao wrote:
> > > Russell Currey wrote:
> > > >
> > > > +void *alloc_insn_page(void)
> > > > +{
> > > > + void *page =
From: network
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/soc/fsl/qbman/bman.c:640:6: warning: variable ‘err’ set but not used
[-Wunused-but-set-variable]
int err = 0;
^~~
err is never used, so remove it.
Reported-by: Hulk Robot
Signed-off-by: Zheng Yongjun
Signed-off-by:
Christophe Leroy's on April 3, 2020 8:31 pm:
>
>
> Le 03/04/2020 à 11:35, Nicholas Piggin a écrit :
>> There is no need to allow user accesses when probing kernel addresses.
>
> I just discovered the following commit
>
Christophe Leroy's on March 27, 2020 5:21 pm:
>
>
> Le 27/03/2020 à 08:02, Nicholas Piggin a écrit :
>> get/put_user can be called with nontrivial arguments. fs/proc/page.c
>> has a good example:
>>
>> if (put_user(stable_page_flags(ppage), out)) {
>>
>> stable_page_flags is quite a lot
+cc linuxppc-dev@lists.ozlabs.org
On 2020/4/3 16:54, Yuehaibing wrote:
>
>
> On 2020/4/3 13:29, Stephen Rothwell wrote:
>> Hi all,
>>
>> The merge window has opened, so please do not add any material for the
>> next release into your linux-next included trees/branches until after
>> the merge
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/uaccess.h | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/include/asm/uaccess.h
b/arch/powerpc/include/asm/uaccess.h
index 144d01645d68..c6b0203c3750 100644
---
The tm-poison test includes inline asm which is 64-bit only, so the
test must be built 64-bit in order to work.
Otherwise it fails, eg:
# file tm-poison
tm-poison: ELF 32-bit MSB executable, PowerPC or cisco 4500, version 1 (SYSV)
...
# ./tm-poison
test: tm_poison_test
Unknown value
Christophe Leroy's on March 27, 2020 5:13 pm:
>
>
> Le 27/03/2020 à 08:02, Nicholas Piggin a écrit :
>> There is no need to allow user accesses when probing kernel addresses.
>>
>> Signed-off-by: Nicholas Piggin
>> ---
>> arch/powerpc/include/asm/uaccess.h | 25 ++-
>>
On Thu, 2 Apr 2020 17:43:50 +0200
Frederic Barrat wrote:
> We can access the trigger page through standard APIs so let's use it
> and avoid saving it when allocating the interrupt. It will also allow
> to simplify allocation in a later patch.
>
> Signed-off-by: Frederic Barrat
> ---
On Thu, 2 Apr 2020 17:43:52 +0200
Frederic Barrat wrote:
> We now allocate interrupts through xive directly.
>
> Signed-off-by: Frederic Barrat
> ---
> arch/powerpc/include/asm/pnv-ocxl.h | 3 ---
> arch/powerpc/platforms/powernv/ocxl.c | 30 ---
Nice diffstat :)
On Thu, 2 Apr 2020 17:43:51 +0200
Frederic Barrat wrote:
> Existing users of ocxl_link_irq_alloc() have been converted to obtain
> the trigger page of an interrupt through xive directly, we therefore
> have no need to return the trigger page when allocating an interrupt.
>
> It also allows
Alexey Kardashevskiy writes:
> Unlike normal memory ("memory" compatible type in the FDT),
> the persistent memory ("ibm,pmemory" in the FDT) can be mapped anywhere
> in the guest physical space and it can be used for DMA.
>
> In order to maintain 1:1 mapping via the huge DMA window, we need to
On 4/3/20 1:19 AM, Matthew R. Ochs wrote:
> On Thu, Apr 02, 2020 at 05:43:49PM +0200, Frederic Barrat wrote:
>> xive is already mapping the trigger page in kernel space and it can be
>> accessed through standard APIs, so let's reuse it and simplify the code.
>>
>> Signed-off-by: Frederic Barrat
On Fri, Apr 03, 2020 at 09:26:27PM +1000, Nicholas Piggin wrote:
> Michal Suchánek's on April 3, 2020 8:52 pm:
> > Hello,
> >
> > there are 3 variants of the function
> >
> > read_user_stack_64
> >
> > 32bit read_user_stack_32
> > 64bit read_user_Stack_32
>
> Right.
>
> > On Fri, Apr 03, 2020
On Fri, 2020-04-03 at 15:06 +0530, Naveen N. Rao wrote:
> Russell Currey wrote:
> > On Fri, 2020-04-03 at 00:18 +0530, Naveen N. Rao wrote:
> > > Naveen N. Rao wrote:
> > > > Russell Currey wrote:
> > > > > With CONFIG_STRICT_KERNEL_RWX=y and CONFIG_KPROBES=y, there
> > > > > will
> > > > > be one
Christophe Leroy's on April 3, 2020 5:26 pm:
>
>
> Le 03/04/2020 à 09:25, Nicholas Piggin a écrit :
>> Michal Suchanek's on March 19, 2020 10:19 pm:
>>> Less code means less bugs so add a knob to skip the compat stuff.
>>>
>>> Changes in v2: saner CONFIG_COMPAT ifdefs
>>> Changes in v3:
>>> -
Russell Currey wrote:
On Fri, 2020-04-03 at 00:18 +0530, Naveen N. Rao wrote:
Naveen N. Rao wrote:
> Russell Currey wrote:
> > With CONFIG_STRICT_KERNEL_RWX=y and CONFIG_KPROBES=y, there will
> > be one
> > W+X page at boot by default. This can be tested with
> > CONFIG_PPC_PTDUMP=y and
On Thu, Apr 02, 2020 at 11:35:57AM -0700, Kees Cook wrote:
> On Thu, Apr 02, 2020 at 06:50:32PM +0100, Al Viro wrote:
> > On Thu, Apr 02, 2020 at 07:03:28PM +0200, Christophe Leroy wrote:
> >
> > > user_access_begin() grants both read and write.
> > >
> > > This patch adds
Le 03/04/2020 à 11:35, Nicholas Piggin a écrit :
There is no need to allow user accesses when probing kernel addresses.
I just discovered the following commit
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=75a1a607bb7e6d918be3aca11ec2214a275392f4
This
Michal Suchánek's on April 3, 2020 8:52 pm:
> Hello,
>
> there are 3 variants of the function
>
> read_user_stack_64
>
> 32bit read_user_stack_32
> 64bit read_user_Stack_32
Right.
> On Fri, Apr 03, 2020 at 05:13:25PM +1000, Nicholas Piggin wrote:
[...]
>> #endif /* CONFIG_PPC64 */
>>
>>
This patch provides kernel framework fro opal support of save restore
of sprs in idle stop loop. Opal support for stop states is needed to
selectively enable stop states or to introduce a quirk quickly in case
a buggy stop state is present.
We make a opal call from kernel if firmware-stop-support
get/put_user can be called with nontrivial arguments. fs/proc/page.c
has a good example:
if (put_user(stable_page_flags(ppage), out)) {
stable_page_flags is quite a lot of code, including spin locks in the
page allocator.
Ensure these arguments are evaluated before user access is allowed.
Nicholas Piggin's on April 3, 2020 7:35 pm:
> Signed-off-by: Nicholas Piggin
Sorry that was a bad rebase, here's the fixed patch.
---
arch/powerpc/include/asm/uaccess.h | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/uaccess.h
Gautham R Shenoy wrote:
On Wed, Apr 01, 2020 at 03:12:53PM +0530, Naveen N. Rao wrote:
Hi Gautham,
Gautham R. Shenoy wrote:
>From: "Gautham R. Shenoy"
>
>+
>+static inline u64 read_this_idle_purr(void)
>+{
>+ /*
>+* If we are reading from an idle context, update the
>+* idle-purr
Hello,
there are 3 variants of the function
read_user_stack_64
32bit read_user_stack_32
64bit read_user_Stack_32
On Fri, Apr 03, 2020 at 05:13:25PM +1000, Nicholas Piggin wrote:
> Michal Suchánek's on March 25, 2020 5:38 am:
> > On Tue, Mar 24, 2020 at 06:48:20PM +1000, Nicholas Piggin wrote:
There is no need to allow user accesses when probing kernel addresses.
Signed-off-by: Nicholas Piggin
---
v2:
- Enable for all powerpc (suggested by Christophe)
- Fold helper function together (Christophe)
- Rename uaccess.c to maccess.c to match kernel/maccess.c.
On Fri, Apr 03, 2020 at 01:58:31AM +0100, Al Viro wrote:
> On Thu, Apr 02, 2020 at 11:35:57AM -0700, Kees Cook wrote:
>
> > Yup, I think it's a weakness of the ARM implementation and I'd like to
> > not extend it further. AFAIK we should never nest, but I would not be
> > surprised at all if we
Mahesh J Salgaonkar's on March 27, 2020 3:24 pm:
> On 2020-03-25 20:34:06 Wed, Nicholas Piggin wrote:
>> This allows rtas_args to be put on the machine check stack, which
>> avoids a lot of complications with re-entrancy deadlocks.
>>
>> Signed-off-by: Nicholas Piggin
>> ---
>>
On Fri, Apr 03, 2020 at 01:58:31AM +0100, Al Viro wrote:
> On Thu, Apr 02, 2020 at 11:35:57AM -0700, Kees Cook wrote:
> > Yup, I think it's a weakness of the ARM implementation and I'd like to
> > not extend it further. AFAIK we should never nest, but I would not be
> > surprised at all if we did.
There's a bunch of problems we hit bringing up fwnmi sreset and testing
with mce injection on QEMU. Mostly pseries issues.
This series of fixes applies on top of next-test, the machine
check reconcile patch won't apply cleanly to previous kernels but
it might want to be backported. We can do that
The architecture allows for machine check exceptions to cause idle
wakeups which resume at the 0x200 address which has to return via
the idle wakeup code, but the early machine check handler is run
first.
The case of a no state-loss sleep is broken because the early
handler uses non-volatile
Acked-by: Mahesh Salgaonkar
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.S | 4
1 file changed, 4 insertions(+)
diff --git a/arch/powerpc/kernel/exceptions-64s.S
b/arch/powerpc/kernel/exceptions-64s.S
index bbf3109c5cba..3322000316ab 100644
---
This was discovered developing qemu fwnmi sreset support. This
off-by-one bug means the last 16 bytes of the rtas area can not
be used for a 16 byte save area.
It's not a serious bug, and QEMU implementation has to retain a
workaround for old kernels, but it's good to tighten it.
Acked-by:
With the previous patch, machine checks can use rtas_call_unlocked
which avoids the rtas spinlock which would deadlock if a machine
check hits while making an rtas call.
This also avoids the complex rtas error logging which has more rtas calls
and includes kmalloc (which can return memory beyond
Similarly to the previous patch, do not trace system reset. This code
is used when there is a crash or hang, and tracing disturbs the system
more and has been known to crash in the crash handling path.
Acked-by: Naveen N. Rao
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/traps.c | 5
On Thu, Apr 02, 2020 at 04:51:57PM -0300, Leonardo Bras wrote:
> While providing guests, it's desirable to resize it's memory on demand.
>
> By now, it's possible to do so by creating a guest with a small base
> memory, hot-plugging all the rest, and using 'movable_node' kernel
> command-line
Le 03/04/2020 à 15:26, Nicholas Piggin a écrit :
Similarly to the previous patch, do not trace system reset. This code
is used when there is a crash or hang, and tracing disturbs the system
more and has been known to crash in the crash handling path.
Acked-by: Naveen N. Rao
Signed-off-by:
machine_check_early is taken as an NMI, so nmi_enter is used there.
machine_check_exception is no longer taken as an NMI (it's invoked
via irq_work in the case a machine check hits in kernel mode), so
remove the nmi_enter from that case.
In NMI context, hash faults don't try to refill the hash
System Reset and Machine Check interrupts that are not recoverable due
to being nested or interrupting when RI=0 currently panic. This is
not necessary, and can often just kill the current context and recover.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/traps.c | 6 +++---
1 file
Le 03/04/2020 à 15:26, Nicholas Piggin a écrit :
PAPR does not specify that fwnmi sreset should be interlocked, and
PowerVM (and therefore now QEMU) do not require it.
These "ibm,nmi-interlock" calls are ignored by firmware, but there
is a possibility that the sreset could have interrupted a
We now allocate interrupts through xive directly.
Reviewed-by: Cédric Le Goater
Reviewed-by: Greg Kurz
Signed-off-by: Frederic Barrat
---
arch/powerpc/include/asm/pnv-ocxl.h | 3 ---
arch/powerpc/platforms/powernv/ocxl.c | 30 ---
2 files changed, 33 deletions(-)
Existing users of ocxl_link_irq_alloc() have been converted to obtain
the trigger page of an interrupt through xive directly, we therefore
have no need to return the trigger page when allocating an interrupt.
It also allows ocxl to use the xive native interface to allocate
interrupts, instead of
A spare interrupt stack slot is needed to save irq state when
reconciling NMIs (sreset and decrementer soft-nmi). _DAR is used
for this, but we want to reconcile machine checks as well, which
do use _DAR. Switch to using RESULT instead, as it's used by
system calls.
Signed-off-by: Nicholas Piggin
In the interest of reducing code and possible failures in the
machine check and system reset paths, grab the "ibm,nmi-interlock"
token at init time.
Reviewed-by: Mahesh Salgaonkar
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/firmware.h| 1 +
This allows rtas_args to be put on the machine check stack, which
avoids a lot of complications with re-entrancy deadlocks.
Reviewed-by: Mahesh Salgaonkar
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/setup_64.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
Rather than notrace annotations throughout a significant part of the
machine check code across kernel/ pseries/ and powernv/ which can
easily be broken and is infrequently tested, use paca->ftrace_enabled
to blanket-disable tracing of the real-mode non-maskable handler.
Acked-by: Naveen N. Rao
On Fri, Apr 03, 2020 at 12:26:10PM +0100, Catalin Marinas wrote:
> On Fri, Apr 03, 2020 at 01:58:31AM +0100, Al Viro wrote:
> > On Thu, Apr 02, 2020 at 11:35:57AM -0700, Kees Cook wrote:
> > > Yup, I think it's a weakness of the ARM implementation and I'd like to
> > > not extend it further. AFAIK
Le 03/04/2020 à 15:26, Nicholas Piggin a écrit :
This was discovered developing qemu fwnmi sreset support. This
off-by-one bug means the last 16 bytes of the rtas area can not
be used for a 16 byte save area.
It's not a serious bug, and QEMU implementation has to retain a
workaround for old
If there is some error with the fwnmi save area, r3 has already been
modified which doesn't help with debugging.
Only update r3 when to restore the saved value.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/platforms/pseries/ras.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
Le 03/04/2020 à 15:26, Nicholas Piggin a écrit :
In the interest of reducing code and possible failures in the
machine check and system reset paths, grab the "ibm,nmi-interlock"
token at init time.
Reviewed-by: Mahesh Salgaonkar
Signed-off-by: Nicholas Piggin
---
Make ppc_save_regs a bit more useful:
- Set NIP to our caller rather rather than the caller's caller (which is
what we save to LR in the stack frame).
- Set SOFTE to the current irq soft-mask state rather than
uninitialised.
- Zero CFAR rather than leave it uninitialised.
In qemu, injecting a
We can access the trigger page through standard APIs so let's use it
and avoid saving it when allocating the interrupt. It will also allow
to simplify allocation in a later patch.
Reviewed-by: Cédric Le Goater
Acked-by: Andrew Donnellan
Reviewed-by: Greg Kurz
Signed-off-by: Frederic Barrat
pseries fwnmi machine check code pops the soft-irq checks in rtas_call
(after the previous patch to remove rtas_token from this call path).
Rather than play whack a mole with these and forever having fragile
code, it seems better to have the early machine check handler perform
the same kind of
PAPR does not specify that fwnmi sreset should be interlocked, and
PowerVM (and therefore now QEMU) do not require it.
These "ibm,nmi-interlock" calls are ignored by firmware, but there
is a possibility that the sreset could have interrupted a machine
check and release the machine check's
Le 03/04/2020 à 15:26, Nicholas Piggin a écrit :
This allows rtas_args to be put on the machine check stack, which
avoids a lot of complications with re-entrancy deadlocks.
Reviewed-by: Mahesh Salgaonkar
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/setup_64.c | 17
Hi!
On Fri, Apr 03, 2020 at 03:10:54PM +1100, Alistair Popple wrote:
> +#define PCR_ARCH_300 0x10/* Architecture 3.00 */
It's called 3.0, not 3.00?
Segher
xive is already mapping the trigger page in kernel space and it can be
accessed through standard APIs, so let's reuse it and simplify the code.
Signed-off-by: Frederic Barrat
---
Changelog:
v2: Define rc = -ENXIO on the error path (Matt)
drivers/scsi/cxlflash/ocxl_hw.c | 18
On Fri, Apr 03, 2020 at 02:37:19PM +0100, Russell King - ARM Linux admin wrote:
> > I think uaccess_enable() could indeed switch the kernel domain if
> > KERNEL_DS is set and move this out of set_fs(). It would reduce the
> > window the kernel domain permissions are overridden. Anyway,
> >
On Fri, Apr 3, 2020 at 12:21 AM Christophe Leroy
wrote:
>
> Now we have user_read_access_begin() and user_write_access_begin()
> in addition to user_access_begin().
I realize Al asked for this, but I don't think it really adds anything
to the series.
The "full" makes the names longer, but not
On Tue, Mar 31, 2020 at 7:33 AM Vaibhav Jain wrote:
>
> Add PAPR-scm family of DSM command-set to the white list of NVDIMM
> command sets.
>
> Signed-off-by: Vaibhav Jain
> ---
> Changelog:
>
> v4..v5 : None
>
> v3..v4 : None
>
> v2..v3 : Updated the patch prefix to 'ndctl/uapi' [Aneesh]
>
>
On Fri, Apr 03, 2020 at 05:38:35PM +0200, Frederic Barrat wrote:
> xive is already mapping the trigger page in kernel space and it can be
> accessed through standard APIs, so let's reuse it and simplify the code.
>
> Signed-off-by: Frederic Barrat
Looks good!
Acked-by: Matthew R. Ochs
> ---
On 4/4/20 2:38 am, Frederic Barrat wrote:
Existing users of ocxl_link_irq_alloc() have been converted to obtain
the trigger page of an interrupt through xive directly, we therefore
have no need to return the trigger page when allocating an interrupt.
It also allows ocxl to use the xive native
On 4/4/20 2:38 am, Frederic Barrat wrote:
We now allocate interrupts through xive directly.
Reviewed-by: Cédric Le Goater
Reviewed-by: Greg Kurz
Signed-off-by: Frederic Barrat
---
No obvious issues on a cursory review
Acked-by: Andrew Donnellan
--
Andrew Donnellan OzLabs,
Hi,
On 4/3/20 12:09 AM, Baoquan He wrote:
On 04/02/20 at 09:46pm, Hoan Tran wrote:
Hi All,
On 3/31/20 7:31 AM, Baoquan He wrote:
On 03/31/20 at 04:21pm, Michal Hocko wrote:
On Tue 31-03-20 22:03:32, Baoquan He wrote:
Hi Michal,
On 03/31/20 at 10:55am, Michal Hocko wrote:
On Tue 31-03-20
Short series to cleanup AFU interrupt allocation for opencapi.
Current code was using its own allocation service, calling opal
directly to get the trigger page. This is not needed and we can use
xive to achieve the same thing. The only caveat is that the trigger
page address is only valid after
On 4/3/20 5:38 PM, Frederic Barrat wrote:
> xive is already mapping the trigger page in kernel space and it can be
> accessed through standard APIs, so let's reuse it and simplify the code.
>
> Signed-off-by: Frederic Barrat
Reviewed-by: Cédric Le Goater
Thanks,
C.
> ---
> Changelog:
>
On Tue, Mar 31, 2020 at 7:33 AM Vaibhav Jain wrote:
>
> Implement support for handling PAPR DSM commands in papr_scm
> module. We advertise support for ND_CMD_CALL for the dimm command mask
> and implement necessary scaffolding in the module to handle ND_CMD_CALL
> ioctl and DSM commands that we
Gautham R Shenoy writes:
> On Thu, Apr 02, 2020 at 01:04:34PM +0530, Naveen N. Rao wrote:
>> >>
>> >>I wonder if we should introduce a sysctl interface to control thresholding.
>> >>It can default to 0, which disables thresholding so that the existing
>> >>behavior continues. Applications
Ram Pai writes:
> On Tue, Mar 31, 2020 at 08:53:07PM -0300, Thiago Jung Bauermann wrote:
>>
>> Hi Ram,
>>
>> Ram Pai writes:
>>
>> > diff --git a/arch/powerpc/sysdev/xive/spapr.c
>> > b/arch/powerpc/sysdev/xive/spapr.c
>> > index 55dc61c..608b52f 100644
>> > ---
On Tue, Mar 31, 2020 at 7:33 AM Vaibhav Jain wrote:
>
> This patch implements support for papr_scm command
> 'DSM_PAPR_SCM_HEALTH' that returns a newly introduced 'struct
> nd_papr_scm_dimm_health_stat' instance containing dimm health
> information back to user space in response to ND_CMD_CALL.
https://bugzilla.kernel.org/show_bug.cgi?id=206203
Erhard F. (erhar...@mailbox.org) changed:
What|Removed |Added
Attachment #286803|0 |1
is obsolete|
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