Re: [PATCH v7 24/28] powerpc: Test prefixed code patching

2020-05-05 Thread Alistair Popple
Reviewed-by: Alistair Popple On Friday, 1 May 2020 1:42:16 PM AEST Jordan Niethe wrote: > Expand the code-patching self-tests to includes tests for patching > prefixed instructions. > > Signed-off-by: Jordan Niethe > --- > v6: New to series > --- > arch/powerpc/lib/Makefile | 2

Re: [PATCH v2 2/2] clk: qoriq: add cpufreq platform device

2020-05-05 Thread Stephen Boyd
Quoting Mian Yousaf Kaukab (2020-04-21 01:30:00) > Add a platform device for qoirq-cpufreq driver for the compatible > clockgen blocks. > > Reviewed-by: Yuantian Tang > Acked-by: Viresh Kumar > Signed-off-by: Mian Yousaf Kaukab > --- Acked-by: Stephen Boyd

Re: [PATCH v7 23/28] powerpc: Add prefixed instructions to instruction data type

2020-05-05 Thread Alistair Popple
When reviewing earlier patches in this series I assumed the data type would eventually change size (on PPC64 at least) so I was looking for any possible side effects this may cause, but I didn't notice any so I think this should be ok: Reviewed-by: Alistair Popple However I haven't dug

Re: [PATCH v7 25/28] powerpc: Test prefixed instructions in feature fixups

2020-05-05 Thread Alistair Popple
Hmm, I was hoping to add a tested by but I'm seeing the following failure in Mambo: [1.475459] feature-fixups: test failed at line 730 Based on the name of the test it looks like you probably made a copy/paste error in ftr_fixup_prefix2_expected. I suspect you probably meant to use the

[PATCH v4 01/22] powerpc/pkeys: Avoid using lockless page table walk

2020-05-05 Thread Aneesh Kumar K.V
Fetch pkey from vma instead of linux page table. Also document the fact that in some cases the pkey returned in siginfo won't be the same as the one we took keyfault on. Even with linux page table walk, we can end up in a similar scenario. Cc: Ram Pai Signed-off-by: Aneesh Kumar K.V ---

[PATCH v4 10/22] powerpc/kvm/nested: Add helper to walk nested shadow linux page table.

2020-05-05 Thread Aneesh Kumar K.V
The locking rules for walking nested shadow linux page table is different from process scoped table. Hence add a helper for nested page table walk and also add check whether we are holding the right locks. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/kvm/book3s_hv_nested.c | 28

Re: [PATCH v7 5/5] powerpc/hv-24x7: Update post_mobility_fixup() to handle migration

2020-05-05 Thread Michael Ellerman
kajoljain writes: > On 4/29/20 5:07 PM, Michael Ellerman wrote: >> Kajol Jain writes: >>> Function 'read_sys_info_pseries()' is added to get system parameter >>> values like number of sockets and chips per socket. >>> and it gets these details via rtas_call with token >>>

[PATCH v4 03/22] powerpc/mm/hash64: use _PAGE_PTE when checking for pte_present

2020-05-05 Thread Aneesh Kumar K.V
This makes the pte_present check stricter by checking for additional _PAGE_PTE bit. A level 1 pte pointer (THP pte) can be switched to a pointer to level 0 pte page table page by following two operations. 1) THP split. 2) madvise(MADV_DONTNEED) in parallel to page fault. A lockless page table

[PATCH v4 04/22] powerpc/hash64: Restrict page table lookup using init_mm with __flush_hash_table_range

2020-05-05 Thread Aneesh Kumar K.V
This is only used with init_mm currently. Walking init_mm is much simpler because we don't need to handle concurrent page table like other mm_context Signed-off-by: Aneesh Kumar K.V --- .../include/asm/book3s/64/tlbflush-hash.h| 3 +-- arch/powerpc/kernel/pci_64.c |

[PATCH v4 09/22] powerpc/kvm/book3s: Add helper to walk partition scoped linux page table.

2020-05-05 Thread Aneesh Kumar K.V
The locking rules for walking partition scoped table is different from process scoped table. Hence add a helper for secondary linux page table walk and also add check whether we are holding the right locks. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/kvm_book3s_64.h | 13

[PATCH v4 11/22] powerpc/kvm/book3s: Use kvm helpers to walk shadow or secondary table

2020-05-05 Thread Aneesh Kumar K.V
update kvmppc_hv_handle_set_rc to use find_kvm_nested_guest_pte and find_kvm_secondary_pte Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/kvm_book3s.h| 2 +- arch/powerpc/include/asm/kvm_book3s_64.h | 3 +++ arch/powerpc/kvm/book3s_64_mmu_radix.c | 18 +-

[PATCH v4 13/22] powerpc/kvm/book3s: Use find_kvm_host_pte in page fault handler

2020-05-05 Thread Aneesh Kumar K.V
Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/kvm/book3s_64_mmu_hv.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/kvm/book3s_64_mmu_hv.c b/arch/powerpc/kvm/book3s_64_mmu_hv.c index 2b35f9bcf892..38e934dc1714 100644 ---

Re: [PATCH v7 5/5] powerpc/hv-24x7: Update post_mobility_fixup() to handle migration

2020-05-05 Thread kajoljain
On 4/29/20 5:07 PM, Michael Ellerman wrote: > Kajol Jain writes: >> Function 'read_sys_info_pseries()' is added to get system parameter >> values like number of sockets and chips per socket. >> and it gets these details via rtas_call with token >> "PROCESSOR_MODULE_INFO". >> >> Incase lpar

Re: [PATCH v7 04/28] powerpc/xmon: Use bitwise calculations in_breakpoint_table()

2020-05-05 Thread Michael Ellerman
Jordan Niethe writes: > A modulo operation is used for calculating the current offset from a > breakpoint within the breakpoint table. As instruction lengths are > always a power of 2, this can be replaced with a bitwise 'and'. The > current check for word alignment can be replaced with checking

Re: [PATCH v7 26/28] powerpc: Support prefixed instructions in alignment handler

2020-05-05 Thread Alistair Popple
Reviewed-by: Alistair Popple On Friday, 1 May 2020 1:42:18 PM AEST Jordan Niethe wrote: > If a prefixed instruction results in an alignment exception, the > SRR1_PREFIXED bit is set. The handler attempts to emulate the > responsible instruction and then increment the NIP past it. Use >

[PATCH v4 00/22] Avoid IPI while updating page table entries.

2020-05-05 Thread Aneesh Kumar K.V
Problem Summary: Slow termination of KVM guest with large guest RAM config due to a large number of IPIs that were caused by clearing level 1 PTE entries (THP) entries. This is shown in the stack trace below. - qemu-system-ppc [kernel.vmlinux][k] smp_call_function_many -

[PATCH v4 02/22] powerpc/pkeys: Check vma before returning key fault error to the user

2020-05-05 Thread Aneesh Kumar K.V
If multiple threads in userspace keep changing the protection keys mapping a range, there can be a scenario where kernel takes a key fault but the pkey value found in the siginfo struct is a permissive one. This can confuse the userspace as shown in the below test case. /* use this to control

[PATCH v4 05/22] powerpc/book3s64/hash: Use the pte_t address from the caller

2020-05-05 Thread Aneesh Kumar K.V
Don't fetch the pte value using lockless page table walk. Instead use the value from the caller. hash_preload is called with ptl lock held. So it is safe to use the pte_t address directly. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/book3s64/hash_utils.c | 27

[PATCH v4 06/22] powerpc/mce: Don't reload pte val in addr_to_pfn

2020-05-05 Thread Aneesh Kumar K.V
A lockless page table walk should be safe against parallel THP collapse, THP split and madvise(MADV_DONTNEED)/parallel fault. This patch makes sure kernel won't reload the pteval when checking for different conditions. The patch also added a check for pte_present to make sure the kernel is indeed

[PATCH v4 07/22] powerpc/perf/callchain: Use __get_user_pages_fast in read_user_stack_slow

2020-05-05 Thread Aneesh Kumar K.V
read_user_stack_slow is called with interrupts soft disabled and it copies contents from the page which we find mapped to a specific address. To convert userspace address to pfn, the kernel now uses lockless page table walk. The kernel needs to make sure the pfn value read remains stable and is

[PATCH v4 08/22] powerpc/kvm/book3s: switch from raw_spin_*lock to arch_spin_lock.

2020-05-05 Thread Aneesh Kumar K.V
These functions can get called in realmode. Hence use low level arch_spin_lock which is safe to be called in realmode. Cc: Suraj Jitindar Singh Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/kvm/book3s_hv_rm_mmu.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git

[PATCH v4 12/22] powerpc/kvm/book3s: Add helper for host page table walk

2020-05-05 Thread Aneesh Kumar K.V
Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/kvm_book3s_64.h | 16 1 file changed, 16 insertions(+) diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h b/arch/powerpc/include/asm/kvm_book3s_64.h index 2860521992b6..1ca1f6495012 100644 ---

[PATCH v4 14/22] powerpc/kvm/book3s: Use find_kvm_host_pte in h_enter

2020-05-05 Thread Aneesh Kumar K.V
Since kvmppc_do_h_enter can get called in realmode use low level arch_spin_lock which is safe to be called in realmode. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/kvm/book3s_64_mmu_hv.c | 5 ++--- arch/powerpc/kvm/book3s_hv_rm_mmu.c | 22 ++ 2 files changed, 8

[PATCH v4 15/22] powerpc/kvm/book3s: use find_kvm_host_pte in pute_tce functions

2020-05-05 Thread Aneesh Kumar K.V
Current code just hold rmap lock to ensure parallel page table update is prevented. That is not sufficient. The kernel should also check whether a mmu_notifer callback was running in parallel. Cc: Alexey Kardashevskiy Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/kvm/book3s_64_vio_hv.c | 30

Re: [PATCH v2 0/5] Statsfs: a new ram-based file sytem for Linux kernel statistics

2020-05-05 Thread Emanuele Giuseppe Esposito
On 5/4/20 11:37 PM, David Rientjes wrote: On Mon, 4 May 2020, Emanuele Giuseppe Esposito wrote: In this patch series I introduce statsfs, a synthetic ram-based virtual filesystem that takes care of gathering and displaying statistics for the Linux kernel subsystems. This is exciting, we

[PATCH v4 16/22] powerpc/kvm/book3s: Avoid using rmap to protect parallel page table update.

2020-05-05 Thread Aneesh Kumar K.V
We now depend on kvm->mmu_lock Cc: Alexey Kardashevskiy Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/kvm/book3s_64_vio_hv.c | 38 +++-- 1 file changed, 9 insertions(+), 29 deletions(-) diff --git a/arch/powerpc/kvm/book3s_64_vio_hv.c

[PATCH v4 17/22] powerpc/kvm/book3s: use find_kvm_host_pte in kvmppc_book3s_instantiate_page

2020-05-05 Thread Aneesh Kumar K.V
Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/kvm/book3s_64_mmu_radix.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/kvm/book3s_64_mmu_radix.c b/arch/powerpc/kvm/book3s_64_mmu_radix.c index 70c4025406d8..271f1c3d8443 100644 ---

[PATCH v4 18/22] powerpc/kvm/book3s: Use find_kvm_host_pte in kvmppc_get_hpa

2020-05-05 Thread Aneesh Kumar K.V
Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/kvm/book3s_hv_rm_mmu.c | 32 ++--- 1 file changed, 11 insertions(+), 21 deletions(-) diff --git a/arch/powerpc/kvm/book3s_hv_rm_mmu.c b/arch/powerpc/kvm/book3s_hv_rm_mmu.c index 83e987fecf97..3b168c69d503 100644 ---

[PATCH v4 19/22] powerpc/kvm/book3s: Use pte_present instead of opencoding _PAGE_PRESENT check

2020-05-05 Thread Aneesh Kumar K.V
This adds _PAGE_PTE check and makes sure we validate the pte value returned via find_kvm_host_pte. NOTE: this also considers _PAGE_INVALID to the software valid bit. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/kvm_book3s_64.h | 2 +- 1 file changed, 1 insertion(+), 1

[PATCH v4 21/22] mm: change pmdp_huge_get_and_clear_full take vm_area_struct as arg

2020-05-05 Thread Aneesh Kumar K.V
We will use this in later patch to do tlb flush when clearing pmd entries. Cc: kir...@shutemov.name Cc: a...@linux-foundation.org Signed-off-by: Aneesh Kumar K.V --- arch/s390/include/asm/pgtable.h | 4 ++-- include/asm-generic/pgtable.h | 4 ++-- mm/huge_memory.c| 4 ++-- 3

[PATCH v4 22/22] powerpc/mm/book3s64: Fix MADV_DONTNEED and parallel page fault race

2020-05-05 Thread Aneesh Kumar K.V
MADV_DONTNEED holds mmap_sem in read mode and that implies a parallel page fault is possible and the kernel can end up with a level 1 PTE entry (THP entry) converted to a level 0 PTE entry without flushing the THP TLB entry. Most architectures including POWER have issues with kernel instantiating

Re: [PATCH v7 04/28] powerpc/xmon: Use bitwise calculations in_breakpoint_table()

2020-05-05 Thread Jordan Niethe
On Tue, May 5, 2020 at 5:08 PM Michael Ellerman wrote: > > Jordan Niethe writes: > > A modulo operation is used for calculating the current offset from a > > breakpoint within the breakpoint table. As instruction lengths are > > always a power of 2, this can be replaced with a bitwise 'and'. The

Re: [PATCH v7 25/28] powerpc: Test prefixed instructions in feature fixups

2020-05-05 Thread Jordan Niethe
On Tue, May 5, 2020 at 5:15 PM Alistair Popple wrote: > > Hmm, I was hoping to add a tested by but I'm seeing the following failure in > Mambo: > > [1.475459] feature-fixups: test failed at line 730 > > Based on the name of the test it looks like you probably made a copy/paste > error in

[PATCH v4 20/22] powerpc/mm/book3s64: Avoid sending IPI on clearing PMD

2020-05-05 Thread Aneesh Kumar K.V
Now that all the lockless page table walk is careful w.r.t the PTE address returned, we can now revert commit: 13bd817bb884 ("powerpc/thp: Serialize pmd clear against a linux page table walk.") We also drop the equivalent IPI from other pte updates routines. We still keep IPI in hash pmdp

Re: [PATCH 1/2] powerpc/spufs: fix copy_to_user while atomic

2020-05-05 Thread Michael Ellerman
Christoph Hellwig writes: > powerpc mantainers, There's only one of me. > are you going to pick this up for the next -rc1? I'm waiting for it to > hit upstream before resending the coredump series. I thought you were going to take it in your series. Otherwise you'll be waiting 4 or more

Re: [PATCH 1/2] powerpc/spufs: fix copy_to_user while atomic

2020-05-05 Thread Christoph Hellwig
On Tue, May 05, 2020 at 05:20:54PM +1000, Michael Ellerman wrote: > Christoph Hellwig writes: > > powerpc mantainers, > > There's only one of me. > > > are you going to pick this up for the next -rc1? I'm waiting for it to > > hit upstream before resending the coredump series. > > I thought

Re: [PATCH v4 2/7] KVM: arm64: clean up redundant 'kvm_run' parameters

2020-05-05 Thread Marc Zyngier
Hi Tianjia, On 2020-04-27 05:35, Tianjia Zhang wrote: In the current kvm version, 'kvm_run' has been included in the 'kvm_vcpu' structure. For historical reasons, many kvm-related function parameters retain the 'kvm_run' and 'kvm_vcpu' parameters at the same time. This patch does a unified

Re: [RFC][PATCH 0/2] Add support for using reserved memory for ima buffer pass

2020-05-05 Thread Mark Rutland
Hi Prakhar, On Mon, May 04, 2020 at 01:38:27PM -0700, Prakhar Srivastava wrote: > IMA during kexec(kexec file load) verifies the kernel signature and measures > the signature of the kernel. The signature in the logs can be used to verfiy > the > authenticity of the kernel. The logs don not get

remove set_fs calls from the coredump code v6

2020-05-05 Thread Christoph Hellwig
Hi all, this series gets rid of playing with the address limit in the exec and coredump code. Most of this was fairly trivial, the biggest changes are those to the spufs coredump code. Changes since v5: - fix uaccess under spinlock in spufs (Jeremy) - remove use of access_ok in spufs Changes

[PATCH 1/7] powerpc/spufs: fix copy_to_user while atomic

2020-05-05 Thread Christoph Hellwig
From: Jeremy Kerr Currently, we may perform a copy_to_user (through simple_read_from_buffer()) while holding a context's register_lock, while accessing the context save area. This change uses a temporary buffer for the context save area data, which we then pass to simple_read_from_buffer.

Re: [PATCH v2 17/20] mm: free_area_init: allow defining max_zone_pfn in descending order

2020-05-05 Thread Guenter Roeck
On 5/4/20 8:39 AM, Mike Rapoport wrote: > On Sun, May 03, 2020 at 11:43:00AM -0700, Guenter Roeck wrote: >> On Sun, May 03, 2020 at 10:41:38AM -0700, Guenter Roeck wrote: >>> Hi, >>> >>> On Wed, Apr 29, 2020 at 03:11:23PM +0300, Mike Rapoport wrote: From: Mike Rapoport Some

Re: [PATCH v2 0/5] Statsfs: a new ram-based file sytem for Linux kernel statistics

2020-05-05 Thread Paolo Bonzini
On 05/05/20 18:53, Jim Mattson wrote: >>> Since this is becoming a generic API (good!!), maybe we can discuss >>> possible ways to optimize gathering of stats in mass? >> Sure, the idea of a binary format was considered from the beginning in >> [1], and it can be done either together with the

Re: [PATCH v2 17/20] mm: free_area_init: allow defining max_zone_pfn in descending order

2020-05-05 Thread Vineet Gupta
On 5/5/20 6:18 AM, Guenter Roeck wrote: > On 5/4/20 8:39 AM, Mike Rapoport wrote: >> On Sun, May 03, 2020 at 11:43:00AM -0700, Guenter Roeck wrote: >>> On Sun, May 03, 2020 at 10:41:38AM -0700, Guenter Roeck wrote: Hi, On Wed, Apr 29, 2020 at 03:11:23PM +0300, Mike Rapoport wrote:

Re: [PATCH v2 0/5] Statsfs: a new ram-based file sytem for Linux kernel statistics

2020-05-05 Thread Paolo Bonzini
On 05/05/20 19:07, David Rientjes wrote: >> I am totally in favor of having a binary format, but it should be >> introduced as a separate series on top of this one---and preferably by >> someone who has already put some thought into the problem (which >> Emanuele and I have not, beyond ensuring

Re: [PATCH v2 0/5] Statsfs: a new ram-based file sytem for Linux kernel statistics

2020-05-05 Thread Christian Borntraeger
Adding Stefan Raspl, who has done a lot of kvm_stat work in the past. On 05.05.20 19:21, Paolo Bonzini wrote: > On 05/05/20 19:07, David Rientjes wrote: >>> I am totally in favor of having a binary format, but it should be >>> introduced as a separate series on top of this one---and preferably by

Re: remove set_fs calls from the coredump code v6

2020-05-05 Thread Linus Torvalds
On Tue, May 5, 2020 at 3:13 AM Christoph Hellwig wrote: > > this series gets rid of playing with the address limit in the exec and > coredump code. Most of this was fairly trivial, the biggest changes are > those to the spufs coredump code. Ack, nice, and looks good. The only part I dislike is

Re: [PATCH v3 00/29] Convert files to ReST - part 2

2020-05-05 Thread Jonathan Corbet
On Tue, 28 Apr 2020 13:01:28 -0600 Jonathan Corbet wrote: > So I'm happy to merge this set, but there is one thing that worries me a > bit... > > > fs/cachefiles/Kconfig |4 +- > > fs/coda/Kconfig |2 +- > > fs/configfs/inode.c

Re: [PATCH] powerpc/5200: update contact email

2020-05-05 Thread Wolfram Sang
> > My 'pengutronix' address is defunct for years. Merge the entries and use > > the proper contact address. > > Is there any point adding the new address? It's just likely to bit-rot > one day too. At least, this one is a group address, not an individual one, so less likey. > I figure the git

Re: [PATCH v4 1/2] powerpc/uaccess: Implement unsafe_put_user() using 'asm goto'

2020-05-05 Thread Michael Ellerman
Christophe Leroy writes: > unsafe_put_user() is designed to take benefit of 'asm goto'. > > Instead of using the standard __put_user() approach and branch > based on the returned error, use 'asm goto' and make the > exception code branch directly to the error label. There is > no code anymore in

Re: [PATCH v4 1/2] powerpc/uaccess: Implement unsafe_put_user() using 'asm goto'

2020-05-05 Thread Segher Boessenkool
On Tue, May 05, 2020 at 05:40:21PM +0200, Christophe Leroy wrote: > >>+#define __put_user_asm_goto(x, addr, label, op)\ > >>+ asm volatile goto( \ > >>+ "1: " op "%U1%X1 %0,%1 # put_user\n" \ > >>+

Re: [PATCH v2 17/20] mm: free_area_init: allow defining max_zone_pfn in descending order

2020-05-05 Thread Mike Rapoport
On Tue, May 05, 2020 at 06:18:11AM -0700, Guenter Roeck wrote: > On 5/4/20 8:39 AM, Mike Rapoport wrote: > > On Sun, May 03, 2020 at 11:43:00AM -0700, Guenter Roeck wrote: > >> On Sun, May 03, 2020 at 10:41:38AM -0700, Guenter Roeck wrote: > >>> Hi, > >>> > >>> On Wed, Apr 29, 2020 at 03:11:23PM

Re: [PATCH v4 1/2] powerpc/uaccess: Implement unsafe_put_user() using 'asm goto'

2020-05-05 Thread Segher Boessenkool
Hi! On Wed, May 06, 2020 at 12:27:58AM +1000, Michael Ellerman wrote: > Christophe Leroy writes: > > unsafe_put_user() is designed to take benefit of 'asm goto'. > > > > Instead of using the standard __put_user() approach and branch > > based on the returned error, use 'asm goto' and make the >

Re: remove set_fs calls from the coredump code v6

2020-05-05 Thread Eric W. Biederman
Linus Torvalds writes: > On Tue, May 5, 2020 at 3:13 AM Christoph Hellwig wrote: >> >> this series gets rid of playing with the address limit in the exec and >> coredump code. Most of this was fairly trivial, the biggest changes are >> those to the spufs coredump code. > > Ack, nice, and looks

Re: remove set_fs calls from the coredump code v6

2020-05-05 Thread Al Viro
On Tue, May 05, 2020 at 10:42:58PM +0200, Christoph Hellwig wrote: > On Tue, May 05, 2020 at 09:34:46PM +0100, Al Viro wrote: > > Looks good. Want me to put it into vfs.git? #work.set_fs-exec, perhaps? > > Sounds good. Applied, pushed and added into #for-next

Re: [PATCH v4 7/8] powerpc/vdso32: implement clock_getres entirely

2020-05-05 Thread Aurelien Jarno
Hi, On 2019-12-02 07:57, Christophe Leroy wrote: > clock_getres returns hrtimer_res for all clocks but coarse ones > for which it returns KTIME_LOW_RES. > > return EINVAL for unknown clocks. > > Signed-off-by: Christophe Leroy > --- > arch/powerpc/kernel/asm-offsets.c | 3 +++ >

Re: [PATCH v4 1/2] powerpc/uaccess: Implement unsafe_put_user() using 'asm goto'

2020-05-05 Thread Michael Ellerman
Segher Boessenkool writes: > On Tue, May 05, 2020 at 05:40:21PM +0200, Christophe Leroy wrote: >> >>+#define __put_user_asm_goto(x, addr, label, op) \ >> >>+ asm volatile goto( \ >> >>+ "1: " op "%U1%X1 %0,%1 # put_user\n"

Re: [PATCH v4 1/2] powerpc/uaccess: Implement unsafe_put_user() using 'asm goto'

2020-05-05 Thread Christophe Leroy
Hi, Le 05/05/2020 à 16:27, Michael Ellerman a écrit : Christophe Leroy writes: unsafe_put_user() is designed to take benefit of 'asm goto'. Instead of using the standard __put_user() approach and branch based on the returned error, use 'asm goto' and make the exception code branch directly

Re: [PATCH v4 1/2] powerpc/uaccess: Implement unsafe_put_user() using 'asm goto'

2020-05-05 Thread Michael Ellerman
Segher Boessenkool writes: > Hi! > > On Wed, May 06, 2020 at 12:27:58AM +1000, Michael Ellerman wrote: >> Christophe Leroy writes: >> > unsafe_put_user() is designed to take benefit of 'asm goto'. >> > >> > Instead of using the standard __put_user() approach and branch >> > based on the returned

Re: [RFC PATCH 2/2] powerpc/64s: system call support for scv/rfscv instructions

2020-05-05 Thread Nicholas Piggin
Excerpts from Segher Boessenkool's message of May 6, 2020 8:11 am: > Hi! > > On Thu, Apr 30, 2020 at 02:02:02PM +1000, Nicholas Piggin wrote: >> Add support for the scv instruction on POWER9 and later CPUs. > > Looks good to me in general :-) Thanks for taking a look. >> For now this

Re: [PATCH v2 1/2] powerpc/64s/hash: add torture_slb kernel boot option to increase SLB faults

2020-05-05 Thread kbuild test robot
Hi Nicholas, I love your patch! Yet something to improve: [auto build test ERROR on powerpc/next] [also build test ERROR on linus/master v5.7-rc4 next-20200505] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base

Re: [PATCH] powerpc/xive: Enforce load-after-store ordering when StoreEOI is active

2020-05-05 Thread Alistair Popple
I am still slowly wrapping my head around XIVE and it's interaction with KVM but from what I can see this looks good and is needed so we can enable StoreEOI support in future so: Reviewed-by: Alistair Popple On Thursday, 20 February 2020 7:15:06 PM AEST Cédric Le Goater wrote: > When an

Re: remove set_fs calls from the coredump code v6

2020-05-05 Thread Al Viro
On Tue, May 05, 2020 at 12:12:49PM +0200, Christoph Hellwig wrote: > Hi all, > > this series gets rid of playing with the address limit in the exec and > coredump code. Most of this was fairly trivial, the biggest changes are > those to the spufs coredump code. > > Changes since v5: > - fix

Re: [RFC PATCH 2/2] powerpc/64s: system call support for scv/rfscv instructions

2020-05-05 Thread Segher Boessenkool
Hi! On Thu, Apr 30, 2020 at 02:02:02PM +1000, Nicholas Piggin wrote: > Add support for the scv instruction on POWER9 and later CPUs. Looks good to me in general :-) > For now this implements the zeroth scv vector 'scv 0', as identical > to 'sc' system calls, with the exception that lr is not

Re: [PATCH 3/3] mm/hugetlb: Introduce HAVE_ARCH_CLEAR_HUGEPAGE_FLAGS

2020-05-05 Thread Andrew Morton
On Tue, 5 May 2020 08:21:34 +0530 Anshuman Khandual wrote: > >>> static inline void arch_clear_hugepage_flags(struct page *page) > >>> { > >>> > >>> } > >>> #define arch_clear_hugepage_flags arch_clear_hugepage_flags > >>> > >>> It's a small difference - mainly to avoid adding two variables

Re: remove set_fs calls from the coredump code v6

2020-05-05 Thread Christoph Hellwig
On Tue, May 05, 2020 at 09:34:46PM +0100, Al Viro wrote: > Looks good. Want me to put it into vfs.git? #work.set_fs-exec, perhaps? Sounds good.

Re: New powerpc vdso calling convention

2020-05-05 Thread Segher Boessenkool
Hi! On Wed, Apr 29, 2020 at 12:39:22PM +1000, Nicholas Piggin wrote: > Excerpts from Adhemerval Zanella's message of April 27, 2020 11:09 pm: > >> Right, I'm just talking about those comments -- it seems like the kernel > >> vdso should contain an .opd section with function descriptors in it for

Re: [PATCH 2/3] ASoC: fsl_esai: Add support for imx8qm

2020-05-05 Thread Shengjiu Wang
Hi On Fri, May 1, 2020 at 6:23 PM Mark Brown wrote: > > On Fri, May 01, 2020 at 04:12:05PM +0800, Shengjiu Wang wrote: > > The difference for esai on imx8qm is that DMA device is EDMA. > > > > EDMA requires the period size to be multiple of maxburst. Otherwise > > the remaining bytes are not

[PATCH v8 04/30] powerpc/xmon: Use bitwise calculations in_breakpoint_table()

2020-05-05 Thread Jordan Niethe
A modulo operation is used for calculating the current offset from a breakpoint within the breakpoint table. As instruction lengths are always a power of 2, this can be replaced with a bitwise 'and'. The current check for word alignment can be replaced with checking that the lower 2 bits are not

[PATCH v8 10/30] powerpc: Introduce functions for instruction equality

2020-05-05 Thread Jordan Niethe
In preparation for an instruction data type that can not be directly used with the '==' operator use functions for checking equality. Reviewed-by: Balamuruhan S Signed-off-by: Jordan Niethe --- v5: Remove ppc_inst_null() v7: Fix compilation issue in expected_nop_sequence() when no

[PATCH v8 12/30] powerpc: Use a function for reading instructions

2020-05-05 Thread Jordan Niethe
Prefixed instructions will mean there are instructions of different length. As a result dereferencing a pointer to an instruction will not necessarily give the desired result. Introduce a function for reading instructions from memory into the instruction data type. Reviewed-by: Alistair Popple

[PATCH v8 13/30] powerpc: Add a probe_user_read_inst() function

2020-05-05 Thread Jordan Niethe
Introduce a probe_user_read_inst() function to use in cases where probe_user_read() is used for getting an instruction. This will be more useful for prefixed instructions. Reviewed-by: Alistair Popple Signed-off-by: Jordan Niethe --- v6: - New to series --- arch/powerpc/include/asm/inst.h | 3

[PATCH v8 21/30] powerpc: Enable Prefixed Instructions

2020-05-05 Thread Jordan Niethe
From: Alistair Popple Prefix instructions have their own FSCR bit which needs to enabled via a CPU feature. The kernel will save the FSCR for problem state but it needs to be enabled initially. If prefixed instructions are made unavailable by the [H]FSCR, attempting to use them will cause a

[PATCH v8 20/30] powerpc: Make test_translate_branch() independent of instruction length

2020-05-05 Thread Jordan Niethe
test_translate_branch() uses two pointers to instructions within a buffer, p and q, to test patch_branch(). The pointer arithmetic done on them assumes a size of 4. This will not work if the instruction length changes. Instead do the arithmetic relative to the void * to the buffer. Reviewed-by:

[PATCH v8 23/30] powerpc: Add prefixed instructions to instruction data type

2020-05-05 Thread Jordan Niethe
For powerpc64, redefine the ppc_inst type so both word and prefixed instructions can be represented. On powerpc32 the type will remain the same. Update places which had assumed instructions to be 4 bytes long. Reviewed-by: Alistair Popple Signed-off-by: Jordan Niethe --- v4: New to series v5:

[PATCH v8 30/30] powerpc sstep: Add support for prefixed fixed-point arithmetic

2020-05-05 Thread Jordan Niethe
This adds emulation support for the following prefixed Fixed-Point Arithmetic instructions: * Prefixed Add Immediate (paddi) Reviewed-by: Balamuruhan S Signed-off-by: Jordan Niethe --- v3: Since we moved the prefixed loads/stores into the load/store switch statement it no longer makes sense

[PATCH v8 03/30] powerpc/xmon: Move breakpoints to text section

2020-05-05 Thread Jordan Niethe
The instructions for xmon's breakpoint are stored bpt_table[] which is in the data section. This is problematic as the data section may be marked as no execute. Move bpt_table[] to the text section. Signed-off-by: Jordan Niethe --- v6: - New to series. Was part of the previous patch. - Make

[PATCH v8 02/30] powerpc/xmon: Move breakpoint instructions to own array

2020-05-05 Thread Jordan Niethe
To execute an instruction out of line after a breakpoint, the NIP is set to the address of struct bpt::instr. Here a copy of the instruction that was replaced with a breakpoint is kept, along with a trap so normal flow can be resumed after XOLing. The struct bpt's are located within the data

[PATCH v8 09/30] powerpc: Use a function for byte swapping instructions

2020-05-05 Thread Jordan Niethe
Use a function for byte swapping instructions in preparation of a more complicated instruction type. Reviewed-by: Balamuruhan S Signed-off-by: Jordan Niethe --- arch/powerpc/include/asm/inst.h | 5 + arch/powerpc/kernel/align.c | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-)

[PATCH v8 08/30] powerpc: Use a function for getting the instruction op code

2020-05-05 Thread Jordan Niethe
In preparation for using a data type for instructions that can not be directly used with the '>>' operator use a function for getting the op code of an instruction. Reviewed-by: Alistair Popple Signed-off-by: Jordan Niethe --- v4: New to series v6: - Rename ppc_inst_primary() to

[PATCH v8 14/30] powerpc: Add a probe_kernel_read_inst() function

2020-05-05 Thread Jordan Niethe
Introduce a probe_kernel_read_inst() function to use in cases where probe_kernel_read() is used for getting an instruction. This will be more useful for prefixed instructions. Reviewed-by: Alistair Popple Signed-off-by: Jordan Niethe --- v6: - This was previously just in ftrace.c ---

[PATCH v8 19/30] powerpc/xmon: Move insertion of breakpoint for xol'ing

2020-05-05 Thread Jordan Niethe
When a new breakpoint is created, the second instruction of that breakpoint is patched with a trap instruction. This assumes the length of the instruction is always the same. In preparation for prefixed instructions, remove this assumption. Insert the trap instruction at the same time the first

[PATCH v8 24/30] powerpc: Test prefixed code patching

2020-05-05 Thread Jordan Niethe
Expand the code-patching self-tests to includes tests for patching prefixed instructions. Signed-off-by: Jordan Niethe --- v6: New to series v8: Use OP_PREFIX --- arch/powerpc/lib/Makefile | 2 +- arch/powerpc/lib/code-patching.c | 21 +

[PATCH v8 25/30] powerpc: Test prefixed instructions in feature fixups

2020-05-05 Thread Jordan Niethe
Expand the feature-fixups self-tests to includes tests for prefixed instructions. Signed-off-by: Jordan Niethe --- v6: New to series v8: Use OP_PREFIX --- arch/powerpc/lib/feature-fixups-test.S | 69 arch/powerpc/lib/feature-fixups.c | 73 ++

[PATCH v8 29/30] powerpc sstep: Add support for prefixed load/stores

2020-05-05 Thread Jordan Niethe
This adds emulation support for the following prefixed integer load/stores: * Prefixed Load Byte and Zero (plbz) * Prefixed Load Halfword and Zero (plhz) * Prefixed Load Halfword Algebraic (plha) * Prefixed Load Word and Zero (plwz) * Prefixed Load Word Algebraic (plwa) * Prefixed Load

[PATCH v8 28/30] powerpc: Support prefixed instructions in alignment handler

2020-05-05 Thread Jordan Niethe
If a prefixed instruction results in an alignment exception, the SRR1_PREFIXED bit is set. The handler attempts to emulate the responsible instruction and then increment the NIP past it. Use SRR1_PREFIXED to determine by how much the NIP should be incremented. Prefixed instructions are not

Re: [PATCH v3 1/2] powerpc/fadump: use static allocation for reserved memory ranges

2020-05-05 Thread Michael Ellerman
On Mon, 2020-04-20 at 08:56:09 UTC, Hari Bathini wrote: > At times, memory ranges have to be looked up during early boot, when > kernel couldn't be initialized for dynamic memory allocation. In fact, > reserved-ranges look up is needed during FADump memory reservation. > Without accounting for

Re: [PATCH v5 1/5] powerpc: Move idle_loop_prolog()/epilog() functions to header file

2020-05-05 Thread Michael Ellerman
On Tue, 2020-04-07 at 08:47:39 UTC, "Gautham R. Shenoy" wrote: > From: "Gautham R. Shenoy" > > Currently prior to entering an idle state on a Linux Guest, the > pseries cpuidle driver implement an idle_loop_prolog() and > idle_loop_epilog() functions which ensure that idle_purr is correctly >

Re: [PATCH] powerpc/64: Have MPROFILE_KERNEL depend on FUNCTION_TRACER

2020-05-05 Thread Michael Ellerman
On Wed, 2020-04-22 at 09:26:12 UTC, "Naveen N. Rao" wrote: > Currently, it is possible to have CONFIG_FUNCTION_TRACER disabled, but > CONFIG_MPROFILE_KERNEL enabled. Though all existing users of > MPROFILE_KERNEL are doing the right thing, it is weird to have > MPROFILE_KERNEL enabled when the

Re: [PATCH] powerpc/ps3: Move static keyword to the front of declaration

2020-05-05 Thread Michael Ellerman
On Wed, 2020-04-29 at 10:00:48 UTC, Xiongfeng Wang wrote: > Move the static keyword to the front of declaration of 'vuart_bus_priv', > and resolve the following compiler warning that can be seen when > building with warnings enabled (W=1): > > drivers/ps3/ps3-vuart.c:867:1: warning: ‘static’

[PATCH v8 01/30] powerpc/xmon: Remove store_inst() for patch_instruction()

2020-05-05 Thread Jordan Niethe
For modifying instructions in xmon, patch_instruction() can serve the same role that store_inst() is performing with the advantage of not being specific to xmon. In some places patch_instruction() is already being using followed by store_inst(). In these cases just remove the store_inst().

[PATCH v8 07/30] powerpc: Use an accessor for instructions

2020-05-05 Thread Jordan Niethe
In preparation for introducing a more complicated instruction type to accommodate prefixed instructions use an accessor for getting an instruction as a u32. Signed-off-by: Jordan Niethe --- v4: New to series v5: Remove references to 'word' instructions v6: - test_emulate_step.c:

[PATCH v8 11/30] powerpc: Use a datatype for instructions

2020-05-05 Thread Jordan Niethe
Currently unsigned ints are used to represent instructions on powerpc. This has worked well as instructions have always been 4 byte words. However, a future ISA version will introduce some changes to instructions that mean this scheme will no longer work as well. This change is Prefixed

[PATCH v8 17/30] powerpc: Introduce a function for reporting instruction length

2020-05-05 Thread Jordan Niethe
Currently all instructions have the same length, but in preparation for prefixed instructions introduce a function for returning instruction length. Reviewed-by: Alistair Popple Signed-off-by: Jordan Niethe --- v6: - feature-fixups.c: do_final_fixups(): use here - ppc_inst_len(): change

[PATCH v8 18/30] powerpc/xmon: Use a function for reading instructions

2020-05-05 Thread Jordan Niethe
Currently in xmon, mread() is used for reading instructions. In preparation for prefixed instructions, create and use a new function, mread_instr(), especially for reading instructions. Reviewed-by: Alistair Popple Signed-off-by: Jordan Niethe --- v5: New to series, seperated from "Add prefixed

[PATCH v8 26/30] powerpc/xmon: Don't allow breakpoints on suffixes

2020-05-05 Thread Jordan Niethe
Do not allow placing xmon breakpoints on the suffix of a prefix instruction. Signed-off-by: Jordan Niethe --- v8: Add this back from v3 --- arch/powerpc/xmon/xmon.c | 29 +++-- 1 file changed, 27 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/xmon/xmon.c

[PATCH v8 27/30] powerpc/kprobes: Don't allow breakpoints on suffixes

2020-05-05 Thread Jordan Niethe
Do not allow inserting breakpoints on the suffix of a prefix instruction in kprobes. Signed-off-by: Jordan Niethe --- v8: Add this back from v3 --- arch/powerpc/kernel/kprobes.c | 13 + 1 file changed, 13 insertions(+) diff --git a/arch/powerpc/kernel/kprobes.c

Re: [PATCH v3 11/15] powerpc/64s: machine check interrupt update NMI accounting

2020-05-05 Thread Nicholas Piggin
Excerpts from Christophe Leroy's message of April 7, 2020 3:37 pm: > > > Le 07/04/2020 à 07:16, Nicholas Piggin a écrit : >> machine_check_early is taken as an NMI, so nmi_enter is used there. >> machine_check_exception is no longer taken as an NMI (it's invoked >> via irq_work in the case a

[PATCH v8 00/30] Initial Prefixed Instruction support

2020-05-05 Thread Jordan Niethe
A future revision of the ISA will introduce prefixed instructions. A prefixed instruction is composed of a 4-byte prefix followed by a 4-byte suffix. All prefixes have the major opcode 1. A prefix will never be a valid word instruction. A suffix may be an existing word instruction or a new

[PATCH v8 06/30] powerpc: Use a macro for creating instructions from u32s

2020-05-05 Thread Jordan Niethe
In preparation for instructions having a more complex data type start using a macro, ppc_inst(), for making an instruction out of a u32. A macro is used so that instructions can be used as initializer elements. Currently this does nothing, but it will allow for creating a data type that can

[PATCH v8 05/30] powerpc: Change calling convention for create_branch() et. al.

2020-05-05 Thread Jordan Niethe
create_branch(), create_cond_branch() and translate_branch() return the instruction that they create, or return 0 to signal an error. Separate these concerns in preparation for an instruction type that is not just an unsigned int. Fill the created instruction to a pointer passed as the first

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