Re: [PATCH 00/17] spelling.txt: /decriptors/descriptors/

2020-06-15 Thread Jason Gunthorpe
On Tue, Jun 09, 2020 at 01:45:53PM +0100, Kieran Bingham wrote: > I wouldn't normally go through spelling fixes, but I caught sight of > this typo twice, and then foolishly grepped the tree for it, and saw how > pervasive it was. > > so here I am ... fixing a typo globally... but with an addition

Re: [PATCH v2 12/12] x86/traps: Fix up invalid PASID

2020-06-15 Thread Andy Lutomirski
> On Jun 15, 2020, at 1:17 PM, Fenghua Yu wrote: > > Hi, Peter, > >> On Mon, Jun 15, 2020 at 09:09:28PM +0200, Peter Zijlstra wrote: >>> On Mon, Jun 15, 2020 at 11:55:29AM -0700, Fenghua Yu wrote: >>> >>> Or do you suggest to add a random new flag in struct thread_info instead >>> of a TIF

[Bug 208197] New: OF: /pci@f2000000/mac-io@17/gpio@50/...: could not find phandle

2020-06-15 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=208197 Bug ID: 208197 Summary: OF: /pci@f200/mac-io@17/gpio@50/...: could not find phandle Product: Platform Specific/Hardware Version: 2.5 Kernel Version: 5.8-rc1

Re: [PATCH v2 12/12] x86/traps: Fix up invalid PASID

2020-06-15 Thread Fenghua Yu
Hi, Peter, On Mon, Jun 15, 2020 at 08:31:16PM +0200, Peter Zijlstra wrote: > On Mon, Jun 15, 2020 at 11:12:59AM -0700, Fenghua Yu wrote: > > > I don't get why you need a rdmsr here, or why not having one would > > > require a TIF flag. Is that because this MSR is XSAVE/XRSTOR managed? > > > > My

[Bug 206203] kmemleak reports various leaks in drivers/of/unittest.c

2020-06-15 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=206203 Erhard F. (erhar...@mailbox.org) changed: What|Removed |Added Attachment #287671|0 |1 is obsolete|

Re: [PATCH 1/2] mm, treewide: Rename kzfree() to kfree_sensitive()

2020-06-15 Thread Dan Carpenter
On Mon, Apr 13, 2020 at 05:15:49PM -0400, Waiman Long wrote: > diff --git a/mm/slab_common.c b/mm/slab_common.c > index 23c7500eea7d..c08bc7eb20bd 100644 > --- a/mm/slab_common.c > +++ b/mm/slab_common.c > @@ -1707,17 +1707,17 @@ void *krealloc(const void *p, size_t new_size, gfp_t > flags) >

Re: [PATCH 2/6] exec: simplify the compat syscall handling

2020-06-15 Thread Arnd Bergmann
On Mon, Jun 15, 2020 at 4:48 PM Brian Gerst wrote: > On Mon, Jun 15, 2020 at 10:13 AM Christoph Hellwig wrote: > > On Mon, Jun 15, 2020 at 03:31:35PM +0200, Arnd Bergmann wrote: > > > > I'd rather keep it in common code as that allows all the low-level > > exec stuff to be marked static, and

Re: [PATCH net v2] ibmvnic: Harden device login requests

2020-06-15 Thread David Miller
From: Thomas Falcon Date: Mon, 15 Jun 2020 10:29:23 -0500 > The VNIC driver's "login" command sequence is the final step > in the driver's initialization process with device firmware, > confirming the available device queue resources to be utilized > by the driver. Under high system load,

[Bug 206203] kmemleak reports various leaks in drivers/of/unittest.c

2020-06-15 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=206203 Erhard F. (erhar...@mailbox.org) changed: What|Removed |Added Attachment #287673|0 |1 is obsolete|

RE: [PATCH v2 12/12] x86/traps: Fix up invalid PASID

2020-06-15 Thread Luck, Tony
> Are we planning to keep PASID live once a task has used it once or are we > going to swap it lazily? If the latter, a percpu variable might be better. Current plan is "touch it once and the task owns it until exit(2)" Maybe someday in the future when we have data on how applications actually

Re: [PATCH 1/2] mm, treewide: Rename kzfree() to kfree_sensitive()

2020-06-15 Thread Waiman Long
On 6/15/20 2:07 PM, Dan Carpenter wrote: On Mon, Apr 13, 2020 at 05:15:49PM -0400, Waiman Long wrote: diff --git a/mm/slab_common.c b/mm/slab_common.c index 23c7500eea7d..c08bc7eb20bd 100644 --- a/mm/slab_common.c +++ b/mm/slab_common.c @@ -1707,17 +1707,17 @@ void *krealloc(const void *p,

Re: [PATCH v2 12/12] x86/traps: Fix up invalid PASID

2020-06-15 Thread Fenghua Yu
Hi, Peter, On Mon, Jun 15, 2020 at 09:09:28PM +0200, Peter Zijlstra wrote: > On Mon, Jun 15, 2020 at 11:55:29AM -0700, Fenghua Yu wrote: > > > Or do you suggest to add a random new flag in struct thread_info instead > > of a TIF flag? > > Why thread_info? What's wrong with something simple like

Re: [PATCH v13 2/6] seq_buf: Export seq_buf_printf

2020-06-15 Thread Steven Rostedt
On Mon, 15 Jun 2020 14:55:52 +0200 Borislav Petkov wrote: > Can you please resend your patchset once a week like everyone else and > not flood inboxes with it? Boris, Haven't you automated your inbox yet? I have patchwork reading my INBOX and it's smart enough to understand new series, and the

Re: [PATCH v2 12/12] x86/traps: Fix up invalid PASID

2020-06-15 Thread Fenghua Yu
On Mon, Jun 15, 2020 at 06:03:57PM +0200, Peter Zijlstra wrote: > On Mon, Jun 15, 2020 at 08:48:54AM -0700, Fenghua Yu wrote: > > Hi, Peter, > > On Mon, Jun 15, 2020 at 09:56:49AM +0200, Peter Zijlstra wrote: > > > On Fri, Jun 12, 2020 at 05:41:33PM -0700, Fenghua Yu wrote: > > > > +/* > > > > + *

Re: [PATCH v2 12/12] x86/traps: Fix up invalid PASID

2020-06-15 Thread Peter Zijlstra
On Mon, Jun 15, 2020 at 11:12:59AM -0700, Fenghua Yu wrote: > > I don't get why you need a rdmsr here, or why not having one would > > require a TIF flag. Is that because this MSR is XSAVE/XRSTOR managed? > > My concern is TIF flags are precious (only 3 slots available). Defining > a new TIF flag

Re: [PATCH v2 12/12] x86/traps: Fix up invalid PASID

2020-06-15 Thread Peter Zijlstra
On Mon, Jun 15, 2020 at 11:55:29AM -0700, Fenghua Yu wrote: > Or do you suggest to add a random new flag in struct thread_info instead > of a TIF flag? Why thread_info? What's wrong with something simple like the below. It takes a bit from the 'strictly current' flags word. diff --git

Re: [PATCH v2 12/12] x86/traps: Fix up invalid PASID

2020-06-15 Thread Peter Zijlstra
On Mon, Jun 15, 2020 at 01:17:35PM -0700, Fenghua Yu wrote: > Hi, Peter, > > On Mon, Jun 15, 2020 at 09:09:28PM +0200, Peter Zijlstra wrote: > > On Mon, Jun 15, 2020 at 11:55:29AM -0700, Fenghua Yu wrote: > > > > > Or do you suggest to add a random new flag in struct thread_info instead > > > of

Re: [PATCH v6 0/2] Append new variables to vmcoreinfo (TCR_EL1.T1SZ for arm64 and MAX_PHYSMEM_BITS for all archs)

2020-06-15 Thread Bhupesh Sharma
Hello Catalin, Will, On Tue, Jun 2, 2020 at 10:54 AM Bhupesh Sharma wrote: > > Hello, > > On Thu, May 14, 2020 at 12:22 AM Bhupesh Sharma wrote: > > > > Apologies for the delayed update. Its been quite some time since I > > posted the last version (v5), but I have been really caught up in some

Re: [PATCH v13 2/6] seq_buf: Export seq_buf_printf

2020-06-15 Thread Dan Williams
On Mon, Jun 15, 2020 at 5:56 AM Borislav Petkov wrote: > > On Mon, Jun 15, 2020 at 06:14:03PM +0530, Vaibhav Jain wrote: > > 'seq_buf' provides a very useful abstraction for writing to a string > > buffer without needing to worry about it over-flowing. However even > > though the API has been

Re: [PATCH 2/6] exec: simplify the compat syscall handling

2020-06-15 Thread Brian Gerst
On Mon, Jun 15, 2020 at 2:47 PM Arnd Bergmann wrote: > > On Mon, Jun 15, 2020 at 4:48 PM Brian Gerst wrote: > > On Mon, Jun 15, 2020 at 10:13 AM Christoph Hellwig wrote: > > > On Mon, Jun 15, 2020 at 03:31:35PM +0200, Arnd Bergmann wrote: > > > > > > > I'd rather keep it in common code as that

Re: [PATCH v2 12/12] x86/traps: Fix up invalid PASID

2020-06-15 Thread Andy Lutomirski
> On Jun 15, 2020, at 1:56 PM, Luck, Tony wrote: > >  >> >> Are we planning to keep PASID live once a task has used it once or are we >> going to swap it lazily? If the latter, a percpu variable might be better. > > Current plan is "touch it once and the task owns it until exit(2)" > >

Re: [PATCH v2 12/12] x86/traps: Fix up invalid PASID

2020-06-15 Thread Peter Zijlstra
On Mon, Jun 15, 2020 at 11:19:21AM -0700, Raj, Ashok wrote: > On Mon, Jun 15, 2020 at 06:03:57PM +0200, Peter Zijlstra wrote: > > > > I don't get why you need a rdmsr here, or why not having one would > > require a TIF flag. Is that because this MSR is XSAVE/XRSTOR managed? > > > > > > > +

[Bug 206203] kmemleak reports various leaks in drivers/of/unittest.c

2020-06-15 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=206203 Erhard F. (erhar...@mailbox.org) changed: What|Removed |Added Attachment #287675|0 |1 is obsolete|

RE: [PATCH v2 12/12] x86/traps: Fix up invalid PASID

2020-06-15 Thread Luck, Tony
> So what’s the RDMSR for? Surely you > have some state somewhere that says “this task has a PASID.” > Can’t you just make sure that stays in sync with the MSR? Then, on #GP, if > the task already has a PASID, you know the MSR is set. We have state that says the process ("mm") has been

[Bug 208197] OF: /pci@f2000000/mac-io@17/gpio@50/...: could not find phandle

2020-06-15 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=208197 --- Comment #1 from Erhard F. (erhar...@mailbox.org) --- Created attachment 289687 --> https://bugzilla.kernel.org/attachment.cgi?id=289687=edit kernel .config (5.8-rc1, PowerMac G4 DP) -- You are receiving this mail because: You are watching

Re: [PATCH v13 3/6] powerpc/papr_scm: Fetch nvdimm health information from PHYP

2020-06-15 Thread Ira Weiny
On Mon, Jun 15, 2020 at 06:14:04PM +0530, Vaibhav Jain wrote: > Implement support for fetching nvdimm health information via > H_SCM_HEALTH hcall as documented in Ref[1]. The hcall returns a pair > of 64-bit bitmap, bitwise-and of which is then stored in > 'struct papr_scm_priv' and subsequently

Re: [PATCH 2/2] cpufreq: Specify default governor on command line

2020-06-15 Thread Viresh Kumar
On 15-06-20, 17:55, Quentin Perret wrote: > +static void cpufreq_get_default_governor(void) > +{ > + default_governor = cpufreq_parse_governor(cpufreq_param_governor); > + if (!default_governor) { > + if (*cpufreq_param_governor) > + pr_warn("Failed to find

Re: [PATCH v3] ASoC: fsl_ssi: Fix bclk calculation for mono channel

2020-06-15 Thread Nicolin Chen
On Tue, Jun 16, 2020 at 10:53:48AM +0800, Shengjiu Wang wrote: > For mono channel, SSI will switch to Normal mode. > > In Normal mode and Network mode, the Word Length Control bits > control the word length divider in clock generator, which is > different with I2S Master mode (the word length is

Re: [PATCH v5 01/13] powerpc: Remove Xilinx PPC405/PPC440 support

2020-06-15 Thread Nathan Chancellor
On Thu, May 21, 2020 at 04:55:52PM +, Christophe Leroy wrote: > From: Michal Simek > > The latest Xilinx design tools called ISE and EDK has been released in > October 2013. New tool doesn't support any PPC405/PPC440 new designs. > These platforms are no longer supported and tested. > >

Re: [PATCH v2] ASoC: fsl_ssi: Fix bclk calculation for mono channel

2020-06-15 Thread Shengjiu Wang
On Tue, Jun 16, 2020 at 9:59 AM Nicolin Chen wrote: > > On Tue, Jun 16, 2020 at 09:48:39AM +0800, Shengjiu Wang wrote: > > On Tue, Jun 16, 2020 at 7:11 AM Nicolin Chen wrote: > > > > > > On Mon, Jun 15, 2020 at 01:56:18PM +0800, Shengjiu Wang wrote: > > > > For mono channel, SSI will switch to

[PATCH v2] ASoC: fsl_ssi: Fix bclk calculation for mono channel

2020-06-15 Thread Shengjiu Wang
For mono channel, SSI will switch to Normal mode. In Normal mode and Network mode, the Word Length Control bits control the word length divider in clock generator, which is different with I2S Master mode (the word length is fixed to 32bit), it should be the value of params_width(hw_params). The

[PATCH v4 01/41] powerpc/book3s64/pkeys: Fixup bit numbering

2020-06-15 Thread Aneesh Kumar K.V
This number the pkey bit such that it is easy to follow. PKEY_BIT0 is the lower order bit. This makes further changes easy to follow. No functional change in this patch other than linux page table for hash translation now maps pkeys differently. Signed-off-by: Aneesh Kumar K.V ---

[PATCH v4 08/41] powerpc/book3s64/pkeys: Convert execute key support to static key

2020-06-15 Thread Aneesh Kumar K.V
Convert the bool to a static key like pkey_disabled. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/book3s64/pkeys.c | 12 +--- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/arch/powerpc/mm/book3s64/pkeys.c b/arch/powerpc/mm/book3s64/pkeys.c index

[PATCH v4 26/41] powerpc/book3s64/pkeys: Inherit correctly on fork.

2020-06-15 Thread Aneesh Kumar K.V
Child thread.kuap value is inherited from the parent in copy_thread_tls. We still need to make sure when the child returns from a fork in the kernel we start with the kernel default AMR value. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/kernel/process.c | 9 + 1 file changed, 9

[PATCH v4 30/41] powerpc/book3s64/kuap: Restrict access to userspace based on userspace AMR

2020-06-15 Thread Aneesh Kumar K.V
If an application has configured address protection such that read/write is denied using pkey even the kernel should receive a FAULT on accessing the same. This patch use user AMR value stored in pt_regs.kuap to achieve the same. Signed-off-by: Aneesh Kumar K.V ---

[PATCH v4 31/41] powerpc/book3s64/kuap: Improve error reporting with KUAP

2020-06-15 Thread Aneesh Kumar K.V
With hash translation use DSISR_KEYFAULT to identify a wrong access. With Radix we look at the AMR value and type of fault. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/book3s/32/kup.h | 4 +-- arch/powerpc/include/asm/book3s/64/kup.h | 28

[PATCH v4 36/41] powerpc/book3s64/keys: Print information during boot.

2020-06-15 Thread Aneesh Kumar K.V
Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/book3s64/pkeys.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/mm/book3s64/pkeys.c b/arch/powerpc/mm/book3s64/pkeys.c index 9ab8fdaf7146..65dbb335f0a0 100644 --- a/arch/powerpc/mm/book3s64/pkeys.c +++

[PATCH] powerpc/64s: Fix KVM interrupt using wrong save area

2020-06-15 Thread Nicholas Piggin
The CTR register reload in the KVM interrupt path used the wrong save area for SLB (and NMI) interrupts. Fixes: 9600f261acaaa ("powerpc/64s/exception: Move KVM test to common code") Reported-by: Christian Zigotzky Tested-by: Christian Zigotzky Signed-off-by: Nicholas Piggin ---

[PATCH v4 06/41] powerpc/book3s64/pkeys: Prevent key 1 modification from userspace.

2020-06-15 Thread Aneesh Kumar K.V
Key 1 is marked reserved by ISA. Setup uamor to prevent userspace modification of the same. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/book3s64/pkeys.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/mm/book3s64/pkeys.c b/arch/powerpc/mm/book3s64/pkeys.c index

[PATCH v4 10/41] powerpc/book3s64/pkeys: Convert pkey_total to max_pkey

2020-06-15 Thread Aneesh Kumar K.V
max_pkey now represents max key value that userspace can allocate. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/pkeys.h | 7 +-- arch/powerpc/mm/book3s64/pkeys.c | 14 +++--- 2 files changed, 12 insertions(+), 9 deletions(-) diff --git

[PATCH v4 11/41] powerpc/book3s64/pkeys: Make initial_allocation_mask static

2020-06-15 Thread Aneesh Kumar K.V
initial_allocation_mask is not used outside this file. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/pkeys.h | 1 - arch/powerpc/mm/book3s64/pkeys.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm/pkeys.h

[PATCH v4 14/41] powerpc/book3s64/kuep: Add MMU_FTR_KUEP

2020-06-15 Thread Aneesh Kumar K.V
This will be used to enable/disable Kernel Userspace Execution Prevention (KUEP). Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/mmu.h | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h index

[PATCH v4 17/41] powerpc/book3s64/kuap: Move KUAP related function outside radix

2020-06-15 Thread Aneesh Kumar K.V
The next set of patches adds support for kuap with hash translation. In preparation for that rename/move kuap related functions to non radix names. Signed-off-by: Aneesh Kumar K.V --- .../asm/book3s/64/{kup-radix.h => kup.h} | 6 +++--- arch/powerpc/include/asm/kup.h| 2

[PATCH v4 25/41] powerpc/book3s64/kuep: Store/restore userspace IAMR correctly on entry and exit from kernel

2020-06-15 Thread Aneesh Kumar K.V
This prepare kernel to operate with a different value than userspace IAMR. For this, IAMR needs to be saved and restored on entry and return from the kernel. If MMU_FTR_KEY is enabled we always use the key mechanism to implement KUEP feature. If MMU_FTR_KEY is not supported and if we support

[PATCH v4 32/41] powerpc/book3s64/kuap: Use Key 3 to implement KUAP with hash translation.

2020-06-15 Thread Aneesh Kumar K.V
Radix use AMR Key 0 and hash translation use AMR key 3. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/book3s/64/kup.h | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/include/asm/book3s/64/kup.h b/arch/powerpc/include/asm/book3s/64/kup.h

[PATCH v4 19/41] powerpc/book3s64/kuap: Rename MMU_FTR_RADIX_KUAP to MMU_FTR_KUAP

2020-06-15 Thread Aneesh Kumar K.V
The next set of patches adds support for kuap with hash translation. In preparation for that rename/move kuap related functions to non radix names. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/book3s/64/kup.h | 18 +- arch/powerpc/include/asm/mmu.h | 6

[PATCH v4 15/41] powerpc/book3s64/pkeys: Use execute_pkey_disable static key

2020-06-15 Thread Aneesh Kumar K.V
Use execute_pkey_disabled static key to check for execute key support instead of pkey_disabled. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/pkeys.h | 10 +- arch/powerpc/mm/book3s64/pkeys.c | 5 - 2 files changed, 5 insertions(+), 10 deletions(-) diff --git

[PATCH v4 16/41] powerpc/book3s64/pkeys: Use MMU_FTR_PKEY instead of pkey_disabled static key

2020-06-15 Thread Aneesh Kumar K.V
Instead of pkey_disabled static key use mmu feature MMU_FTR_PKEY. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/book3s/64/pkeys.h | 2 +- arch/powerpc/include/asm/pkeys.h | 14 ++ arch/powerpc/mm/book3s64/pkeys.c | 16 +++- 3 files

[PATCH v4 21/41] powerpc/book3s64/kuap: Move UAMOR setup to key init function

2020-06-15 Thread Aneesh Kumar K.V
With hash translation, the kernel will use key 3 for implementing KUAP feature. Hence the default UAMOR value depends on what other keys are marked reserved. Move the UAMOR initialization to pkeys init. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/book3s/64/kup.h | 2 ++

[PATCH v4 27/41] powerpc/book3s64/pkeys: Reset userspace AMR correctly on exec

2020-06-15 Thread Aneesh Kumar K.V
On fork, we inherit from the parent and on exec, we should switch to default_amr values. Also, avoid changing the AMR register value within the kernel. The kernel now runs with different AMR values. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/book3s/64/kup.h | 2 ++

[PATCH v4 34/41] powerpc/book3s64/hash/kuap: Enable kuap on hash

2020-06-15 Thread Aneesh Kumar K.V
Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/book3s64/pkeys.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/mm/book3s64/pkeys.c b/arch/powerpc/mm/book3s64/pkeys.c index b260e33e4e23..0d6fd69708f2 100644 --- a/arch/powerpc/mm/book3s64/pkeys.c +++

[PATCH v4 35/41] powerpc/book3s64/hash/kuep: Enable KUEP on hash

2020-06-15 Thread Aneesh Kumar K.V
Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/book3s64/pkeys.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/mm/book3s64/pkeys.c b/arch/powerpc/mm/book3s64/pkeys.c index 0d6fd69708f2..9ab8fdaf7146 100644 --- a/arch/powerpc/mm/book3s64/pkeys.c +++

[PATCH v4 40/41] powerpc/book3s64/keys/kuap: Reset AMR/IAMR values on kexec

2020-06-15 Thread Aneesh Kumar K.V
We can kexec into a kernel that doesn't use memory keys for kernel mapping (such as an older kernel which doesn't support kuap/kuep with hash translation). We need to make sure we reset the AMR/IAMR value on kexec otherwise, the new kernel will use key 0 for kernel mapping and the old AMR value

[PATCH v4 38/41] powerpc/selftest/ptrace-pkey: Update the test to mark an invalid pkey correctly

2020-06-15 Thread Aneesh Kumar K.V
Signed-off-by: Aneesh Kumar K.V --- .../selftests/powerpc/ptrace/ptrace-pkey.c| 30 --- 1 file changed, 12 insertions(+), 18 deletions(-) diff --git a/tools/testing/selftests/powerpc/ptrace/ptrace-pkey.c b/tools/testing/selftests/powerpc/ptrace/ptrace-pkey.c index

Re: [PATCH] SUNRPC: Add missing asm/cacheflush.h

2020-06-15 Thread Christophe Leroy
Le 14/06/2020 à 20:57, Chuck Lever a écrit : Hi Christophe - On Jun 14, 2020, at 1:07 PM, Christophe Leroy wrote: Even if that's only a warning, not including asm/cacheflush.h leads to svc_flush_bvec() being empty allthough powerpc defines ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE. CC

[PATCH v4 41/41] powerpc/book3s64/hash/kup: Don't hardcode kup key

2020-06-15 Thread Aneesh Kumar K.V
Make KUAP/KUEP key a variable and also check whether the platform limit the max key such that we can't use the key for KUAP/KEUP. Signed-off-by: Aneesh Kumar K.V --- .../powerpc/include/asm/book3s/64/hash-pkey.h | 22 + arch/powerpc/include/asm/book3s/64/kup.h | 1 +

[PATCH v4 09/41] powerpc/book3s64/pkeys: Simplify pkey disable branch

2020-06-15 Thread Aneesh Kumar K.V
Make the default value FALSE (pkey enabled) and set to TRUE when we find the total number of keys supported to be zero. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/pkeys.h | 2 +- arch/powerpc/mm/book3s64/pkeys.c | 7 +++ 2 files changed, 4 insertions(+), 5 deletions(-)

[PATCH v4 18/41] powerpc/book3s64/kuep: Move KUEP related function outside radix

2020-06-15 Thread Aneesh Kumar K.V
The next set of patches adds support for kuep with hash translation. In preparation for that rename/move kuap related functions to non radix names. Also set MMU_FTR_KUEP and add the missing isync(). Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/book3s/64/kup.h | 1 +

[PATCH v4 20/41] powerpc/book3s64/kuap/kuep: Make KUAP and KUEP a subfeature of PPC_MEM_KEYS

2020-06-15 Thread Aneesh Kumar K.V
The next set of patches adds support for kuap with hash translation. Hence make KUAP a BOOK3S_64 feature. Also make it a subfeature of PPC_MEM_KEYS. Hash translation is going to use pkeys to support KUAP/KUEP. Adding this dependency reduces the code complexity and enables us to move some of the

[PATCH v4 22/41] powerpc/book3s64/kuap: Use Key 3 for kernel mapping with hash translation

2020-06-15 Thread Aneesh Kumar K.V
This patch updates kernel hash page table entries to use storage key 3 for its mapping. This implies all kernel access will now use key 3 to control READ/WRITE. The patch also prevents the allocation of key 3 from userspace and UAMOR value is updated such that userspace cannot modify key 3.

[PATCH v4 00/41] Kernel userspace access/execution prevention with hash translation

2020-06-15 Thread Aneesh Kumar K.V
This patch series implements KUAP and KUEP with hash translation mode using memory keys. The kernel now uses memory protection key 3 to control access to the kernel. Kernel page table entries are now configured with key 3. Access to locations configured with any other key value is denied when in

[PATCH v4 07/41] powerpc/book3s64/pkeys: kill cpu feature key CPU_FTR_PKEY

2020-06-15 Thread Aneesh Kumar K.V
We don't use CPU_FTR_PKEY anymore. Remove the feature bit and mark it free. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/cputable.h | 13 ++--- arch/powerpc/kernel/dt_cpu_ftrs.c | 6 -- 2 files changed, 6 insertions(+), 13 deletions(-) diff --git

[PATCH v4 29/41] powerpc/book3s64/pkeys: Don't update SPRN_AMR when in kernel mode.

2020-06-15 Thread Aneesh Kumar K.V
Now that kernel correctly store/restore userspace AMR/IAMR values, avoid manipulating AMR and IAMR from the kernel on behalf of userspace. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/book3s/64/kup.h | 23 arch/powerpc/include/asm/processor.h | 5 --

[PATCH v4 37/41] powerpc/selftest/ptrave-pkey: Rename variables to make it easier to follow code

2020-06-15 Thread Aneesh Kumar K.V
Rename variable to indicate that they are invalid values which we will use to test ptrace update of pkeys. Signed-off-by: Aneesh Kumar K.V --- .../selftests/powerpc/ptrace/ptrace-pkey.c| 26 +-- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git

[PATCH v4 05/41] powerpc/book3s64/pkeys: Simplify the key initialization

2020-06-15 Thread Aneesh Kumar K.V
Add documentation explaining the execute_only_key. The reservation and initialization mask details are also explained in this patch. No functional change in this patch. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/book3s64/pkeys.c | 186 ++- 1 file changed,

[PATCH v4 04/41] powerpc/book3s64/pkeys: Explain key 1 reservation details

2020-06-15 Thread Aneesh Kumar K.V
This explains the details w.r.t key 1. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/book3s64/pkeys.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/mm/book3s64/pkeys.c b/arch/powerpc/mm/book3s64/pkeys.c index 1199fc2bfaec..d60e6bfa3e03 100644 ---

[PATCH v4 13/41] powerpc/book3s64/pkeys: Enable MMU_FTR_PKEY

2020-06-15 Thread Aneesh Kumar K.V
Parse storage keys related device tree entry in early_init_devtree and enable MMU feature MMU_FTR_PKEY if pkeys are supported. MMU feature is used instead of CPU feature because this enables us to group MMU_FTR_KUAP and MMU_FTR_PKEY in asm feature fixup code. Signed-off-by: Aneesh Kumar K.V ---

[PATCH v4 24/41] powerpc/book3s64/pkeys: Store/restore userspace AMR correctly on entry and exit from kernel

2020-06-15 Thread Aneesh Kumar K.V
This prepare kernel to operate with a different value than userspace AMR. For this, AMR needs to be saved and restored on entry and return from the kernel. With KUAP we modify kernel AMR when accessing user address from the kernel via copy_to/from_user interfaces. If MMU_FTR_KEY is enabled we

[PATCH v4 33/41] powerpc/book3s64/kuep: Use Key 3 to implement KUEP with hash translation.

2020-06-15 Thread Aneesh Kumar K.V
Radix use IAMR Key 0 and hash translation use IAMR key 3. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/book3s/64/kup.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/book3s/64/kup.h b/arch/powerpc/include/asm/book3s/64/kup.h index

[PATCH v4 39/41] powerpc/selftest/ptrace-pkey: IAMR and uamor cannot be updated by ptrace

2020-06-15 Thread Aneesh Kumar K.V
Both IAMR and uamor are privileged and cannot be updated by userspace. Hence we also don't allow ptrace interface to update them. Don't update them in the test. Also expected_iamr is only changed if we can allocate a DISABLE_EXECUTE pkey. Signed-off-by: Aneesh Kumar K.V ---

[PATCH v4 03/41] powerpc/book3s64/pkeys: Move pkey related bits in the linux page table

2020-06-15 Thread Aneesh Kumar K.V
To keep things simple, all the pkey related bits are kept together in linux page table for 64K config with hash translation. With hash-4k kernel requires 4 bits to store slots details. This is done by overloading some of the RPN bits for storing the slot details. Due to this PKEY_BIT0 on the 4K

[PATCH v4 02/41] powerpc/book3s64/pkeys: pkeys are supported only on hash on book3s.

2020-06-15 Thread Aneesh Kumar K.V
Move them to hash specific file and add BUG() for radix path. --- .../powerpc/include/asm/book3s/64/hash-pkey.h | 32 arch/powerpc/include/asm/book3s/64/pkeys.h| 25 + arch/powerpc/include/asm/pkeys.h | 37 --- 3 files changed, 64

[PATCH v4 12/41] powerpc/book3s64/pkeys: Mark all the pkeys above max pkey as reserved

2020-06-15 Thread Aneesh Kumar K.V
The hypervisor can return less than max allowed pkey (for ex: 31) instead of 32. We should mark all the pkeys above max allowed as reserved so that we avoid the allocation of the wrong pkey(for ex: key 31 in the above case) by userspace. Signed-off-by: Aneesh Kumar K.V ---

[PATCH v4 23/41] powerpc/exec: Set thread.regs early during exec

2020-06-15 Thread Aneesh Kumar K.V
In later patches during exec, we would like to access default regs.kuap to control access to the user mapping. Having thread.regs set early makes the code changes simpler. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/thread_info.h | 2 -- arch/powerpc/kernel/process.c

[PATCH v4 28/41] powerpc/ptrace-view: Use pt_regs values instead of thread_struct based one.

2020-06-15 Thread Aneesh Kumar K.V
We will remove thread.amr/iamr/uamor in a later patch Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/kernel/ptrace/ptrace-view.c | 23 +-- 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/kernel/ptrace/ptrace-view.c

Re: [PATCH 04/21] mm: free_area_init: use maximal zone PFNs rather than zone sizes

2020-06-15 Thread Mike Rapoport
Hi Greg, On Mon, Jun 15, 2020 at 01:53:42PM +1000, Greg Ungerer wrote: > Hi Mike, > > From: Mike Rapoport > > Currently, architectures that use free_area_init() to initialize memory map > > and node and zone structures need to calculate zone and hole sizes. We can > > use free_area_init_nodes()

[PATCH v4 0/3] mm, treewide: Rename kzfree() to kfree_sensitive()

2020-06-15 Thread Waiman Long
v4: - Break out the memzero_explicit() change as suggested by Dan Carpenter so that it can be backported to stable. - Drop the "crypto: Remove unnecessary memzero_explicit()" patch for now as there can be a bit more discussion on what is best. It will be introduced as a separate

[PATCH v3] All arch: remove system call sys_sysctl

2020-06-15 Thread Xiaoming Ni
uot; changes in v3: restore include/uapi/linux/sysctl.h rebase on commit bc7d17d55762 ("Add linux-next specific files for 20200615") Conflicts: arch/sh/include/uapi/asm/unistd_64.h arch/sh/kernel/syscalls_64.S v2: According to Kees Cook's suggestion, completely remove sys_

Re: [PATCH v2] ASoC: fsl_ssi: Fix bclk calculation for mono channel

2020-06-15 Thread Nicolin Chen
On Tue, Jun 16, 2020 at 09:48:39AM +0800, Shengjiu Wang wrote: > On Tue, Jun 16, 2020 at 7:11 AM Nicolin Chen wrote: > > > > On Mon, Jun 15, 2020 at 01:56:18PM +0800, Shengjiu Wang wrote: > > > For mono channel, SSI will switch to Normal mode. > > > > > > In Normal mode and Network mode, the Word

[PATCH 2/2] cpufreq: Specify default governor on command line

2020-06-15 Thread Quentin Perret
Currently, the only way to specify the default CPUfreq governor is via Kconfig options, which suits users who can build the kernel themselves perfectly. However, for those who use a distro-like kernel (such as Android, with the Generic Kernel Image project), the only way to use a different

[PATCH v3] ASoC: fsl_ssi: Fix bclk calculation for mono channel

2020-06-15 Thread Shengjiu Wang
For mono channel, SSI will switch to Normal mode. In Normal mode and Network mode, the Word Length Control bits control the word length divider in clock generator, which is different with I2S Master mode (the word length is fixed to 32bit), it should be the value of params_width(hw_params). The

[PATCH 17/25] mm/powerpc: Use mm_fault_accounting()

2020-06-15 Thread Peter Xu
Use the new mm_fault_accounting() helper for page fault accounting. cmo_account_page_fault() is special. Keep that. CC: Michael Ellerman CC: Benjamin Herrenschmidt CC: Paul Mackerras CC: linuxppc-dev@lists.ozlabs.org Signed-off-by: Peter Xu --- arch/powerpc/mm/fault.c | 13 - 1

Re: [PATCH v2 12/12] x86/traps: Fix up invalid PASID

2020-06-15 Thread Raj, Ashok
On Mon, Jun 15, 2020 at 06:03:57PM +0200, Peter Zijlstra wrote: > > I don't get why you need a rdmsr here, or why not having one would > require a TIF flag. Is that because this MSR is XSAVE/XRSTOR managed? > > > > > +*/ > > > > + rdmsrl(MSR_IA32_PASID, pasid_msr); > > > > +

Re: [PATCH v2] ASoC: fsl_ssi: Fix bclk calculation for mono channel

2020-06-15 Thread Nicolin Chen
On Mon, Jun 15, 2020 at 01:56:18PM +0800, Shengjiu Wang wrote: > For mono channel, SSI will switch to Normal mode. > > In Normal mode and Network mode, the Word Length Control bits > control the word length divider in clock generator, which is > different with I2S Master mode (the word length is

[PATCH v4 3/3] btrfs: Use kfree() in btrfs_ioctl_get_subvol_info()

2020-06-15 Thread Waiman Long
In btrfs_ioctl_get_subvol_info(), there is a classic case where kzalloc() was incorrectly paired with kzfree(). According to David Sterba, there isn't any sensitive information in the subvol_info that needs to be cleared before freeing. So kfree_sensitive() isn't really needed, use kfree()

Re: [PATCH] kbuild: reuse vmlinux.o in vmlinux_link

2020-06-15 Thread Masahiro Yamada
On Tue, Jun 16, 2020 at 6:47 AM Sami Tolvanen wrote: > > On Sat, May 23, 2020 at 8:13 AM Masahiro Yamada wrote: > > > > Hi Nicholas, > > (+CC: Sam Ravnborg) > > > > > > On Sat, May 23, 2020 at 7:06 PM Nicholas Piggin wrote: > > > > > > Excerpts from Masahiro Yamada's message of May 23, 2020

Re: [PATCH 00/17] spelling.txt: /decriptors/descriptors/

2020-06-15 Thread Martin K. Petersen
On Tue, 9 Jun 2020 13:45:53 +0100, Kieran Bingham wrote: > I wouldn't normally go through spelling fixes, but I caught sight of > this typo twice, and then foolishly grepped the tree for it, and saw how > pervasive it was. > > so here I am ... fixing a typo globally... but with an addition in >

Re: [PATCH 0/3] ASoC: fsl_easrc: Fix several warnings

2020-06-15 Thread Mark Brown
On Wed, 3 Jun 2020 11:39:38 +0800, Shengjiu Wang wrote: > Fix several warnings with "make W=1" > > Shengjiu Wang (3): > ASoC: fsl_easrc: Fix -Wmissing-prototypes warning > ASoC: fsl_easrc: Fix -Wunused-but-set-variable > ASoC: fsl_easrc: Fix "Function parameter not described" warnings > >

[PATCH v4 1/3] mm/slab: Use memzero_explicit() in kzfree()

2020-06-15 Thread Waiman Long
The kzfree() function is normally used to clear some sensitive information, like encryption keys, in the buffer before freeing it back to the pool. Memset() is currently used for the buffer clearing. However, it is entirely possible that the compiler may choose to optimize away the memory clearing

Re: [PATCH v4 1/3] mm/slab: Use memzero_explicit() in kzfree()

2020-06-15 Thread Eric Biggers
On Mon, Jun 15, 2020 at 09:57:16PM -0400, Waiman Long wrote: > The kzfree() function is normally used to clear some sensitive > information, like encryption keys, in the buffer before freeing it back > to the pool. Memset() is currently used for the buffer clearing. However, > it is entirely

Re: [PATCH 1/2] cpufreq: Register governors at core_initcall

2020-06-15 Thread Viresh Kumar
On 15-06-20, 17:55, Quentin Perret wrote: > Currently, most CPUFreq governors are registered at core_initcall time > when used as default, and module_init otherwise. In preparation for > letting users specify the default governor on the kernel command line, > change all of them to use

Re: [PATCH v2 04/12] docs: x86: Add documentation for SVA (Shared Virtual Addressing)

2020-06-15 Thread Fenghua Yu
Hi, Baolu, On Sat, Jun 13, 2020 at 08:17:40PM +0800, Lu Baolu wrote: > Hi Fenghua, > > On 2020/6/13 8:41, Fenghua Yu wrote: > >+implement implement fairness or ensure forward progress can be made. > > Repeated "implement". Will fix this. > >+For example, the Intel Data Streaming Accelerator

Re: [PATCH 00/17] spelling.txt: /decriptors/descriptors/

2020-06-15 Thread Mark Brown
On Tue, 9 Jun 2020 13:45:53 +0100, Kieran Bingham wrote: > I wouldn't normally go through spelling fixes, but I caught sight of > this typo twice, and then foolishly grepped the tree for it, and saw how > pervasive it was. > > so here I am ... fixing a typo globally... but with an addition in >

Re: [PATCH v2] ASoC: fsl_ssi: Fix bclk calculation for mono channel

2020-06-15 Thread Shengjiu Wang
On Tue, Jun 16, 2020 at 7:11 AM Nicolin Chen wrote: > > On Mon, Jun 15, 2020 at 01:56:18PM +0800, Shengjiu Wang wrote: > > For mono channel, SSI will switch to Normal mode. > > > > In Normal mode and Network mode, the Word Length Control bits > > control the word length divider in clock

[PATCH v4 2/3] mm, treewide: Rename kzfree() to kfree_sensitive()

2020-06-15 Thread Waiman Long
As said by Linus: A symmetric naming is only helpful if it implies symmetries in use. Otherwise it's actively misleading. In "kzalloc()", the z is meaningful and an important part of what the caller wants. In "kzfree()", the z is actively detrimental, because maybe in the future we

Re: [PATCH 06/10] mtd: rawnand: fsl_upm: Use gpio descriptors

2020-06-15 Thread Miquel Raynal
On Wed, 2020-06-03 at 13:49:18 UTC, Boris Brezillon wrote: > The integer-based GPIO ids are now deprecated in favor of the GPIO desc > API. The PPC platforms have already been converted to GPIOLIB, so let's > use gpio descs in the NAND driver too. > > While at it, we use

Re: [PATCH 01/10] mtd: rawnand: fsl_upm: Remove unused mtd var

2020-06-15 Thread Miquel Raynal
On Wed, 2020-06-03 at 13:49:13 UTC, Boris Brezillon wrote: > The mtd var in fun_wait_rnb() is now unused, let's get rid of it and > fix the warning resulting from this unused var. > > Fixes: 50a487e7719c ("mtd: rawnand: Pass a nand_chip object to > chip->dev_ready()") > Signed-off-by: Boris

[PATCH 0/8 v2] PCI: Align return values of PCIe capability and PCI accessors

2020-06-15 Thread refactormyself
From: Bolarinwa Olayemi Saheed PATCH 1/8 to 7/8: PCIBIOS_ error codes have positive values and they are passed down the call heirarchy from accessors. For functions which are meant to return only a negative value on failure, passing on this value is a bug. To mitigate this, call

[PATCH 18/29] docs: powerpc: fix some issues at vas-api.rst

2020-06-15 Thread Mauro Carvalho Chehab
There are a few issues on this document, when built via the building with ``make htmldocs``: Documentation/powerpc/vas-api.rst:116: WARNING: Unexpected indentation. Documentation/powerpc/vas-api.rst:116: WARNING: Inline emphasis start-string without end-string.

Re: [PATCH v2 12/12] x86/traps: Fix up invalid PASID

2020-06-15 Thread Peter Zijlstra
On Fri, Jun 12, 2020 at 05:41:33PM -0700, Fenghua Yu wrote: > @@ -447,6 +458,18 @@ dotraplinkage void do_general_protection(struct pt_regs > *regs, long error_code) > int ret; > > RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); > + > + /* > + * Perform

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