[PATCH 5/7] PCI: Add pci_find_dvsec_capability to find designated VSEC

Signed-off-by: Ben Widawsky --- drivers/pci/pci.c | 32 include/linux/pci.h | 1 + 2 files changed, 33 insertions(+) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index ce2ab62b64cf..94ac86ff28b0 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c

[PATCH 7/7] ocxl: Use pci core's DVSEC functionality

Reduce maintenance burden of DVSEC query implementation by using the centralized PCI core implementation. Cc: linuxppc-dev@lists.ozlabs.org Cc: Frederic Barrat Cc: Andrew Donnellan Signed-off-by: Ben Widawsky --- drivers/misc/ocxl/config.c | 13 + 1 file changed, 1 insertion

[PATCH v2 0/9] cxl_pci refactor for reusability

@intel.com/ [3]: https://lore.kernel.org/linux-cxl/20210921220459.2437386-1-ben.widaw...@intel.com/ Ben Widawsky (9): cxl: Convert "RBI" to enum cxl/pci: Remove dev_dbg for unknown register blocks cxl/pci: Remove pci request/release regions cxl/pci: Refactor cxl_pci_setup_regs

[PATCH v2 1/9] cxl: Convert "RBI" to enum

, it could become a problem if checking for invalid identifiers since the code currently checks for the max identifier. This is not an issue with current spec, and the algorithm to obtain the register blocks will change before those possible additions are made. Signed-off-by: Ben Widawsky

[PATCH v2 4/9] cxl/pci: Refactor cxl_pci_setup_regs

cator DVSEC structure" it was how the driver would respond to the spec violation. The new logic will take the first found register block by type and move on. Signed-off-by: Ben Widawsky --- Changes since v1: --- drivers/cxl/pci.c | 126 +---

[PATCH v2 2/9] cxl/pci: Remove dev_dbg for unknown register blocks

mapping. Signed-off-by: Ben Widawsky --- drivers/cxl/pci.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index 64180f46c895..ccc7c2573ddc 100644 --- a/drivers/cxl/pci.c +++ b/drivers/cxl/pci.c @@ -475,9 +475,6 @@ static int cxl_pci_setup_regs(struct cxl_mem

[PATCH v2 3/9] cxl/pci: Remove pci request/release regions

more precision in the request." Recommended-by: Dan Williams Signed-off-by: Ben Widawsky --- drivers/cxl/pci.c | 5 - 1 file changed, 5 deletions(-) diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index ccc7c2573ddc..7256c236fdb3 100644 --- a/drivers/cxl/pci.c +++ b/drivers

[PATCH v2 9/9] iommu/vt-d: Use pci core's DVSEC functionality

Reduce maintenance burden of DVSEC query implementation by using the centralized PCI core implementation. Cc: io...@lists.linux-foundation.org Cc: David Woodhouse Cc: Lu Baolu Signed-off-by: Ben Widawsky --- drivers/iommu/intel/iommu.c | 15 +-- 1 file changed, 1 insertion(+), 14

[PATCH v2 6/9] PCI: Add pci_find_dvsec_capability to find designated VSEC

-by: Frederic Barrat Signed-off-by: Ben Widawsky --- drivers/pci/pci.c | 32 include/linux/pci.h | 1 + 2 files changed, 33 insertions(+) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index ce2ab62b64cf..94ac86ff28b0 100644 --- a/drivers/pci/pci.c +++ b

[PATCH v2 5/9] cxl/pci: Make more use of cxl_register_map

The structure exists to pass around information about register mapping. Using it more extensively cleans up many existing functions. Signed-off-by: Ben Widawsky --- drivers/cxl/cxl.h | 1 + drivers/cxl/pci.c | 36 +--- 2 files changed, 18 insertions(+), 19

[PATCH v2 8/9] ocxl: Use pci core's DVSEC functionality

trivial it is reserved for later. Cc: linuxppc-dev@lists.ozlabs.org Cc: Andrew Donnellan Acked-by: Frederic Barrat (v1) Signed-off-by: Ben Widawsky --- arch/powerpc/platforms/powernv/ocxl.c | 3 ++- drivers/misc/ocxl/config.c| 13 + 2 files changed, 3 insertions(+), 13

[PATCH v2 7/9] cxl/pci: Use pci core's DVSEC functionality

Reduce maintenance burden of DVSEC query implementation by using the centralized PCI core implementation. Signed-off-by: Ben Widawsky --- drivers/cxl/pci.c | 20 +--- 1 file changed, 1 insertion(+), 19 deletions(-) diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c index