Re: [PATCH] Adding PCI-E support for 460SX based redwood board.
On Mon, Nov 30, 2009 at 02:58:23PM -0800, tma...@amcc.com wrote:
+ PCIE0: pc...@d {
+ device_type = pci;
+ #interrupt-cells = 1;
+ #size-cells = 2;
+ #address-cells = 3;
+ compatible = ibm,plb-pciex-460sx,
ibm,plb-pciex;
+ primary;
+ port = 0x0; /* port number */
+ reg = 0x000d 0x 0x2000 /*
Config space access */
+ 0x000c 0x1000 0x1000;
/* Registers */
+ dcr-reg = 0x100 0x020;
+ sdr-base = 0x300;
+
+ /* Outbound ranges, one memory and one IO,
+ * later cannot be changed
+ */
+ ranges = 0x0200 0x 0x8000
0x000e 0x 0x 0x8000
+0x0100 0x 0x
0x000f 0x8000 0x 0x0001;
+
DTC complains about this:
jwbo...@zod:~/src/linux-2.6 make ARCH=powerpc CROSS_COMPILE=ppcnf-unknown- -j2
redwood.dtb
/home/jwboyer/src/linux-2.6/scripts/dtc/dtc -O dtb -o
arch/powerpc/boot/redwood.dtb -b 0 -p 1024
/home/jwboyer/src/linux-2.6/arch/powerpc/boot/dts/redwood.dts
DTC: dts-dtb on file
/home/jwboyer/src/linux-2.6/arch/powerpc/boot/dts/redwood.dts
Warning (ranges_format): ranges property in /plb/opb/pc...@d has
invalid length (56 bytes) (parent #address-cells == 1, child #address-cells ==
3, #size-cells == 2)
Warning (ranges_format): ranges property in /plb/opb/pc...@d2000 has
invalid length (56 bytes) (parent #address-cells == 1, child #address-cells ==
3, #size-cells == 2)
Warning (ranges_format): ranges property in /plb/opb/pc...@d4000 has
invalid length (56 bytes) (parent #address-cells == 1, child #address-cells ==
3, #size-cells == 2)
jwbo...@zod:~/src/linux-2.6
My guess is that you meant to have this under the PLB bus node, and not the OPB
bus?
josh
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RE: [PATCH] Adding PCI-E support for 460SX based redwood board.
Testing and other information for this patch.
1. Kernel version: 2.6.32-rc6
2. Board: AMCC redwood validation board.
3. tests
a. Configured redwood boards PCI-E ports as root ports. And plugged
in 2 HBA sas cards with 8 drives each. XDD and IO
meter tests were ran. No issues found.
b. Configured redwood board PCI-E port as Endpoint and configured
second board as root complex. Boards were interconnected using PCI-E
cable. Then did lspci on root complex configured redwood board to see if
the endpoint can be scanned. Also using BDI I was able to do read and
writes to from root complex as well as endpoint.
Regards,
Marri
-Original Message-
From: tm...@amcc.com [mailto:tm...@amcc.com]
Sent: Monday, November 30, 2009 1:16 PM
To: b...@kernel.crashing.org
Cc: linuxppc-...@ozlabs.org; Tirumala Reddy Marri
Subject: [PATCH] Adding PCI-E support for 460SX based redwood board.
From: Tirumala Marri tma...@amcc.com
This patch would add PCI-E support for AMCC 460SX processor based
redwood board.
Signed-off-by: Tirumala Marri tma...@amcc.com
---
arch/powerpc/boot/dts/redwood.dts | 122
+
arch/powerpc/sysdev/ppc4xx_pci.c | 119
arch/powerpc/sysdev/ppc4xx_pci.h | 58 +
3 files changed, 299 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/redwood.dts
b/arch/powerpc/boot/dts/redwood.dts
index ad402c4..9eeec28 100644
--- a/arch/powerpc/boot/dts/redwood.dts
+++ b/arch/powerpc/boot/dts/redwood.dts
@@ -233,6 +233,128 @@
has-inverted-stacr-oc;
has-new-stacr-staopc;
};
+ PCIE0: pc...@d {
+ device_type = pci;
+ #interrupt-cells = 1;
+ #size-cells = 2;
+ #address-cells = 3;
+ compatible = ibm,plb-pciex-460sx,
ibm,plb-pciex;
+ primary;
+ port = 0x0; /* port number */
+ reg = 0x000d 0x 0x2000
/* Config space access */
+ 0x000c 0x1000
0x1000;/* Registers */
+ dcr-reg = 0x100 0x020;
+ sdr-base = 0x300;
+
+ /* Outbound ranges, one memory and one
IO,
+* later cannot be changed
+*/
+ ranges = 0x0200 0x
0x8000 0x000e 0x 0x 0x8000
+ 0x0100 0x
0x 0x000f 0x8000 0x 0x0001;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = 0x4200 0x0 0x0 0x0 0x0
0x0 0x8000;
+
+ /* This drives busses 10 to 0x1f */
+ bus-range = 0x10 0x1f;
+
+ /* Legacy interrupts (note the weird
polarity, the bridge seems
+* to invert PCIe legacy interrupts).
+* We are de-swizzling here because the
numbers are actually for
+* port of the root complex virtual P2P
bridge. But I want
+* to avoid putting a node for it in the
tree, so the numbers
+* below are basically de-swizzled
numbers.
+* The real slot is on idsel 0, so the
swizzling is 1:1
+*/
+ interrupt-map-mask = 0x0 0x0 0x0 0x7;
+ interrupt-map =
+ 0x0 0x0 0x0 0x1 UIC3 0x0 0x4 /*
swizzled int A */
+ 0x0 0x0 0x0 0x2 UIC3 0x1 0x4 /*
swizzled int B */
+ 0x0 0x0 0x0 0x3 UIC3 0x2 0x4 /*
swizzled int C */
+ 0x0 0x0 0x0 0x4 UIC3 0x3 0x4 /*
swizzled int D */;
+ };
+
+ PCIE1: pc...@d2000 {
+ device_type = pci;
+ #interrupt-cells = 1;
+ #size-cells = 2;
+ #address-cells = 3;
+ compatible = ibm,plb-pciex-460sx,
ibm,plb-pciex;
+ primary;
+ port = 0x1; /* port number */
+ reg = 0x000d 0x2000 0x2000
/* Config space access */
+ 0x000c 0x10001000
0x1000;/* Registers */
+ dcr-reg = 0x120 0x020
RE: [PATCH] Adding PCI-E support for 460SX based redwood board.
Hi Ben,
Could you please review the patch I sent .
Thanks,
Marri
-Original Message-
From: tma...@amcc.com [mailto:tma...@amcc.com]
Sent: Wednesday, November 25, 2009 3:49 PM
To: linuxppc-...@ozlabs.org
Cc: tma...@macc.com; Tirumala Reddy Marri
Subject: [PATCH] Adding PCI-E support for 460SX based redwood board.
From: Tirumala Marri tma...@amcc.com
This patch would add PCI-E support for AMCC 460SX processor based
redwood board.
Signed-off-by: Tirumala Marri tma...@amcc.com
---
arch/powerpc/boot/dts/redwood.dts | 122
+
arch/powerpc/sysdev/ppc4xx_pci.c | 119
arch/powerpc/sysdev/ppc4xx_pci.h | 58 +
3 files changed, 299 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/redwood.dts
b/arch/powerpc/boot/dts/redwood.dts
index ad402c4..9eeec28 100644
--- a/arch/powerpc/boot/dts/redwood.dts
+++ b/arch/powerpc/boot/dts/redwood.dts
@@ -233,6 +233,128 @@
has-inverted-stacr-oc;
has-new-stacr-staopc;
};
+ PCIE0: pc...@d {
+ device_type = pci;
+ #interrupt-cells = 1;
+ #size-cells = 2;
+ #address-cells = 3;
+ compatible = ibm,plb-pciex-460sx,
ibm,plb-pciex;
+ primary;
+ port = 0x0; /* port number */
+ reg = 0x000d 0x 0x2000
/* Config space access */
+ 0x000c 0x1000
0x1000;/* Registers */
+ dcr-reg = 0x100 0x020;
+ sdr-base = 0x300;
+
+ /* Outbound ranges, one memory and one
IO,
+* later cannot be changed
+*/
+ ranges = 0x0200 0x
0x8000 0x000e 0x 0x 0x8000
+ 0x0100 0x
0x 0x000f 0x8000 0x 0x0001;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = 0x4200 0x0 0x0 0x0 0x0
0x0 0x8000;
+
+ /* This drives busses 10 to 0x1f */
+ bus-range = 0x10 0x1f;
+
+ /* Legacy interrupts (note the weird
polarity, the bridge seems
+* to invert PCIe legacy interrupts).
+* We are de-swizzling here because the
numbers are actually for
+* port of the root complex virtual P2P
bridge. But I want
+* to avoid putting a node for it in the
tree, so the numbers
+* below are basically de-swizzled
numbers.
+* The real slot is on idsel 0, so the
swizzling is 1:1
+*/
+ interrupt-map-mask = 0x0 0x0 0x0 0x7;
+ interrupt-map =
+ 0x0 0x0 0x0 0x1 UIC3 0x0 0x4 /*
swizzled int A */
+ 0x0 0x0 0x0 0x2 UIC3 0x1 0x4 /*
swizzled int B */
+ 0x0 0x0 0x0 0x3 UIC3 0x2 0x4 /*
swizzled int C */
+ 0x0 0x0 0x0 0x4 UIC3 0x3 0x4 /*
swizzled int D */;
+ };
+
+ PCIE1: pc...@d2000 {
+ device_type = pci;
+ #interrupt-cells = 1;
+ #size-cells = 2;
+ #address-cells = 3;
+ compatible = ibm,plb-pciex-460sx,
ibm,plb-pciex;
+ primary;
+ port = 0x1; /* port number */
+ reg = 0x000d 0x2000 0x2000
/* Config space access */
+ 0x000c 0x10001000
0x1000;/* Registers */
+ dcr-reg = 0x120 0x020;
+ sdr-base = 0x340;
+
+ /* Outbound ranges, one memory and one
IO,
+* later cannot be changed
+*/
+ ranges = 0x0200 0x
0x8000 0x000e 0x8000 0x 0x8000
+ 0x0100 0x
0x 0x000f 0x8001 0x 0x0001;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = 0x4200 0x0 0x0 0x0 0x0
0x0
RE: [PATCH] Adding PCI-E support for 460SX based redwood board.
On Mon, 2009-11-30 at 10:52 -0800, Tirumala Reddy Marri wrote:
Hi Ben,
Could you please review the patch I sent .
Thanks,
Marri
Hi !
The original message never made it. This one did but the patch is line
wrapped. Please fix your mailer and re-send.
Cheers,
Ben.
-Original Message-
From: tma...@amcc.com [mailto:tma...@amcc.com]
Sent: Wednesday, November 25, 2009 3:49 PM
To: linuxppc-...@ozlabs.org
Cc: tma...@macc.com; Tirumala Reddy Marri
Subject: [PATCH] Adding PCI-E support for 460SX based redwood board.
From: Tirumala Marri tma...@amcc.com
This patch would add PCI-E support for AMCC 460SX processor based
redwood board.
Signed-off-by: Tirumala Marri tma...@amcc.com
---
arch/powerpc/boot/dts/redwood.dts | 122
+
arch/powerpc/sysdev/ppc4xx_pci.c | 119
arch/powerpc/sysdev/ppc4xx_pci.h | 58 +
3 files changed, 299 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/redwood.dts
b/arch/powerpc/boot/dts/redwood.dts
index ad402c4..9eeec28 100644
--- a/arch/powerpc/boot/dts/redwood.dts
+++ b/arch/powerpc/boot/dts/redwood.dts
@@ -233,6 +233,128 @@
has-inverted-stacr-oc;
has-new-stacr-staopc;
};
+ PCIE0: pc...@d {
+ device_type = pci;
+ #interrupt-cells = 1;
+ #size-cells = 2;
+ #address-cells = 3;
+ compatible = ibm,plb-pciex-460sx,
ibm,plb-pciex;
+ primary;
+ port = 0x0; /* port number */
+ reg = 0x000d 0x 0x2000
/* Config space access */
+0x000c 0x1000
0x1000; /* Registers */
+ dcr-reg = 0x100 0x020;
+ sdr-base = 0x300;
+
+ /* Outbound ranges, one memory and one
IO,
+ * later cannot be changed
+ */
+ ranges = 0x0200 0x
0x8000 0x000e 0x 0x 0x8000
+ 0x0100 0x
0x 0x000f 0x8000 0x 0x0001;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = 0x4200 0x0 0x0 0x0 0x0
0x0 0x8000;
+
+ /* This drives busses 10 to 0x1f */
+ bus-range = 0x10 0x1f;
+
+ /* Legacy interrupts (note the weird
polarity, the bridge seems
+ * to invert PCIe legacy interrupts).
+ * We are de-swizzling here because the
numbers are actually for
+ * port of the root complex virtual P2P
bridge. But I want
+ * to avoid putting a node for it in the
tree, so the numbers
+ * below are basically de-swizzled
numbers.
+ * The real slot is on idsel 0, so the
swizzling is 1:1
+ */
+ interrupt-map-mask = 0x0 0x0 0x0 0x7;
+ interrupt-map =
+ 0x0 0x0 0x0 0x1 UIC3 0x0 0x4 /*
swizzled int A */
+ 0x0 0x0 0x0 0x2 UIC3 0x1 0x4 /*
swizzled int B */
+ 0x0 0x0 0x0 0x3 UIC3 0x2 0x4 /*
swizzled int C */
+ 0x0 0x0 0x0 0x4 UIC3 0x3 0x4 /*
swizzled int D */;
+ };
+
+ PCIE1: pc...@d2000 {
+ device_type = pci;
+ #interrupt-cells = 1;
+ #size-cells = 2;
+ #address-cells = 3;
+ compatible = ibm,plb-pciex-460sx,
ibm,plb-pciex;
+ primary;
+ port = 0x1; /* port number */
+ reg = 0x000d 0x2000 0x2000
/* Config space access */
+0x000c 0x10001000
0x1000; /* Registers */
+ dcr-reg = 0x120 0x020;
+ sdr-base = 0x340;
+
+ /* Outbound ranges, one memory and one
IO,
+ * later cannot be changed
+ */
+ ranges = 0x0200 0x
0x8000 0x000e 0x8000 0x 0x8000
+ 0x0100 0x
[PATCH] Adding PCI-E support for 460SX based redwood board.
From: Tirumala Marri tma...@amcc.com
This patch would add PCI-E support for AMCC 460SX processor based
redwood board.
Signed-off-by: Tirumala Marri tma...@amcc.com
---
arch/powerpc/boot/dts/redwood.dts | 122 +
arch/powerpc/sysdev/ppc4xx_pci.c | 119
arch/powerpc/sysdev/ppc4xx_pci.h | 58 +
3 files changed, 299 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/redwood.dts
b/arch/powerpc/boot/dts/redwood.dts
index ad402c4..9eeec28 100644
--- a/arch/powerpc/boot/dts/redwood.dts
+++ b/arch/powerpc/boot/dts/redwood.dts
@@ -233,6 +233,128 @@
has-inverted-stacr-oc;
has-new-stacr-staopc;
};
+ PCIE0: pc...@d {
+ device_type = pci;
+ #interrupt-cells = 1;
+ #size-cells = 2;
+ #address-cells = 3;
+ compatible = ibm,plb-pciex-460sx,
ibm,plb-pciex;
+ primary;
+ port = 0x0; /* port number */
+ reg = 0x000d 0x 0x2000 /*
Config space access */
+ 0x000c 0x1000 0x1000;
/* Registers */
+ dcr-reg = 0x100 0x020;
+ sdr-base = 0x300;
+
+ /* Outbound ranges, one memory and one IO,
+* later cannot be changed
+*/
+ ranges = 0x0200 0x 0x8000
0x000e 0x 0x 0x8000
+ 0x0100 0x 0x
0x000f 0x8000 0x 0x0001;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = 0x4200 0x0 0x0 0x0 0x0 0x0
0x8000;
+
+ /* This drives busses 10 to 0x1f */
+ bus-range = 0x10 0x1f;
+
+ /* Legacy interrupts (note the weird polarity,
the bridge seems
+* to invert PCIe legacy interrupts).
+* We are de-swizzling here because the numbers
are actually for
+* port of the root complex virtual P2P bridge.
But I want
+* to avoid putting a node for it in the tree,
so the numbers
+* below are basically de-swizzled numbers.
+* The real slot is on idsel 0, so the
swizzling is 1:1
+*/
+ interrupt-map-mask = 0x0 0x0 0x0 0x7;
+ interrupt-map =
+ 0x0 0x0 0x0 0x1 UIC3 0x0 0x4 /*
swizzled int A */
+ 0x0 0x0 0x0 0x2 UIC3 0x1 0x4 /*
swizzled int B */
+ 0x0 0x0 0x0 0x3 UIC3 0x2 0x4 /*
swizzled int C */
+ 0x0 0x0 0x0 0x4 UIC3 0x3 0x4 /*
swizzled int D */;
+ };
+
+ PCIE1: pc...@d2000 {
+ device_type = pci;
+ #interrupt-cells = 1;
+ #size-cells = 2;
+ #address-cells = 3;
+ compatible = ibm,plb-pciex-460sx,
ibm,plb-pciex;
+ primary;
+ port = 0x1; /* port number */
+ reg = 0x000d 0x2000 0x2000 /*
Config space access */
+ 0x000c 0x10001000 0x1000;
/* Registers */
+ dcr-reg = 0x120 0x020;
+ sdr-base = 0x340;
+
+ /* Outbound ranges, one memory and one IO,
+* later cannot be changed
+*/
+ ranges = 0x0200 0x 0x8000
0x000e 0x8000 0x 0x8000
+ 0x0100 0x 0x
0x000f 0x8001 0x 0x0001;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = 0x4200 0x0 0x0 0x0 0x0 0x0
0x8000;
+
+ /* This drives busses 10 to 0x1f */
+ bus-range = 0x20 0x2f;
+
+ /* Legacy interrupts (note the weird polarity,
the bridge seems
+* to invert PCIe legacy
