Support for the C2K cPCI Single Board Computer from GEFanuc
(PowerPC MPC7448 with a Marvell MV64460 chipset)
All features of the board are not supported yet, but the board
boots, flash works, all Ethernet ports are working and PCI
devices are all found (USB and SATA on PCI1 do not work yet).
Part 1 of 5: DTS file describing the board peripherals. As far as I know
all peripherals except the FPGA are listed in there (I did not included
the FPGA because a lot of work is needed there).
Signed-off-by: Remi Machet <[EMAIL PROTECTED]>
---
Changes:
v1: original patch
v2: cleaned up the file: removed i2c device_type, changed the name of
the cpu node and added aliases for the pci buses.
v3: removed the mdio entry because the PHY are handled by the Ethernet
driver on this board. Re-prganized the device controller entry to look
similar to other boards static buses (thanks to David Gibson for pointing
that out).
v4: reverted v3 changes because it was putting 2 reg attributes with the same
value in the ethernet-group group. Instead added a reg property to mdio.
c2k.dts | 371 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 371 insertions(+)
diff --git a/arch/powerpc/boot/dts/c2k.dts b/arch/powerpc/boot/dts/c2k.dts
new file mode 100644
index 0000000..607686c
--- /dev/null
+++ b/arch/powerpc/boot/dts/c2k.dts
@@ -0,0 +1,371 @@
+/* Device Tree Source for GEFanuc C2K
+ *
+ * Author: Remi Machet <[EMAIL PROTECTED]>
+ *
+ * Originated from prpmc2800.dts
+ *
+ * 2008 (c) Stanford University
+ * 2007 (c) MontaVista, Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "C2K";
+ compatible = "GEFanuc,C2K";
+ coherency-off;
+
+ aliases {
+ pci0 = &PCI0;
+ pci1 = &PCI1;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ [EMAIL PROTECTED] {
+ device_type = "cpu";
+ compatible = "PowerPC,7447";
+ reg = <0>;
+ clock-frequency = <996000000>; /* 996 MHz */
+ bus-frequency = <166666667>; /* 166.6666 MHz */
+ timebase-frequency = <41666667>; /* 166.6666/4
MHz */
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x40000000>; /* 1GB */
+ };
+
+ [EMAIL PROTECTED] { /* Marvell Discovery */
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "mv64460";
+ compatible = "marvell,mv64360";
+ clock-frequency = <166666667>; /* 166.66... MHz */
+ reg = <0xd8000000 0x00010000>;
+ virtual-reg = <0xd8000000>;
+ ranges = <0xd4000000 0xd4000000 0x01000000 /* PCI 0 I/O
Space */
+ 0x80000000 0x80000000 0x08000000 /* PCI 0 MEM
Space */
+ 0xd0000000 0xd0000000 0x01000000 /* PCI 1 I/O
Space */
+ 0xa0000000 0xa0000000 0x08000000 /* PCI 1 MEM
Space */
+ 0xd8100000 0xd8100000 0x00010000 /* FPGA */
+ 0xd8110000 0xd8110000 0x00010000 /* FPGA USARTs
*/
+ 0xf8000000 0xf8000000 0x08000000 /* User FLASH */
+ 0x00000000 0xd8000000 0x00010000 /* Bridge's
regs */
+ 0xd8140000 0xd8140000 0x00040000>; /* Integrated
SRAM */
+
+ [EMAIL PROTECTED] {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,mv64360-mdio";
+ reg = <0x2000 4>;
+ PHY0: [EMAIL PROTECTED] {
+ device_type = "ethernet-phy";
+ interrupts = <76>; /* GPP 12 */
+ interrupt-parent = <&PIC>;
+ reg = <0>;
+ };
+ PHY1: [EMAIL PROTECTED] {
+ device_type = "ethernet-phy";
+ interrupts = <76>; /* GPP 12 */
+ interrupt-parent = <&PIC>;
+ reg = <1>;
+ };
+ PHY2: [EMAIL PROTECTED] {
+ device_type = "ethernet-phy";
+ interrupts = <76>; /* GPP 12 */
+ interrupt-parent = <&PIC>;
+ reg = <2>;
+ };
+ };
+
+ [EMAIL PROTECTED] {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,mv64360-eth-group";
+ reg = <0x2000 0x2000>;
+ [EMAIL PROTECTED] {
+ device_type = "network";
+ compatible = "marvell,mv64360-eth";
+ reg = <0>;
+ interrupts = <32>;
+ interrupt-parent = <&PIC>;
+ phy = <&PHY0>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ };
+ [EMAIL PROTECTED] {
+ device_type = "network";
+ compatible = "marvell,mv64360-eth";
+ reg = <1>;
+ interrupts = <33>;
+ interrupt-parent = <&PIC>;
+ phy = <&PHY1>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ };
+ [EMAIL PROTECTED] {
+ device_type = "network";
+ compatible = "marvell,mv64360-eth";
+ reg = <2>;
+ interrupts = <34>;
+ interrupt-parent = <&PIC>;
+ phy = <&PHY2>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ };
+ };
+
+ SDMA0: [EMAIL PROTECTED] {
+ compatible = "marvell,mv64360-sdma";
+ reg = <0x4000 0xc18>;
+ virtual-reg = <0xd8004000>;
+ interrupt-base = <0>;
+ interrupts = <36>;
+ interrupt-parent = <&PIC>;
+ };
+
+ SDMA1: [EMAIL PROTECTED] {
+ compatible = "marvell,mv64360-sdma";
+ reg = <0x6000 0xc18>;
+ virtual-reg = <0xd8006000>;
+ interrupt-base = <0>;
+ interrupts = <38>;
+ interrupt-parent = <&PIC>;
+ };
+
+ BRG0: [EMAIL PROTECTED] {
+ compatible = "marvell,mv64360-brg";
+ reg = <0xb200 0x8>;
+ clock-src = <8>;
+ clock-frequency = <133333333>;
+ current-speed = <115200>;
+ };
+
+ BRG1: [EMAIL PROTECTED] {
+ compatible = "marvell,mv64360-brg";
+ reg = <0xb208 0x8>;
+ clock-src = <8>;
+ clock-frequency = <133333333>;
+ current-speed = <115200>;
+ };
+
+ CUNIT: [EMAIL PROTECTED] {
+ reg = <0xf200 0x200>;
+ };
+
+ MPSCROUTING: [EMAIL PROTECTED] {
+ reg = <0xb400 0xc>;
+ };
+
+ MPSCINTR: [EMAIL PROTECTED] {
+ reg = <0xb800 0x100>;
+ virtual-reg = <0xd800b800>;
+ };
+
+ MPSC0: [EMAIL PROTECTED] {
+ device_type = "serial";
+ compatible = "marvell,mv64360-mpsc";
+ reg = <0x8000 0x38>;
+ virtual-reg = <0xd8008000>;
+ sdma = <&SDMA0>;
+ brg = <&BRG0>;
+ cunit = <&CUNIT>;
+ mpscrouting = <&MPSCROUTING>;
+ mpscintr = <&MPSCINTR>;
+ cell-index = <0>;
+ interrupts = <40>;
+ interrupt-parent = <&PIC>;
+ };
+
+ MPSC1: [EMAIL PROTECTED] {
+ device_type = "serial";
+ compatible = "marvell,mv64360-mpsc";
+ reg = <0x9000 0x38>;
+ virtual-reg = <0xd8009000>;
+ sdma = <&SDMA1>;
+ brg = <&BRG1>;
+ cunit = <&CUNIT>;
+ mpscrouting = <&MPSCROUTING>;
+ mpscintr = <&MPSCINTR>;
+ cell-index = <1>;
+ interrupts = <42>;
+ interrupt-parent = <&PIC>;
+ };
+
+ [EMAIL PROTECTED] { /* watchdog timer */
+ compatible = "marvell,mv64360-wdt";
+ reg = <0xb410 0x8>;
+ };
+
+ [EMAIL PROTECTED] {
+ compatible = "marvell,mv64360-i2c";
+ reg = <0xc000 0x20>;
+ virtual-reg = <0xd800c000>;
+ interrupts = <37>;
+ interrupt-parent = <&PIC>;
+ };
+
+ PIC: pic {
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ compatible = "marvell,mv64360-pic";
+ reg = <0x0000 0x88>;
+ interrupt-controller;
+ };
+
+ [EMAIL PROTECTED] {
+ compatible = "marvell,mv64360-mpp";
+ reg = <0xf000 0x10>;
+ };
+
+ [EMAIL PROTECTED] {
+ compatible = "marvell,mv64360-gpp";
+ reg = <0xf100 0x20>;
+ };
+
+ PCI0: [EMAIL PROTECTED] {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ device_type = "pci";
+ compatible = "marvell,mv64360-pci";
+ reg = <0x0cf8 0x8>;
+ ranges = <0x01000000 0x0 0x00000000 0xd4000000 0x0
0x01000000
+ 0x02000000 0x0 0x80000000 0x80000000 0x0
0x08000000>;
+ bus-range = <0 255>;
+ clock-frequency = <66000000>;
+ interrupt-pci-iack = <0x0c34>;
+ interrupt-parent = <&PIC>;
+ interrupt-map-mask = <0x0000 0x0 0x0 0x7>;
+ interrupt-map = <
+ /* Only one interrupt line for PMC0 slot (INTA)
*/
+ 0x0000 0 0 1 &PIC 88
+ >;
+ };
+
+
+ PCI1: [EMAIL PROTECTED] {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ device_type = "pci";
+ compatible = "marvell,mv64360-pci";
+ reg = <0x0c78 0x8>;
+ ranges = <0x01000000 0x0 0x00000000 0xd0000000 0x0
0x01000000
+ 0x02000000 0x0 0x80000000 0xa0000000 0x0
0x08000000>;
+ bus-range = <0 255>;
+ clock-frequency = <66000000>;
+ interrupt-pci-iack = <0x0cb4>;
+ interrupt-parent = <&PIC>;
+ interrupt-map-mask = <0xf800 0x00 0x00 0x7>;
+ interrupt-map = <
+ /* IDSEL 0x01: PMC1 ? */
+ 0x0800 0 0 1 &PIC 88
+ /* IDSEL 0x02: cPCI bridge */
+ 0x1000 0 0 1 &PIC 88
+ /* IDSEL 0x03: USB controller */
+ 0x1800 0 0 1 &PIC 91
+ /* IDSEL 0x04: SATA controller */
+ 0x2000 0 0 1 &PIC 95
+ >;
+ };
+
+ [EMAIL PROTECTED] {
+ compatible = "marvell,mv64360-cpu-error";
+ reg = <0x0070 0x10 0x0128 0x28>;
+ interrupts = <3>;
+ interrupt-parent = <&PIC>;
+ };
+
+ [EMAIL PROTECTED] {
+ compatible = "marvell,mv64360-sram-ctrl";
+ reg = <0x0380 0x80>;
+ interrupts = <13>;
+ interrupt-parent = <&PIC>;
+ };
+
+ [EMAIL PROTECTED] {
+ compatible = "marvell,mv64360-pci-error";
+ reg = <0x1d40 0x40 0x0c28 0x4>;
+ interrupts = <12>;
+ interrupt-parent = <&PIC>;
+ };
+
+ [EMAIL PROTECTED] {
+ compatible = "marvell,mv64360-pci-error";
+ reg = <0x1dc0 0x40 0x0ca8 0x4>;
+ interrupts = <16>;
+ interrupt-parent = <&PIC>;
+ };
+
+ [EMAIL PROTECTED] {
+ compatible = "marvell,mv64360-mem-ctrl";
+ reg = <0x1400 0x60>;
+ interrupts = <17>;
+ interrupt-parent = <&PIC>;
+ };
+ /* Devices attached to the device controller */
+ [EMAIL PROTECTED] {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "marvell,mv64306-devctrl";
+ reg = <0x45C 0x88>;
+ interrupts = <1>;
+ interrupt-parent = <&PIC>;
+ ranges = <0 0 0xd8100000 0x10000
+ 2 0 0xd8110000 0x10000
+ 4 0 0xf8000000 0x8000000>;
+ [EMAIL PROTECTED],0 {
+ compatible = "sbs,fpga-c2k";
+ reg = <0 0 0x10000>;
+ };
+ [EMAIL PROTECTED],0 {
+ compatible = "sbs,fpga_usart-c2k";
+ reg = <2 0 0x10000>;
+ };
+ [EMAIL PROTECTED],0 {
+ compatible = "cfi-flash";
+ reg = <4 0 0x8000000>; /* 128MB */
+ bank-width = <4>;
+ device-width = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ [EMAIL PROTECTED] {
+ label = "boot";
+ reg = <0x00000000 0x00080000>;
+ };
+ [EMAIL PROTECTED] {
+ label = "kernel";
+ reg = <0x00080000 0x00400000>;
+ };
+ [EMAIL PROTECTED] {
+ label = "initrd";
+ reg = <0x00480000 0x00B80000>;
+ };
+ [EMAIL PROTECTED] {
+ label = "rootfs";
+ reg = <0x01000000 0x06800000>;
+ };
+ [EMAIL PROTECTED] {
+ label = "recovery";
+ reg = <0x07800000 0x00800000>;
+ read-only;
+ };
+ };
+ };
+ };
+ chosen {
+ linux,stdout-path = &MPSC0;
+ };
+};
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