Use the generic iommu bypass code instead of overriding set_dma_mask.

Signed-off-by: Christoph Hellwig <h...@lst.de>
---
 arch/powerpc/sysdev/dart_iommu.c | 47 ++++++++++++--------------------
 1 file changed, 17 insertions(+), 30 deletions(-)

diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c
index 283ce04c5844..d42ba645d51d 100644
--- a/arch/powerpc/sysdev/dart_iommu.c
+++ b/arch/powerpc/sysdev/dart_iommu.c
@@ -360,13 +360,6 @@ static void iommu_table_dart_setup(void)
        set_bit(iommu_table_dart.it_size - 1, iommu_table_dart.it_map);
 }
 
-static void pci_dma_dev_setup_dart(struct pci_dev *dev)
-{
-       if (dart_is_u4)
-               set_dma_offset(&dev->dev, DART_U4_BYPASS_BASE);
-       set_iommu_table_base(&dev->dev, &iommu_table_dart);
-}
-
 static void pci_dma_bus_setup_dart(struct pci_bus *bus)
 {
        if (!iommu_table_dart_inited) {
@@ -390,27 +383,18 @@ static bool dart_device_on_pcie(struct device *dev)
        return false;
 }
 
-static int dart_dma_set_mask(struct device *dev, u64 dma_mask)
+static void pci_dma_dev_setup_dart(struct pci_dev *dev)
 {
-       if (!dev->dma_mask || !dma_supported(dev, dma_mask))
-               return -EIO;
-
-       /* U4 supports a DART bypass, we use it for 64-bit capable
-        * devices to improve performances. However, that only works
-        * for devices connected to U4 own PCIe interface, not bridged
-        * through hypertransport. We need the device to support at
-        * least 40 bits of addresses.
-        */
-       if (dart_device_on_pcie(dev) && dma_mask >= DMA_BIT_MASK(40)) {
-               dev_info(dev, "Using 64-bit DMA iommu bypass\n");
-               set_dma_ops(dev, &dma_nommu_ops);
-       } else {
-               dev_info(dev, "Using 32-bit DMA via iommu\n");
-               set_dma_ops(dev, &dma_iommu_ops);
-       }
+       if (dart_is_u4 && dart_device_on_pcie(&dev->dev))
+               set_dma_offset(&dev->dev, DART_U4_BYPASS_BASE);
+       set_iommu_table_base(&dev->dev, &iommu_table_dart);
+}
 
-       *dev->dma_mask = dma_mask;
-       return 0;
+static bool iommu_bypass_supported_dart(struct pci_dev *dev, u64 mask)
+{
+       return dart_is_u4 &&
+               dart_device_on_pcie(&dev->dev) &&
+               mask >= DMA_BIT_MASK(40);
 }
 
 void __init iommu_init_early_dart(struct pci_controller_ops *controller_ops)
@@ -430,12 +414,15 @@ void __init iommu_init_early_dart(struct 
pci_controller_ops *controller_ops)
        if (dart_init(dn) != 0)
                return;
 
-       /* Setup bypass if supported */
-       if (dart_is_u4)
-               ppc_md.dma_set_mask = dart_dma_set_mask;
-
+       /*
+        * U4 supports a DART bypass, we use it for 64-bit capable devices to
+        * improve performance.  However, that only works for devices connected
+        * to the U4 own PCIe interface, not bridged through hypertransport.
+        * We need the device to support at least 40 bits of addresses.
+        */
        controller_ops->dma_dev_setup = pci_dma_dev_setup_dart;
        controller_ops->dma_bus_setup = pci_dma_bus_setup_dart;
+       controller_ops->iommu_bypass_supported = iommu_bypass_supported_dart;
 
        /* Setup pci_dma ops */
        set_pci_dma_ops(&dma_iommu_ops);
-- 
2.20.1

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