This number the pkey bit such that it is easy to follow. PKEY_BIT0 is
the lower order bit. This makes further changes easy to follow.

No functional change in this patch other than linux page table for
hash translation now maps pkeys differently.

Signed-off-by: Aneesh Kumar K.V <aneesh.ku...@linux.ibm.com>
---
 arch/powerpc/include/asm/book3s/64/hash-4k.h  |  9 +++----
 arch/powerpc/include/asm/book3s/64/hash-64k.h |  8 +++----
 arch/powerpc/include/asm/book3s/64/mmu-hash.h |  8 +++----
 arch/powerpc/include/asm/pkeys.h              | 24 +++++++++----------
 4 files changed, 25 insertions(+), 24 deletions(-)

diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h 
b/arch/powerpc/include/asm/book3s/64/hash-4k.h
index 3f9ae3585ab9..f889d56bf8cf 100644
--- a/arch/powerpc/include/asm/book3s/64/hash-4k.h
+++ b/arch/powerpc/include/asm/book3s/64/hash-4k.h
@@ -57,11 +57,12 @@
 #define H_PMD_FRAG_NR  (PAGE_SIZE >> H_PMD_FRAG_SIZE_SHIFT)
 
 /* memory key bits, only 8 keys supported */
-#define H_PTE_PKEY_BIT0        0
-#define H_PTE_PKEY_BIT1        0
+#define H_PTE_PKEY_BIT4        0
+#define H_PTE_PKEY_BIT3        0
 #define H_PTE_PKEY_BIT2        _RPAGE_RSV3
-#define H_PTE_PKEY_BIT3        _RPAGE_RSV4
-#define H_PTE_PKEY_BIT4        _RPAGE_RSV5
+#define H_PTE_PKEY_BIT1        _RPAGE_RSV4
+#define H_PTE_PKEY_BIT0        _RPAGE_RSV5
+
 
 /*
  * On all 4K setups, remap_4k_pfn() equates to remap_pfn_range()
diff --git a/arch/powerpc/include/asm/book3s/64/hash-64k.h 
b/arch/powerpc/include/asm/book3s/64/hash-64k.h
index 0729c034e56f..0a15fd14cf72 100644
--- a/arch/powerpc/include/asm/book3s/64/hash-64k.h
+++ b/arch/powerpc/include/asm/book3s/64/hash-64k.h
@@ -36,11 +36,11 @@
 #define H_PAGE_HASHPTE _RPAGE_RPN43    /* PTE has associated HPTE */
 
 /* memory key bits. */
-#define H_PTE_PKEY_BIT0        _RPAGE_RSV1
-#define H_PTE_PKEY_BIT1        _RPAGE_RSV2
+#define H_PTE_PKEY_BIT4        _RPAGE_RSV1
+#define H_PTE_PKEY_BIT3        _RPAGE_RSV2
 #define H_PTE_PKEY_BIT2        _RPAGE_RSV3
-#define H_PTE_PKEY_BIT3        _RPAGE_RSV4
-#define H_PTE_PKEY_BIT4        _RPAGE_RSV5
+#define H_PTE_PKEY_BIT1        _RPAGE_RSV4
+#define H_PTE_PKEY_BIT0        _RPAGE_RSV5
 
 /*
  * We need to differentiate between explicit huge page and THP huge
diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h 
b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
index 3fa1b962dc27..58fcc959f9d5 100644
--- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h
+++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
@@ -86,8 +86,8 @@
 #define HPTE_R_PP0             ASM_CONST(0x8000000000000000)
 #define HPTE_R_TS              ASM_CONST(0x4000000000000000)
 #define HPTE_R_KEY_HI          ASM_CONST(0x3000000000000000)
-#define HPTE_R_KEY_BIT0                ASM_CONST(0x2000000000000000)
-#define HPTE_R_KEY_BIT1                ASM_CONST(0x1000000000000000)
+#define HPTE_R_KEY_BIT4                ASM_CONST(0x2000000000000000)
+#define HPTE_R_KEY_BIT3                ASM_CONST(0x1000000000000000)
 #define HPTE_R_RPN_SHIFT       12
 #define HPTE_R_RPN             ASM_CONST(0x0ffffffffffff000)
 #define HPTE_R_RPN_3_0         ASM_CONST(0x01fffffffffff000)
@@ -103,8 +103,8 @@
 #define HPTE_R_R               ASM_CONST(0x0000000000000100)
 #define HPTE_R_KEY_LO          ASM_CONST(0x0000000000000e00)
 #define HPTE_R_KEY_BIT2                ASM_CONST(0x0000000000000800)
-#define HPTE_R_KEY_BIT3                ASM_CONST(0x0000000000000400)
-#define HPTE_R_KEY_BIT4                ASM_CONST(0x0000000000000200)
+#define HPTE_R_KEY_BIT1                ASM_CONST(0x0000000000000400)
+#define HPTE_R_KEY_BIT0                ASM_CONST(0x0000000000000200)
 #define HPTE_R_KEY             (HPTE_R_KEY_LO | HPTE_R_KEY_HI)
 
 #define HPTE_V_1TB_SEG         ASM_CONST(0x4000000000000000)
diff --git a/arch/powerpc/include/asm/pkeys.h b/arch/powerpc/include/asm/pkeys.h
index 20ebf153c871..f8f4d0793789 100644
--- a/arch/powerpc/include/asm/pkeys.h
+++ b/arch/powerpc/include/asm/pkeys.h
@@ -35,11 +35,11 @@ static inline u64 vmflag_to_pte_pkey_bits(u64 vm_flags)
        if (static_branch_likely(&pkey_disabled))
                return 0x0UL;
 
-       return (((vm_flags & VM_PKEY_BIT0) ? H_PTE_PKEY_BIT4 : 0x0UL) |
-               ((vm_flags & VM_PKEY_BIT1) ? H_PTE_PKEY_BIT3 : 0x0UL) |
+       return (((vm_flags & VM_PKEY_BIT0) ? H_PTE_PKEY_BIT0 : 0x0UL) |
+               ((vm_flags & VM_PKEY_BIT1) ? H_PTE_PKEY_BIT1 : 0x0UL) |
                ((vm_flags & VM_PKEY_BIT2) ? H_PTE_PKEY_BIT2 : 0x0UL) |
-               ((vm_flags & VM_PKEY_BIT3) ? H_PTE_PKEY_BIT1 : 0x0UL) |
-               ((vm_flags & VM_PKEY_BIT4) ? H_PTE_PKEY_BIT0 : 0x0UL));
+               ((vm_flags & VM_PKEY_BIT3) ? H_PTE_PKEY_BIT3 : 0x0UL) |
+               ((vm_flags & VM_PKEY_BIT4) ? H_PTE_PKEY_BIT4 : 0x0UL));
 }
 
 static inline int vma_pkey(struct vm_area_struct *vma)
@@ -53,20 +53,20 @@ static inline int vma_pkey(struct vm_area_struct *vma)
 
 static inline u64 pte_to_hpte_pkey_bits(u64 pteflags)
 {
-       return (((pteflags & H_PTE_PKEY_BIT0) ? HPTE_R_KEY_BIT0 : 0x0UL) |
-               ((pteflags & H_PTE_PKEY_BIT1) ? HPTE_R_KEY_BIT1 : 0x0UL) |
-               ((pteflags & H_PTE_PKEY_BIT2) ? HPTE_R_KEY_BIT2 : 0x0UL) |
+       return (((pteflags & H_PTE_PKEY_BIT4) ? HPTE_R_KEY_BIT4 : 0x0UL) |
                ((pteflags & H_PTE_PKEY_BIT3) ? HPTE_R_KEY_BIT3 : 0x0UL) |
-               ((pteflags & H_PTE_PKEY_BIT4) ? HPTE_R_KEY_BIT4 : 0x0UL));
+               ((pteflags & H_PTE_PKEY_BIT2) ? HPTE_R_KEY_BIT2 : 0x0UL) |
+               ((pteflags & H_PTE_PKEY_BIT1) ? HPTE_R_KEY_BIT1 : 0x0UL) |
+               ((pteflags & H_PTE_PKEY_BIT0) ? HPTE_R_KEY_BIT0 : 0x0UL));
 }
 
 static inline u16 pte_to_pkey_bits(u64 pteflags)
 {
-       return (((pteflags & H_PTE_PKEY_BIT0) ? 0x10 : 0x0UL) |
-               ((pteflags & H_PTE_PKEY_BIT1) ? 0x8 : 0x0UL) |
+       return (((pteflags & H_PTE_PKEY_BIT4) ? 0x10 : 0x0UL) |
+               ((pteflags & H_PTE_PKEY_BIT3) ? 0x8 : 0x0UL) |
                ((pteflags & H_PTE_PKEY_BIT2) ? 0x4 : 0x0UL) |
-               ((pteflags & H_PTE_PKEY_BIT3) ? 0x2 : 0x0UL) |
-               ((pteflags & H_PTE_PKEY_BIT4) ? 0x1 : 0x0UL));
+               ((pteflags & H_PTE_PKEY_BIT1) ? 0x2 : 0x0UL) |
+               ((pteflags & H_PTE_PKEY_BIT0) ? 0x1 : 0x0UL));
 }
 
 #define pkey_alloc_mask(pkey) (0x1 << pkey)
-- 
2.26.2

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