Re: [Patch v5 06/12] powerpc/virtex: Use generic xilinx irqchip driver

2016-10-19 Thread Michael Ellerman
Zubair Lutfullah Kakakhel  writes:

> The Xilinx interrupt controller driver is now available in drivers/irqchip.
> Switch to using that driver.
>
> Signed-off-by: Zubair Lutfullah Kakakhel 
>
> ---
> V5 New patch
>
> Tested on virtex440-ml507 using qemu

I don't have one of these to test on, and the patch looks sane, so
that's good enough for me.

Acked-by: Michael Ellerman  (powerpc)

cheers


[Patch v5 06/12] powerpc/virtex: Use generic xilinx irqchip driver

2016-10-17 Thread Zubair Lutfullah Kakakhel
The Xilinx interrupt controller driver is now available in drivers/irqchip.
Switch to using that driver.

Signed-off-by: Zubair Lutfullah Kakakhel 

---
V5 New patch

Tested on virtex440-ml507 using qemu
---
 arch/powerpc/include/asm/xilinx_intc.h |   2 +-
 arch/powerpc/platforms/40x/Kconfig |   1 +
 arch/powerpc/platforms/40x/virtex.c|   2 +-
 arch/powerpc/platforms/44x/Kconfig |   1 +
 arch/powerpc/platforms/44x/virtex.c|   2 +-
 arch/powerpc/sysdev/xilinx_intc.c  | 211 +
 drivers/irqchip/irq-xilinx-intc.c  |   3 +-
 7 files changed, 9 insertions(+), 213 deletions(-)

diff --git a/arch/powerpc/include/asm/xilinx_intc.h 
b/arch/powerpc/include/asm/xilinx_intc.h
index 343612f..3192d7f 100644
--- a/arch/powerpc/include/asm/xilinx_intc.h
+++ b/arch/powerpc/include/asm/xilinx_intc.h
@@ -14,7 +14,7 @@
 #ifdef __KERNEL__
 
 extern void __init xilinx_intc_init_tree(void);
-extern unsigned int xilinx_intc_get_irq(void);
+extern unsigned int xintc_get_irq(void);
 
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_XILINX_INTC_H */
diff --git a/arch/powerpc/platforms/40x/Kconfig 
b/arch/powerpc/platforms/40x/Kconfig
index e3257f2..1d7c1b1 100644
--- a/arch/powerpc/platforms/40x/Kconfig
+++ b/arch/powerpc/platforms/40x/Kconfig
@@ -64,6 +64,7 @@ config XILINX_VIRTEX_GENERIC_BOARD
default n
select XILINX_VIRTEX_II_PRO
select XILINX_VIRTEX_4_FX
+   select XILINX_INTC
help
  This option enables generic support for Xilinx Virtex based boards.
 
diff --git a/arch/powerpc/platforms/40x/virtex.c 
b/arch/powerpc/platforms/40x/virtex.c
index 91a08ea..e3d5e09 100644
--- a/arch/powerpc/platforms/40x/virtex.c
+++ b/arch/powerpc/platforms/40x/virtex.c
@@ -48,7 +48,7 @@ static int __init virtex_probe(void)
.probe  = virtex_probe,
.setup_arch = xilinx_pci_init,
.init_IRQ   = xilinx_intc_init_tree,
-   .get_irq= xilinx_intc_get_irq,
+   .get_irq= xintc_get_irq,
.restart= ppc4xx_reset_system,
.calibrate_decr = generic_calibrate_decr,
 };
diff --git a/arch/powerpc/platforms/44x/Kconfig 
b/arch/powerpc/platforms/44x/Kconfig
index 48fc180..25b8d64 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -241,6 +241,7 @@ config XILINX_VIRTEX440_GENERIC_BOARD
depends on 44x
default n
select XILINX_VIRTEX_5_FXT
+   select XILINX_INTC
help
  This option enables generic support for Xilinx Virtex based boards
  that use a 440 based processor in the Virtex 5 FXT FPGA architecture.
diff --git a/arch/powerpc/platforms/44x/virtex.c 
b/arch/powerpc/platforms/44x/virtex.c
index a7e0802..3eb13ed 100644
--- a/arch/powerpc/platforms/44x/virtex.c
+++ b/arch/powerpc/platforms/44x/virtex.c
@@ -54,7 +54,7 @@ static int __init virtex_probe(void)
.probe  = virtex_probe,
.setup_arch = xilinx_pci_init,
.init_IRQ   = xilinx_intc_init_tree,
-   .get_irq= xilinx_intc_get_irq,
+   .get_irq= xintc_get_irq,
.calibrate_decr = generic_calibrate_decr,
.restart= ppc4xx_reset_system,
 };
diff --git a/arch/powerpc/sysdev/xilinx_intc.c 
b/arch/powerpc/sysdev/xilinx_intc.c
index 0f52d79..4a86dcf 100644
--- a/arch/powerpc/sysdev/xilinx_intc.c
+++ b/arch/powerpc/sysdev/xilinx_intc.c
@@ -29,194 +29,7 @@
 #include 
 #include 
 #include 
-
-/*
- * INTC Registers
- */
-#define XINTC_ISR  0   /* Interrupt Status */
-#define XINTC_IPR  4   /* Interrupt Pending */
-#define XINTC_IER  8   /* Interrupt Enable */
-#define XINTC_IAR  12  /* Interrupt Acknowledge */
-#define XINTC_SIE  16  /* Set Interrupt Enable bits */
-#define XINTC_CIE  20  /* Clear Interrupt Enable bits */
-#define XINTC_IVR  24  /* Interrupt Vector */
-#define XINTC_MER  28  /* Master Enable */
-
-static struct irq_domain *master_irqhost;
-
-#define XILINX_INTC_MAXIRQS(32)
-
-/* The following table allows the interrupt type, edge or level,
- * to be cached after being read from the device tree until the interrupt
- * is mapped
- */
-static int xilinx_intc_typetable[XILINX_INTC_MAXIRQS];
-
-/* Map the interrupt type from the device tree to the interrupt types
- * used by the interrupt subsystem
- */
-static unsigned char xilinx_intc_map_senses[] = {
-   IRQ_TYPE_EDGE_RISING,
-   IRQ_TYPE_EDGE_FALLING,
-   IRQ_TYPE_LEVEL_HIGH,
-   IRQ_TYPE_LEVEL_LOW,
-};
-
-/*
- * The interrupt controller is setup such that it doesn't work well with
- * the level interrupt handler in the kernel because the handler acks the
- * interrupt before calling the application interrupt handler. To deal with
- * that, we use 2 different irq chips so that different