On Mon, Feb 05, 2018 at 11:26:15AM +1000, Nicholas Piggin wrote:
> On Sat, 3 Feb 2018 09:36:20 -0600
> > On Sat, Feb 03, 2018 at 02:27:32PM +1000, Nicholas Piggin wrote:
> > > + /*
> > > + * ISAv3.0B branch instruction and register additions
> > > + * CA32, OV32, mcrxrx, setb
> > > + */
> > > +
On Sat, 3 Feb 2018 09:36:20 -0600
Segher Boessenkool wrote:
> Hi! Some remarks:
Hi Segher,
Thanks for looking, we're a bit constrained in what we should do because
Linux side of the patch is already merged.
>
> On Sat, Feb 03, 2018 at 02:27:32PM +1000, Nicholas Piggin wrote:
> > + /*
> > +
Hi! Some remarks:
On Sat, Feb 03, 2018 at 02:27:32PM +1000, Nicholas Piggin wrote:
> + /*
> + * ISAv3.0B deliver a random number instruction (darn)
> + */
> + { "random-number-generator",
That's not such a great name... "darn-instruction" maybe? Just "wait"
as a name is a bit
On Sat, 3 Feb 2018 14:27:32 +1000
Nicholas Piggin wrote:
> diff --git a/core/cpufeatures.c b/core/cpufeatures.c
> new file mode 100644
> index 0..ca9df91f0
> --- /dev/null
> +++ b/core/cpufeatures.c
> @@ -0,0 +1,932 @@
> +/* Copyright 2017 IBM Corp.
> + *
> + * Licensed under the Apache