Re: [PATCH v2 03/16] ASoC: fsl_ssi: Maintain a mask of active streams

2018-01-14 Thread Nicolin Chen
On Sun, Jan 14, 2018 at 11:34:01PM +0100, Maciej S. Szmigiero wrote: > > + bool dir = (>regvals[TX] == vals) ? TX : RX; > Using a bool variable for a bit index (and array index in other parts > of code) looks just wrong. > > Even a simple int would look better IMHO here (and in patch 5 that >

Re: [PATCH v2 03/16] ASoC: fsl_ssi: Maintain a mask of active streams

2018-01-14 Thread Maciej S. Szmigiero
On 11.01.2018 07:43, Nicolin Chen wrote: > Checking TE and RE bits in SCR register doesn't work for AC97 mode > which enables SSIEN, TE and RE in the fsl_ssi_setup_ac97() that's > called during probe(). > > So when running into the trigger(), it will always get the result > of both TE and RE