Re: [PATCH v4] powerpc/powernv: Enable PCI peer-to-peer

[Michael Ellerman]

Frederic Barrat  writes:

> diff --git a/arch/powerpc/include/asm/opal-api.h 
> b/arch/powerpc/include/asm/opal-api.h
> index 7df005965634..2f52182a4c63 100644
> --- a/arch/powerpc/include/asm/opal-api.h
> +++ b/arch/powerpc/include/asm/opal-api.h
> @@ -193,7 +193,13 @@
>  #define OPAL_IMC_COUNTERS_INIT   149
>  #define OPAL_IMC_COUNTERS_START  150
>  #define OPAL_IMC_COUNTERS_STOP   151
> -#define OPAL_LAST151
> +#define OPAL_GET_POWERCAP   152
> +#define OPAL_SET_POWERCAP   153
> +#define OPAL_GET_POWER_SHIFT_RATIO  154
> +#define OPAL_SET_POWER_SHIFT_RATIO  155
> +#define OPAL_SENSOR_GROUP_CLEAR 156

Those are not your OPAL calls, so they shouldn't be in this patch.

I'll drop them.

> +#define OPAL_PCI_SET_P2P157
> +#define OPAL_LAST   157

Whitespace is messed up there, I can fix it.

> diff --git a/arch/powerpc/include/asm/pnv-pci.h 
> b/arch/powerpc/include/asm/pnv-pci.h
> index de9681034353..59a548909d0b 100644
> --- a/arch/powerpc/include/asm/pnv-pci.h
> +++ b/arch/powerpc/include/asm/pnv-pci.h
> @@ -26,6 +26,8 @@ extern int pnv_pci_get_presence_state(uint64_t id, uint8_t 
> *state);
>  extern int pnv_pci_get_power_state(uint64_t id, uint8_t *state);
>  extern int pnv_pci_set_power_state(uint64_t id, uint8_t state,
>  struct opal_msg *msg);
> +extern int pnv_pci_set_p2p(struct pci_dev *initiator, struct pci_dev *target,
> + uint64_t desc);

I know the OPAL API uses unit64_t, but in the kernel we use u64. I can
fix it up.


cheers

Re: [PATCH v4] powerpc/powernv: Enable PCI peer-to-peer

[Russell Currey]

On Fri, 2017-08-04 at 11:55 +0200, Frederic Barrat wrote:
> P9 has support for PCI peer-to-peer, enabling a device to write in the
> mmio space of another device directly, without interrupting the CPU.
> 
> This patch adds support for it on powernv, by adding a new API to be
> called by drivers. The pnv_pci_set_p2p(...) call configures an
> 'initiator', i.e the device which will issue the mmio operation, and a
> 'target', i.e. the device on the receiving side.
> 
> P9 really only supports mmio stores for the time being but that's
> expected to change in the future, so the API allows to define both
> load and store operations.
> 
> /* PCI p2p descriptor */
> #define OPAL_PCI_P2P_ENABLE   0x1
> #define OPAL_PCI_P2P_LOAD 0x2
> #define OPAL_PCI_P2P_STORE0x4
> 
> int pnv_pci_set_p2p(struct pci_dev *initiator, struct pci_dev *target,
>  uint64_t desc)
> 
> It uses a new OPAL call, as the configuration magic is done on the
> PHBs by skiboot.
> 
> Signed-off-by: Frederic Barrat 
> ---

Reviewed-by: Russell Currey