On Wed, Oct 12, 2005 at 05:38:17PM +0200, Wolfgang Denk wrote:
the following patch (against current kernel.org tree) adds suport for
the PPChameleon modules / eval boards manufactured by DAVE s.r.l.
See comments below.
+config PPChameleonEVB
+ bool PPChameleonEVB
+ help
+ This option enables support for the DAVE 405EP evaluation board.
+
It's unusual to have a mixed case config option. Is there a better
option that makes sense? PP_CHAM_EVB?
/* DCR defines */
-#define DCRN_CPMSR_BASE 0x0BA
-#define DCRN_CPMFR_BASE 0x0B9
+#define DCRN_CPMSR_BASE 0x0BA
+#define DCRN_CPMFR_BASE 0x0B9
Please drop these whitespace changes.
-#define IBM_CPM_GPT 0x8000 /* GPT interface */
-#define IBM_CPM_PCI 0x4000 /* PCI bridge */
-#define IBM_CPM_UIC 0x0001 /* Universal Int Controller
*/
-#define IBM_CPM_CPU 0x8000 /* processor core */
-#define IBM_CPM_EBC 0x2000 /* EBC controller */
-#define IBM_CPM_SDRAM0 0x4000 /* SDRAM memory controller */
-#define IBM_CPM_GPIO0 0x1000 /* General Purpose IO */
-#define IBM_CPM_TMRCLK 0x0400 /* CPU timers */
-#define IBM_CPM_PLB 0x0100 /* PLB bus arbiter */
-#define IBM_CPM_OPB 0x0080 /* PLB to OPB bridge */
-#define IBM_CPM_DMA 0x0040 /* DMA controller */
-#define IBM_CPM_IIC00x0010 /* IIC interface */
-#define IBM_CPM_UART1 0x0002 /* serial port 0 */
-#define IBM_CPM_UART0 0x0001 /* serial port 1 */
+#define IBM_CPM_GPT 0x8000 /* GPT interface */
+#define IBM_CPM_PCI 0x4000 /* PCI bridge */
+#define IBM_CPM_UIC 0x0001 /* Universal Int Controller */
+#define IBM_CPM_CPU 0x8000 /* processor core */
+#define IBM_CPM_EBC 0x2000 /* EBC controller */
+#define IBM_CPM_SDRAM0 0x4000 /* SDRAM memory
controller */
+#define IBM_CPM_GPIO00x1000 /* General Purpose IO */
+#define IBM_CPM_TMRCLK 0x0400 /* CPU timers */
+#define IBM_CPM_PLB 0x0100 /* PLB bus arbiter */
+#define IBM_CPM_OPB 0x0080 /* PLB to OPB bridge */
+#define IBM_CPM_DMA 0x0040 /* DMA controller */
+#define IBM_CPM_IIC0 0x0010 /* IIC interface */
+#define IBM_CPM_UART10x0002 /* serial port 0 */
+#define IBM_CPM_UART00x0001 /* serial port 1 */
Same here, if whitespace chanes are important submit them separately.
diff --git a/arch/ppc/platforms/4xx/ppchameleon.c
b/arch/ppc/platforms/4xx/ppchameleon.c
new file mode 100644
--- /dev/null
snip
+#if defined(CONFIG_BIOS_FIXUP)
+void __init bios_fixup (struct pci_controller *hose, struct pcil0_regs *pcip)
snip
You don't use this bios_fixup garbage in this port (at least according
to your defconfig) so just drop it.
As an aside, this stuff is pretty awful and has been since 405 first
came into the tree. If the basic functionality were required, a new
port should simply reprogram the pci host bridge and let the pci
subsystem place the BARs.
-Matt
