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Subject: media: cadence: csi2rx: Configure DPHY using link freq
Author:  Pratyush Yadav <p.ya...@ti.com>
Date:    Mon Oct 9 18:39:32 2023 +0530

Some platforms like TI's J721E can have the CSI2RX paired with an
external DPHY. Use the generic PHY framework to configure the DPHY with
the correct link frequency.

Signed-off-by: Pratyush Yadav <p.ya...@ti.com>
Tested-by: Julien Massot <julien.mas...@collabora.com>
Reviewed-by: Laurent Pinchart <laurent.pinch...@ideasonboard.com>
Reviewed-by: Tomi Valkeinen <tomi.valkei...@ideasonboard.com>
Reviewed-by: Maxime Ripard <mrip...@kernel.org>
Co-developed-by: Jai Luthra <j-lut...@ti.com>
Signed-off-by: Jai Luthra <j-lut...@ti.com>
Signed-off-by: Sakari Ailus <sakari.ai...@linux.intel.com>
Signed-off-by: Hans Verkuil <hverkuil-ci...@xs4all.nl>

 drivers/media/platform/cadence/cdns-csi2rx.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

---

diff --git a/drivers/media/platform/cadence/cdns-csi2rx.c 
b/drivers/media/platform/cadence/cdns-csi2rx.c
index f9b41451f4a4..77e2413c345a 100644
--- a/drivers/media/platform/cadence/cdns-csi2rx.c
+++ b/drivers/media/platform/cadence/cdns-csi2rx.c
@@ -145,8 +145,32 @@ static void csi2rx_reset(struct csi2rx_priv *csi2rx)
 static int csi2rx_configure_ext_dphy(struct csi2rx_priv *csi2rx)
 {
        union phy_configure_opts opts = { };
+       struct phy_configure_opts_mipi_dphy *cfg = &opts.mipi_dphy;
+       struct v4l2_subdev_format sd_fmt = {
+               .which  = V4L2_SUBDEV_FORMAT_ACTIVE,
+               .pad    = CSI2RX_PAD_SINK,
+       };
+       const struct csi2rx_fmt *fmt;
+       s64 link_freq;
        int ret;
 
+       ret = v4l2_subdev_call_state_active(&csi2rx->subdev, pad, get_fmt,
+                                           &sd_fmt);
+       if (ret < 0)
+               return ret;
+
+       fmt = csi2rx_get_fmt_by_code(sd_fmt.format.code);
+
+       link_freq = v4l2_get_link_freq(csi2rx->source_subdev->ctrl_handler,
+                                      fmt->bpp, 2 * csi2rx->num_lanes);
+       if (link_freq < 0)
+               return link_freq;
+
+       ret = phy_mipi_dphy_get_default_config_for_hsclk(link_freq,
+                                                        csi2rx->num_lanes, 
cfg);
+       if (ret)
+               return ret;
+
        ret = phy_power_on(csi2rx->dphy);
        if (ret)
                return ret;

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