bhushan accepted this revision.
bhushan added a comment.
This revision is now accepted and ready to land.
Looks good as far as correctness is concerned.
https://reviews.llvm.org/D24498
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bhushan accepted this revision.
bhushan added a comment.
LGTM
https://reviews.llvm.org/D22851
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bhushan accepted this revision.
bhushan added a comment.
Looks good.
Repository:
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http://reviews.llvm.org/D21064
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bhushan closed this revision.
bhushan added a comment.
Closed by commit http://reviews.llvm.org/rL261206
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http://reviews.llvm.org/D17022
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bhushan added a comment.
Hi @zturner,
Can you please "accept" this revision so that I can "close" this one?
Repository:
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http://reviews.llvm.org/D17022
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bhushan added a comment.
In MIPS, we can not put a breakpoint in middle of an atomic sequence.
If we do so (and that breakpoint is hit) then continuing from breakpoint
address will cause "SC" to fail due to a breakpoint exception.
SC fails when there’s been any exception serviced since the LL.
These were failures with 3.7 for mipsr6.
Regards,
Bhushan
From: hwennb...@google.com [hwennb...@google.com] on behalf of Hans Wennborg
[h...@chromium.org]
Sent: Tuesday, February 23, 2016 10:29 PM
To: Bhushan Attarde
Cc: lldb-commits@lists.llvm.org; Greg
Hi Hans,
This change fixes expression related tests for MIPS release 6 architecture
(mipsr6).
Regards,
Bhushan
-Original Message-
From: hwennb...@google.com [mailto:hwennb...@google.com] On Behalf Of Hans
Wennborg
Sent: 23 February 2016 00:25
To: Bhushan Attarde
Cc:
Hi Hans,
Could you please add this (r261206) to the release branch?
Thanks,
Bhushan
-Original Message-
From: lldb-commits [mailto:lldb-commits-boun...@lists.llvm.org] On Behalf Of
Bhushan D. Attarde via lldb-commits
Sent: 18 February 2016 17:23
To: lldb-commits@lists.llvm.org
Subject:
bhushan added a comment.
Hi Zachary,
Can you please find some time to review this?
Repository:
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http://reviews.llvm.org/D17022
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bhushan added a comment.
@zturner,
Ok to commit?
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bhushan updated this revision to Diff 47621.
bhushan added a comment.
Addressed review comments:
- Rebased this patch off top of tree
- Added ArchSpec::GetClangTargetCPU() as suggested and moved large switch
statement into it.
Repository:
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http://reviews.llvm.org/D17022
Files:
bhushan updated this revision to Diff 47765.
bhushan added a comment.
Removed assert statement so now "ArchSpec::GetClangTargetCPU ()" returns an
empty string (instead of crashing) for any CPU that doesn't really need to make
a special CPU string.
Removed the "if (is_mips)".
Repository:
rL
Hi Hans,
Could you please add this (r260072) to the release branch?
Thanks,
Bhushan
-Original Message-
From: lldb-commits [mailto:lldb-commits-boun...@lists.llvm.org] On Behalf Of
Bhushan D. Attarde via lldb-commits
Sent: 08 February 2016 10:06
To: lldb-commits@lists.llvm.org
Subject:
bhushan created this revision.
bhushan added reviewers: clayborg, spyffe.
bhushan added subscribers: lldb-commits, nitesh.jain, jaydeep, sagar,
mohit.bhakkad.
bhushan set the repository for this revision to rL LLVM.
Currently, LLDB (ClangExpressionParser) does not pass
bhushan updated this revision to Diff 47422.
bhushan added a comment.
Addresses review comments.
Used local variables instead of calling accessors each time.
Repository:
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http://reviews.llvm.org/D17022
Files:
source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
Index:
bhushan closed this revision.
bhushan added a comment.
Closed by commit http://reviews.llvm.org/rL258919
Repository:
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http://reviews.llvm.org/D16049
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bhushan created this revision.
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This test (TestExpressionInSyscall.py) checks if we are able to evaluate
expressions
Hi Hans,
Could you please add this (r258919) to the release branch?
Also commit r258967 (on top of this) by Zachary which fixes some python 3
incompatibilities.
Thanks,
Bhushan
-Original Message-
From: lldb-commits [mailto:lldb-commits-boun...@lists.llvm.org] On Behalf Of
Bhushan D.
Hi Hans,
Could you please add this to the release branch?
Thanks,
Bhushan
-Original Message-
From: lldb-commits [mailto:lldb-commits-boun...@lists.llvm.org] On Behalf Of
Bhushan D. Attarde via lldb-commits
Sent: 22 January 2016 10:32
To: lldb-commits@lists.llvm.org
Subject:
bhushan updated this revision to Diff 45364.
bhushan added a comment.
As suggested by Greg, added new function `matchArchitectures(archs)` which
handles "archs".
This function can be used by other decorator functions for testing "archs".
Repository:
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http://reviews.llvm.org/D16049
bhushan updated the summary for this revision.
bhushan updated this revision to Diff 45237.
bhushan added a comment.
Addressed review comments.
Instead of adding new decorator, this patch modifies existing `skipUnlessArch`
to detect the type of the "archs" variable and do the things according to
bhushan added a comment.
In http://reviews.llvm.org/D14111#330305, @spyffe wrote:
> That looks fine to me as far as it goes, but it doesn't cover other places
> where $ is used in function names, e.g. the name of the expression itself,
> and classes it's placed in. Could you have a look at
>
bhushan added a reviewer: clayborg.
bhushan added a comment.
Hi Greg,
Can you have look into this? This patch is important to clear expression
related tests for MIPS.
Repository:
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http://reviews.llvm.org/D14111
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bhushan updated the summary for this revision.
bhushan added a reviewer: zturner.
bhushan updated this revision to Diff 44841.
bhushan added a comment.
Hi Zachary,
If we use @skipIf then the list would require to contain all possible MIPS
variations and the list will grow long.
for ex:
bhushan added a comment.
In http://reviews.llvm.org/D16049#326634, @labath wrote:
> In http://reviews.llvm.org/D16049#326631, @bhushan wrote:
>
> > Hi Zachary,
> >
> > If we use @skipIf then the list would require to contain all possible MIPS
> > variations and the list will grow long.
> > for
bhushan updated this revision to Diff 44723.
bhushan added a comment.
This diff adds a testcase to test this patch.
The test gets all assembly instructions from the function and finds out the
address of instruction in delay slot.
Then it tries to place a breakpoint on that address and verifies
bhushan closed this revision.
bhushan added a comment.
Closed by commit http://reviews.llvm.org/rL257442
Repository:
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http://reviews.llvm.org/D16051
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bhushan added a comment.
Closed by commit http://reviews.llvm.org/rL257441
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http://reviews.llvm.org/D16046
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bhushan added subscribers: lldb-commits, nitesh.jain, mohit.bhakkad, sagar,
jaydeep.
bhushan set the repository for this revision to rL LLVM.
Repository:
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http://reviews.llvm.org/D16049
Files:
bhushan created this revision.
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The PIC calling convention for MIPS requires that on entry to a function,
register r25
bhushan added a comment.
Summary:
Get the load address for the address given by 'symbol' and 'function'.
Earlier, this was done for 'function' only, this patch does it for 'symbol' too.
Repository:
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http://reviews.llvm.org/D16049
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Currently there is a separate emulation function for each branch instruction,
however
bhushan added a comment.
Hi Pavel,
Could you please confirm if http://reviews.llvm.org/rL256929 resolves the
build warnings?
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Closed by commit http://reviews.llvm.org/rL256915
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Herald added a subscriber: dsanders.
Currently there is a separate emulation function
bhushan closed this revision.
bhushan added a comment.
This was committed on 6th Oct 15 by http://reviews.llvm.org/rL249381 ,closing
it now.
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Closed by commit http://reviews.llvm.org/rL255005
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http://reviews.llvm.org/D15273
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bhushan set the repository for this revision to rL LLVM.
This patch includes:
1. Emulation of prologue/epilogue and branch
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In MIPS, an application elf can contain mixed code (mips + micromips) i.e some
bhushan closed this revision.
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Closed by commit http://reviews.llvm.org/rL247666
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MIPS executables now uses DT_MIPS_RLD_MAP_REL to support PIE.
This tag allows debugging
bhushan created this revision.
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In MIPS, when a breakpoint is hit in a delay slot then the PC points to the
previous
bhushan updated this revision to Diff 32038.
bhushan added a comment.
Addresses review comments. (Initialized variables with default values).
Repository:
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http://reviews.llvm.org/D11930
Files:
source/Plugins/ABI/SysV-mips/ABISysV_mips.cpp
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