Author: slthakur
Date: Wed Jun 29 07:30:18 2016
New Revision: 274121
URL: http://llvm.org/viewvc/llvm-project?rev=274121=rev
Log:
[LLDB][MIPS] Check if libatomic needs to be specified explicitly
Patch by Nitesh Jain.
Summary : The problem appears while linking liblldb.so. The class Address
slthakur closed this revision.
slthakur added a comment.
Committed in http://reviews.llvm.org/rL273535
Repository:
rL LLVM
http://reviews.llvm.org/D21064
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Author: slthakur
Date: Thu Jun 23 01:40:37 2016
New Revision: 273535
URL: http://llvm.org/viewvc/llvm-project?rev=273535=rev
Log:
[LLDB][MIPS] Fix Emulation of Compact branch and ADDIU instructions
Patch by Nitesh Jain.
This patch contains 2 changes:
- Corrected target address calculation of
This revision was automatically updated to reflect the committed changes.
Closed by commit rL270564: [LLDB][MIPS] Fix floating point handling in case of
thread step-out (authored by slthakur).
Changed prior to commit:
http://reviews.llvm.org/D20416?vs=57739=58236#toc
Repository:
rL LLVM
Author: slthakur
Date: Tue May 24 09:52:50 2016
New Revision: 270564
URL: http://llvm.org/viewvc/llvm-project?rev=270564=rev
Log:
[LLDB][MIPS] Fix floating point handling in case of thread step-out
Patch by Nitesh Jain.
Summary: These patch fix thread step-out for hard and soft float.
Author: slthakur
Date: Fri May 20 07:07:27 2016
New Revision: 270207
URL: http://llvm.org/viewvc/llvm-project?rev=270207=rev
Log:
[LLDB][MIPS] Fix floating point handling in case of thread step-out
Patch by Nitesh Jain.
Summary: These patch fix thread step-out for hard and soft float.
Author: slthakur
Date: Wed May 11 08:08:29 2016
New Revision: 269181
URL: http://llvm.org/viewvc/llvm-project?rev=269181=rev
Log:
[LLDB][MIPS] Setting appropriate ArchSpec::m_flags based on ABI
Patch by Nitesh Jain.
Summary: The ArchSpec::m_flags will be set based on ELF flag ABI.
Reviewers:
sagar accepted this revision.
sagar added a comment.
This revision is now accepted and ready to land.
LGTM
Repository:
rL LLVM
http://reviews.llvm.org/D18853
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sagar closed this revision.
sagar added a comment.
Committed in revision 262011.
Repository:
rL LLVM
http://reviews.llvm.org/D17131
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Author: slthakur
Date: Fri Feb 26 07:30:34 2016
New Revision: 262011
URL: http://llvm.org/viewvc/llvm-project?rev=262011=rev
Log:
[LLDB][MIPS] Fix TestInferiorAssert.py for MIPS
Patch by Nitesh Jain.
Summary: The debug version of libc.so is require for backtracing which may not
be available on
sagar closed this revision.
sagar added a comment.
Committed in revision 258685.
Repository:
rL LLVM
http://reviews.llvm.org/D16136
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Author: slthakur
Date: Mon Jan 25 06:27:46 2016
New Revision: 258684
URL: http://llvm.org/viewvc/llvm-project?rev=258684=rev
Log:
[LLDB][MIPS] Fix TestExprsChar.py
Patch by Nitesh Jain.
Summary: When incorrect type used for 'char' then (at least) one of the
expression evaluates to incorrect
sagar closed this revision.
sagar added a comment.
Committed in revision 258684
Repository:
rL LLVM
http://reviews.llvm.org/D16132
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Author: slthakur
Date: Mon Jan 25 06:33:03 2016
New Revision: 258685
URL: http://llvm.org/viewvc/llvm-project?rev=258685=rev
Log:
[LLDB][MIPS] Fix TestPrintStackTraces.py
Patch by Nitesh Jain.
Summary: The thread_start function in libc doesn't contain any epilogue and
prologue instructions.
sagar closed this revision.
sagar added a comment.
Committed in revision 257587 on behalf of Nitesh Jain.
Repository:
rL LLVM
http://reviews.llvm.org/D15915
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Author: slthakur
Date: Tue Jan 5 08:03:45 2016
New Revision: 256834
URL: http://llvm.org/viewvc/llvm-project?rev=256834=rev
Log:
[LLDB][MIPS] Make register read/write to set/get the size of register according
to abi.
Summary:
For O32 abi register size should be 4 bytes.
For N32 and N64 abi
sagar closed this revision.
sagar marked an inline comment as done.
sagar added a comment.
Committed in revision 256834
Repository:
rL LLVM
http://reviews.llvm.org/D15884
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sagar created this revision.
sagar added reviewers: clayborg, tberghammer.
sagar added subscribers: jaydeep, bhushan, mohit.bhakkad, nitesh.jain,
lldb-commits.
sagar set the repository for this revision to rL LLVM.
For O32 abi register size should be 4 bytes.
For N32 and N64 abi register size
Author: slthakur
Date: Mon Dec 14 23:50:55 2015
New Revision: 255619
URL: http://llvm.org/viewvc/llvm-project?rev=255619=rev
Log:
[LLDB][MIPS] Added support for MIPS1, MIPS2, MIPS3, MIPS4 and MIPS5 instruction
sets
Patch by Nitesh Jain.
Summary: This Patch will allowed LLDB to debug respective
Author: slthakur
Date: Wed Dec 9 06:31:01 2015
New Revision: 255108
URL: http://llvm.org/viewvc/llvm-project?rev=255108=rev
Log:
[LLDB][MIPS] Adding call to IsMSAAvailable() while creating
RegisterInfoInterface
This patch will fix the test case
Author: slthakur
Date: Sat Dec 5 06:01:48 2015
New Revision: 254850
URL: http://llvm.org/viewvc/llvm-project?rev=254850=rev
Log:
[LLDB][MIPS] Fix TestConstVariables.py
Patch by Nitesh Jain.
Summary: There is no debug information generated for variable index with –O3
optimization flag. The
sagar updated this revision to Diff 41232.
sagar added a comment.
Addressed review comments
Repository:
rL LLVM
http://reviews.llvm.org/D14633
Files:
source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp
Index:
sagar added a comment.
Hi,
Could we use SetBytes for now for clearing the bug 25194? I have tried using
SetBytes(), it does not cause any issue on MIPS for both endian. Once we have a
new function to llvm::APInt to access actual data I will revert back to using
SetUInt. Kindly let me know if
sagar closed this revision.
sagar added a comment.
Committed in r253555 on behalf of @nitesh.jain
Repository:
rL LLVM
http://reviews.llvm.org/D14635
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Author: slthakur
Date: Thu Nov 19 05:01:21 2015
New Revision: 253555
URL: http://llvm.org/viewvc/llvm-project?rev=253555=rev
Log:
[LLDB][MIPS] Fix lldbplatformutil.py Failure
Patch by Nitesh Jain
Summary: This patch check whether first register is readable.
Subscribers: lldb-commits,
sagar added a comment.
Hi,
@tberghammer : For both mips32 and mips64 big endian 'T' packet response
contains the register values in target byte order only. But for mips32 big
endian when we set the value of the register in RegisterValue using
RegisterValue::SetUInt() the upper half of the
sagar closed this revision.
sagar added a comment.
Committed in r253444 on behalf of @nitesh.jain
Repository:
rL LLVM
http://reviews.llvm.org/D14493
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sagar added a comment.
Committed in r253445 on behalf of @nitesh.jain
Repository:
rL LLVM
http://reviews.llvm.org/D14634
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Author: slthakur
Date: Wed Nov 18 02:12:34 2015
New Revision: 253444
URL: http://llvm.org/viewvc/llvm-project?rev=253444=rev
Log:
[MIPS][LLDB]Fix TestBreakpointCondition.py for MIPS
Patch by Nitesh Jain
Summary: The self.getArchitecture() returns the architecture based on the value
of -A flag
Author: slthakur
Date: Wed Nov 18 02:18:03 2015
New Revision: 253445
URL: http://llvm.org/viewvc/llvm-project?rev=253445=rev
Log:
[LLDB][MIPS] Fix TestDisassembleBreakpoint.py for MIPS
Patch by Nitesh Jain
Summary: The break is opcode for breakpoint instruction.
Subscribers: lldb-commits,
sagar added a comment.
Hi @tberghammer,
I tried using RegisterValue::SetUInt() instead of RegisterValue::SetBytes().
When using RegisterValue::SetUInt() all register values we get are zero in case
of mips32 big endian machine. The
sagar updated this revision to Diff 40256.
sagar added a comment.
Addressed review comments.
Repository:
rL LLVM
http://reviews.llvm.org/D14633
Files:
source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp
Index:
sagar added a comment.
> Admittedly it's a bit unintuitive for an unsigned 32-bit value from a MIPS32
> binary to be represented in a 64-bit register as, for example,
> 0x8000 but the debugger shouldn't normally admit to the existence
> of the extra bits when debugging 32-bit code
sagar created this revision.
sagar added reviewers: clayborg, tberghammer.
sagar added subscribers: nitesh.jain, jaydeep, bhushan, mohit.bhakkad,
lldb-commits.
sagar set the repository for this revision to rL LLVM.
Herald added a subscriber: dsanders.
This patch will clear bug 25194 -
Author: slthakur
Date: Thu Oct 1 10:15:42 2015
New Revision: 249021
URL: http://llvm.org/viewvc/llvm-project?rev=249021=rev
Log:
Romove accidentially added statement in r249020
Modified:
lldb/trunk/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
Modified:
Author: slthakur
Date: Thu Oct 1 10:05:31 2015
New Revision: 249020
URL: http://llvm.org/viewvc/llvm-project?rev=249020=rev
Log:
[LLDB][MIPS] Fix gp register value for o32 applications on 64-bit target
GP registers for o32 applications were always giving zero value because
SetType() on the
sagar closed this revision.
sagar added a comment.
Committed in revision 246745
Repository:
rL LLVM
http://reviews.llvm.org/D12356
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Author: slthakur
Date: Wed Sep 2 22:57:44 2015
New Revision: 246745
URL: http://llvm.org/viewvc/llvm-project?rev=246745=rev
Log:
[MIPS64] Emulate MSA branch instructions
This patch adds MSA branch instruction emulation for MIPS64.
Reviewers: tberghammer, jaydeep
Subscribers: tberghammer,
sagar marked 7 inline comments as done.
Comment at: source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp:3160
@@ +3159,3 @@
+if((*ptr == 0 && bnz) || (*ptr != 0 && !bnz) )
+branch_hit = false;
+break;
Author: slthakur
Date: Tue Aug 25 04:52:59 2015
New Revision: 245927
URL: http://llvm.org/viewvc/llvm-project?rev=245927view=rev
Log:
Fix build on mips
Setting and getting register values as bytes instead of depending on the 128
bit integer support in register value.
This patch will fix the
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