Sorry I didn’t see your comments on the web interface, I’ll submit a followup patch with these changes.
From: Zachary Turner [mailto:ztur...@google.com] Sent: Wednesday, September 14, 2016 7:47 PM To: Giusti, Valentina <valentina.giu...@intel.com>; lldb-commits@lists.llvm.org Subject: Re: [Lldb-commits] [lldb] r281507 - Use Intel CPU flags to determine target supported features. Can probably do the same for XStateType as well: enum class XStateType { Invalid, FXSAVE, XSAVE }; On Wed, Sep 14, 2016 at 10:46 AM Zachary Turner <ztur...@google.com<mailto:ztur...@google.com>> wrote: On Wed, Sep 14, 2016 at 10:36 AM Valentina Giusti via lldb-commits <lldb-commits@lists.llvm.org<mailto:lldb-commits@lists.llvm.org>> wrote: ============================================================================== --- lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.h (original) +++ lldb/trunk/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.h Wed Sep 14 12:27:48 2016 @@ -77,7 +77,8 @@ protected: private: // Private member types. - enum FPRType { eFPRTypeNotValid = 0, eFPRTypeFXSAVE, eFPRTypeXSAVE }; + enum XStateType { eXStateTypeNotValid = 0, eXStateTypeFXSAVE, eXStateTypeXSAVE }; + enum RegSet { gpr, fpu, avx, mpx }; This still isn't an enum class. You need to write: enum class RegSet { gpr, fpu, avx, mpx }; Can you make this change and submit it as a followup please? Intel Deutschland GmbH Registered Address: Am Campeon 10-12, 85579 Neubiberg, Germany Tel: +49 89 99 8853-0, www.intel.de Managing Directors: Christin Eisenschmid, Christian Lamprechter Chairperson of the Supervisory Board: Nicole Lau Registered Office: Munich Commercial Register: Amtsgericht Muenchen HRB 186928
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