This revision was automatically updated to reflect the committed changes.
Closed by commit rL284003: [LLDB][MIPS] fix Floating point register read/write
for big endian (authored by nitesh.jain).
Changed prior to commit:
https://reviews.llvm.org/D24603?vs=73278=74357#toc
Repository:
rL LLVM
nitesh.jain added a comment.
In https://reviews.llvm.org/D24603#566575, @clayborg wrote:
> Commit anytime.
Thanks
https://reviews.llvm.org/D24603
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nitesh.jain added a comment.
Hi Greg,
The diff is update as per suggestion so should I commit this ?
Thanks
https://reviews.llvm.org/D24603
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nitesh.jain updated this revision to Diff 73278.
nitesh.jain added a comment.
These diff remove manually bit twiddling due to the size of the floating point
register that can change. We use register offset to get floating point register
data based on endianess and it's size. We have not remove
clayborg added a comment.
Please comment why you are manually bit twiddling due to the size of the
register that can change. We don't want anyone else copying this kind of code.
Another solution would be to update the offset of the register when you change
the byte size so none of this would
nitesh.jain added a comment.
In https://reviews.llvm.org/D24603#548902, @clayborg wrote:
> So it seems like this can be fixed by doing a few things:
> 1 - just set the RegisterInfo.offset to the actual offset in the buffer and
> don't use the offset as the ptrace key used to grab the register
nitesh.jain updated this revision to Diff 72618.
nitesh.jain added a comment.
Herald added a subscriber: ki.stfu.
Updated patch as per suggestion.
https://reviews.llvm.org/D24603
Files:
source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp
clayborg requested changes to this revision.
clayborg added a comment.
This revision now requires changes to proceed.
So it seems like this can be fixed by doing a few things:
1 - just set the RegisterInfo.offset to the actual offset in the buffer and
don't use the offset as the ptrace key used
labath accepted this revision.
labath added a comment.
This revision is now accepted and ready to land.
Ok, lets leave that as-is then.. the issue seem s pretty contained for now.
https://reviews.llvm.org/D24603
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nitesh.jain marked an inline comment as done.
nitesh.jain added a comment.
https://reviews.llvm.org/D24603
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nitesh.jain updated this revision to Diff 71505.
nitesh.jain added a comment.
Updated diff as per suggestion.
https://reviews.llvm.org/D24603
Files:
source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp
source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.h
Index:
nitesh.jain added inline comments.
Comment at:
source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp:1183
@@ +1182,3 @@
+ case dwarf_config5_mips64:
+return reg_info->byte_offset;
+ case dwarf_cause_mips:
labath wrote:
> Why do we need to do
labath added inline comments.
Comment at:
source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp:1183
@@ +1182,3 @@
+ case dwarf_config5_mips64:
+return reg_info->byte_offset;
+ case dwarf_cause_mips:
Why do we need to do this remapping?
nitesh.jain created this revision.
nitesh.jain added reviewers: clayborg, labath, jaydeep.
nitesh.jain added subscribers: bhushan, slthakur, lldb-commits.
Herald added a subscriber: sdardis.
This patch add fix for reading and writing floating point register based on
SR.FR bit.
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