[Lldb-commits] [clang] [flang] [lld] [lldb] [llvm] AMDGPU: Introduce amdgpu triple arch (PR #206480)
arsenm wrote: > One of our bots in staging has turned red with this PR landing: > https://lab.llvm.org/staging/#/builders/234/builds/1035 https://github.com/llvm/llvm-project/pull/208455 https://github.com/llvm/llvm-project/pull/206480 ___ lldb-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [clang] [flang] [lld] [lldb] [llvm] AMDGPU: Introduce amdgpu triple arch (PR #206480)
jplehr wrote: One of our bots in staging has turned red with this PR landing: https://lab.llvm.org/staging/#/builders/234/builds/1035 https://github.com/llvm/llvm-project/pull/206480 ___ lldb-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [clang] [flang] [lld] [lldb] [llvm] AMDGPU: Introduce amdgpu triple arch (PR #206480)
@@ -873,6 +879,24 @@ AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T,
const Triple &TT,
TLOF(createTLOF(getTargetTriple())) {
initAsmInfo();
if (TT.isAMDGCN()) {
+// Triple is missing a representation for non-empty, but unrecognized
+// subarches. Only permit no subarch for any subtarget if it was really
+// empty.
+bool IsUnknownSubArch =
+TT.getSubArch() == Triple::NoSubArch && TT.getArchName().size() != 6;
+if (IsUnknownSubArch)
+ reportFatalUsageError("unknown subarch " + TT.getArchName());
+
+if (TT.getSubArch() != Triple::NoSubArch) {
+ AMDGPU::GPUKind Kind = AMDGPU::parseArchAMDGCN(CPU);
+ Triple::SubArchType GPUSubArch = AMDGPU::getSubArch(Kind);
+ if (Kind != AMDGPU::GK_NONE && GPUSubArch != TT.getSubArch() &&
+ TT.getSubArch() != AMDGPU::getMajorSubArch(GPUSubArch)) {
arsenm wrote:
Basic tool behavior should not vary per targets. If we make a change here, it
should be to hard error universally on unrecognized names
https://github.com/llvm/llvm-project/pull/206480
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[Lldb-commits] [clang] [flang] [lld] [lldb] [llvm] AMDGPU: Introduce amdgpu triple arch (PR #206480)
@@ -873,6 +879,24 @@ AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T,
const Triple &TT,
TLOF(createTLOF(getTargetTriple())) {
initAsmInfo();
if (TT.isAMDGCN()) {
+// Triple is missing a representation for non-empty, but unrecognized
+// subarches. Only permit no subarch for any subtarget if it was really
+// empty.
+bool IsUnknownSubArch =
+TT.getSubArch() == Triple::NoSubArch && TT.getArchName().size() != 6;
+if (IsUnknownSubArch)
+ reportFatalUsageError("unknown subarch " + TT.getArchName());
+
+if (TT.getSubArch() != Triple::NoSubArch) {
+ AMDGPU::GPUKind Kind = AMDGPU::parseArchAMDGCN(CPU);
+ Triple::SubArchType GPUSubArch = AMDGPU::getSubArch(Kind);
+ if (Kind != AMDGPU::GK_NONE && GPUSubArch != TT.getSubArch() &&
+ TT.getSubArch() != AMDGPU::getMajorSubArch(GPUSubArch)) {
slinder1 wrote:
What is the benefit to being like the other targets, though? In many cases
behaving differently is a surprise, but in this case I see the "warn and plow
ahead" behavior as the surprising one.
An e.g. clang user that wants to start using amdgpu won't be confused that they
cannot request nonsense (or just have a typo in their -mcpu??) and the compiler
refuses to ignore them like it does for e.g. x86
We don't have to fix this here, but I wanted to point out that we could
piggyback these kinds of other obvious improvements on the relatively big
effort required to switch over from the "amdgcn" to "amdgpu" world.
https://github.com/llvm/llvm-project/pull/206480
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[Lldb-commits] [clang] [flang] [lld] [lldb] [llvm] AMDGPU: Introduce amdgpu triple arch (PR #206480)
@@ -34,9 +34,159 @@ StringRef llvm::AMDGPU::getArchFamilyNameAMDGCN(GPUKind AK)
{
return ArchName.empty() ? "" : ArchName.drop_back(2);
}
+Triple::SubArchType llvm::AMDGPU::getSubArch(GPUKind AK) {
+ switch (AK) {
+#define AMDGCN_GPU(NAME, ENUM, SUBARCH, ISAVERSION, FEATURES)
\
+ case ENUM:
\
+return SUBARCH;
+#include "llvm/TargetParser/AMDGPUTargetParser.def"
+ default:
+return Triple::SubArchType::NoSubArch;
+ }
+}
+
+AMDGPU::GPUKind
+llvm::AMDGPU::getGPUKindFromSubArch(Triple::SubArchType SubArch) {
+ switch (SubArch) {
+#define AMDGCN_GPU(NAME, ENUM, SUBARCH, ISAVERSION, FEATURES)
\
+ case SUBARCH:
\
+return ENUM;
+#include "llvm/TargetParser/AMDGPUTargetParser.def"
+ default:
+return GK_NONE;
+ }
+}
+
+static const Triple::SubArchType
+AMDGPUMajorFamilies[Triple::LastAMDGPUSubArch - Triple::FirstAMDGPUSubArch
+
+1] = {
+Triple::AMDGPUSubArch6,Triple::AMDGPUSubArch6,
+Triple::AMDGPUSubArch6,Triple::AMDGPUSubArch6,
+
+Triple::AMDGPUSubArch7,Triple::AMDGPUSubArch7,
+Triple::AMDGPUSubArch7,Triple::AMDGPUSubArch7,
+Triple::AMDGPUSubArch7,Triple::AMDGPUSubArch7,
+Triple::AMDGPUSubArch7,
+
+Triple::AMDGPUSubArch8,Triple::AMDGPUSubArch8,
+Triple::AMDGPUSubArch8,Triple::AMDGPUSubArch8,
+Triple::AMDGPUSubArch8,
+
+Triple::AMDGPUSubArch810,
+
+Triple::AMDGPUSubArch9,Triple::AMDGPUSubArch9,
+Triple::AMDGPUSubArch9,Triple::AMDGPUSubArch9,
+Triple::AMDGPUSubArch9,Triple::AMDGPUSubArch9,
+Triple::AMDGPUSubArch9,
+
+Triple::AMDGPUSubArch908, Triple::AMDGPUSubArch90A,
+
+Triple::AMDGPUSubArch9_4, Triple::AMDGPUSubArch9_4,
+Triple::AMDGPUSubArch9_4,
+
+Triple::AMDGPUSubArch10_1, Triple::AMDGPUSubArch10_1,
+Triple::AMDGPUSubArch10_1, Triple::AMDGPUSubArch10_1,
+Triple::AMDGPUSubArch10_1,
+
+Triple::AMDGPUSubArch10_3, Triple::AMDGPUSubArch10_3,
+Triple::AMDGPUSubArch10_3, Triple::AMDGPUSubArch10_3,
+Triple::AMDGPUSubArch10_3, Triple::AMDGPUSubArch10_3,
+Triple::AMDGPUSubArch10_3, Triple::AMDGPUSubArch10_3,
+
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+
+Triple::AMDGPUSubArch11_7, Triple::AMDGPUSubArch11_7,
+Triple::AMDGPUSubArch11_7, Triple::AMDGPUSubArch11_7,
+
+Triple::AMDGPUSubArch12, Triple::AMDGPUSubArch12,
+Triple::AMDGPUSubArch12,
+
+Triple::AMDGPUSubArch12_5, Triple::AMDGPUSubArch12_5,
+Triple::AMDGPUSubArch12_5,
+
+Triple::AMDGPUSubArch13, Triple::AMDGPUSubArch13};
+
+Triple::SubArchType AMDGPU::getMajorSubArch(Triple::SubArchType X) {
+ if (X < Triple::FirstAMDGPUSubArch || X > Triple::LastAMDGPUSubArch)
+return Triple::NoSubArch;
+ return AMDGPUMajorFamilies[X - Triple::FirstAMDGPUSubArch];
+}
+
+bool AMDGPU::isSubArchCompatible(Triple::SubArchType A, Triple::SubArchType B)
{
slinder1 wrote:
I'm fine with the original, too, this is more of a nit anyway
https://github.com/llvm/llvm-project/pull/206480
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[Lldb-commits] [clang] [flang] [lld] [lldb] [llvm] AMDGPU: Introduce amdgpu triple arch (PR #206480)
@@ -874,6 +880,24 @@ AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T,
const Triple &TT,
TLOF(createTLOF(getTargetTriple())) {
initAsmInfo();
if (TT.isAMDGCN()) {
+// Triple is missing a representation for non-empty, but unrecognized
slinder1 wrote:
Fair enough!
https://github.com/llvm/llvm-project/pull/206480
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[Lldb-commits] [clang] [flang] [lld] [lldb] [llvm] AMDGPU: Introduce amdgpu triple arch (PR #206480)
@@ -34,9 +34,159 @@ StringRef llvm::AMDGPU::getArchFamilyNameAMDGCN(GPUKind AK)
{
return ArchName.empty() ? "" : ArchName.drop_back(2);
}
+Triple::SubArchType llvm::AMDGPU::getSubArch(GPUKind AK) {
+ switch (AK) {
+#define AMDGCN_GPU(NAME, ENUM, SUBARCH, ISAVERSION, FEATURES)
\
+ case ENUM:
\
+return SUBARCH;
+#include "llvm/TargetParser/AMDGPUTargetParser.def"
+ default:
+return Triple::SubArchType::NoSubArch;
+ }
+}
+
+AMDGPU::GPUKind
+llvm::AMDGPU::getGPUKindFromSubArch(Triple::SubArchType SubArch) {
+ switch (SubArch) {
+#define AMDGCN_GPU(NAME, ENUM, SUBARCH, ISAVERSION, FEATURES)
\
+ case SUBARCH:
\
+return ENUM;
+#include "llvm/TargetParser/AMDGPUTargetParser.def"
+ default:
+return GK_NONE;
+ }
+}
+
+static const Triple::SubArchType
+AMDGPUMajorFamilies[Triple::LastAMDGPUSubArch - Triple::FirstAMDGPUSubArch
+
+1] = {
+Triple::AMDGPUSubArch6,Triple::AMDGPUSubArch6,
+Triple::AMDGPUSubArch6,Triple::AMDGPUSubArch6,
+
+Triple::AMDGPUSubArch7,Triple::AMDGPUSubArch7,
+Triple::AMDGPUSubArch7,Triple::AMDGPUSubArch7,
+Triple::AMDGPUSubArch7,Triple::AMDGPUSubArch7,
+Triple::AMDGPUSubArch7,
+
+Triple::AMDGPUSubArch8,Triple::AMDGPUSubArch8,
+Triple::AMDGPUSubArch8,Triple::AMDGPUSubArch8,
+Triple::AMDGPUSubArch8,
+
+Triple::AMDGPUSubArch810,
+
+Triple::AMDGPUSubArch9,Triple::AMDGPUSubArch9,
+Triple::AMDGPUSubArch9,Triple::AMDGPUSubArch9,
+Triple::AMDGPUSubArch9,Triple::AMDGPUSubArch9,
+Triple::AMDGPUSubArch9,
+
+Triple::AMDGPUSubArch908, Triple::AMDGPUSubArch90A,
+
+Triple::AMDGPUSubArch9_4, Triple::AMDGPUSubArch9_4,
+Triple::AMDGPUSubArch9_4,
+
+Triple::AMDGPUSubArch10_1, Triple::AMDGPUSubArch10_1,
+Triple::AMDGPUSubArch10_1, Triple::AMDGPUSubArch10_1,
+Triple::AMDGPUSubArch10_1,
+
+Triple::AMDGPUSubArch10_3, Triple::AMDGPUSubArch10_3,
+Triple::AMDGPUSubArch10_3, Triple::AMDGPUSubArch10_3,
+Triple::AMDGPUSubArch10_3, Triple::AMDGPUSubArch10_3,
+Triple::AMDGPUSubArch10_3, Triple::AMDGPUSubArch10_3,
+
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+
+Triple::AMDGPUSubArch11_7, Triple::AMDGPUSubArch11_7,
+Triple::AMDGPUSubArch11_7, Triple::AMDGPUSubArch11_7,
+
+Triple::AMDGPUSubArch12, Triple::AMDGPUSubArch12,
+Triple::AMDGPUSubArch12,
+
+Triple::AMDGPUSubArch12_5, Triple::AMDGPUSubArch12_5,
+Triple::AMDGPUSubArch12_5,
+
+Triple::AMDGPUSubArch13, Triple::AMDGPUSubArch13};
+
+Triple::SubArchType AMDGPU::getMajorSubArch(Triple::SubArchType X) {
+ if (X < Triple::FirstAMDGPUSubArch || X > Triple::LastAMDGPUSubArch)
+return Triple::NoSubArch;
+ return AMDGPUMajorFamilies[X - Triple::FirstAMDGPUSubArch];
+}
+
+bool AMDGPU::isSubArchCompatible(Triple::SubArchType A, Triple::SubArchType B)
{
arsenm wrote:
I think this is getting too abstract for too little code savings
https://github.com/llvm/llvm-project/pull/206480
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[Lldb-commits] [clang] [flang] [lld] [lldb] [llvm] AMDGPU: Introduce amdgpu triple arch (PR #206480)
@@ -874,6 +880,24 @@ AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T,
const Triple &TT,
TLOF(createTLOF(getTargetTriple())) {
initAsmInfo();
if (TT.isAMDGCN()) {
+// Triple is missing a representation for non-empty, but unrecognized
arsenm wrote:
Probably, I don't want to do any more triple yak shaving before this
https://github.com/llvm/llvm-project/pull/206480
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[Lldb-commits] [clang] [flang] [lld] [lldb] [llvm] AMDGPU: Introduce amdgpu triple arch (PR #206480)
@@ -49,61 +49,178 @@ LLVM Target Triples -- -Use the Clang option ``--target=---`` -to specify the target triple: +Use the Clang option ``--target=---`` +to specify the target triple. - .. table:: AMDGPU Architectures - :name: amdgpu-architecture-table - - == - Architecture Description - == - ``r600`` AMD GPUs HD2XXX-HD6XXX for graphics and compute shaders. - ``amdgcn`` AMD GPUs GCN GFX6 onwards for graphics and compute shaders. - == - - .. table:: AMDGPU Vendors - :name: amdgpu-vendor-table - - == - Vendor Description - == - ``amd`` Can be used for all AMD GPU usage. - ``mesa`` Can be used if the OS is ``mesa3d``. - == - - .. table:: AMDGPU Operating Systems - :name: amdgpu-os - - == - OS Description - == - ** Defaults to the *unknown* OS. - ``amdhsa`` Compute kernels executed on HSA [HSA]_ compatible runtimes -such as: - -- AMD's ROCm™ runtime [AMD-ROCm]_ using the *rocm-amdhsa* - loader on Linux. See *AMD ROCm Platform Release Notes* - [AMD-ROCm-Release-Notes]_ for supported hardware and - software. -- AMD's PAL runtime using the *pal-amdhsa* loader on - Windows. - - ``amdpal`` Graphic shaders and compute kernels executed on AMD's PAL -runtime using the *pal-amdpal* loader on Windows and Linux -Pro. - ``mesa3d`` Graphic shaders and compute kernels executed on AMD's Mesa -3D runtime using the *mesa-mesa3d* loader on Linux. - == - - .. table:: AMDGPU Environments - :name: amdgpu-environment-table +.. note:: + Historically, the single top-level ``amdgcn`` architecture was used + for all devices and specific devices by the subtarget. It has been + replaced with the ``amdgpu`` architecture combined with a subarch + suffix. The legacy spelling is accepted for accepted for + compatibility. slinder1 wrote: This doesn't read great to me, still. Maybe something like: ```suggestion .. note:: Historically, the single top-level ``amdgcn`` architecture was used for all devices, with specific devices being identified using the subtarget. It has been replaced with the ``amdgpu`` architecture combined with a subarch suffix. The legacy spelling is accepted for compatibility. ``` https://github.com/llvm/llvm-project/pull/206480 ___ lldb-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
[Lldb-commits] [clang] [flang] [lld] [lldb] [llvm] AMDGPU: Introduce amdgpu triple arch (PR #206480)
@@ -240,6 +242,51 @@ StringRef Triple::getArchName(ArchType Kind, SubArchType
SubArch) {
break;
}
break;
+ case Triple::amdgpu: {
+if (SubArch < Triple::FirstAMDGPUSubArch ||
+SubArch > Triple::LastAMDGPUSubArch)
+ break;
+
+static const StringLiteral AMDGPUSubArchNames[Triple::LastAMDGPUSubArch -
slinder1 wrote:
Ditto, and it seems like `DXIL` does use a `switch`
https://github.com/llvm/llvm-project/pull/206480
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[Lldb-commits] [clang] [flang] [lld] [lldb] [llvm] AMDGPU: Introduce amdgpu triple arch (PR #206480)
@@ -34,9 +34,159 @@ StringRef llvm::AMDGPU::getArchFamilyNameAMDGCN(GPUKind AK)
{
return ArchName.empty() ? "" : ArchName.drop_back(2);
}
+Triple::SubArchType llvm::AMDGPU::getSubArch(GPUKind AK) {
+ switch (AK) {
+#define AMDGCN_GPU(NAME, ENUM, SUBARCH, ISAVERSION, FEATURES)
\
+ case ENUM:
\
+return SUBARCH;
+#include "llvm/TargetParser/AMDGPUTargetParser.def"
+ default:
+return Triple::SubArchType::NoSubArch;
+ }
+}
+
+AMDGPU::GPUKind
+llvm::AMDGPU::getGPUKindFromSubArch(Triple::SubArchType SubArch) {
+ switch (SubArch) {
+#define AMDGCN_GPU(NAME, ENUM, SUBARCH, ISAVERSION, FEATURES)
\
+ case SUBARCH:
\
+return ENUM;
+#include "llvm/TargetParser/AMDGPUTargetParser.def"
+ default:
+return GK_NONE;
+ }
+}
+
+static const Triple::SubArchType
+AMDGPUMajorFamilies[Triple::LastAMDGPUSubArch - Triple::FirstAMDGPUSubArch
+
+1] = {
+Triple::AMDGPUSubArch6,Triple::AMDGPUSubArch6,
+Triple::AMDGPUSubArch6,Triple::AMDGPUSubArch6,
+
+Triple::AMDGPUSubArch7,Triple::AMDGPUSubArch7,
+Triple::AMDGPUSubArch7,Triple::AMDGPUSubArch7,
+Triple::AMDGPUSubArch7,Triple::AMDGPUSubArch7,
+Triple::AMDGPUSubArch7,
+
+Triple::AMDGPUSubArch8,Triple::AMDGPUSubArch8,
+Triple::AMDGPUSubArch8,Triple::AMDGPUSubArch8,
+Triple::AMDGPUSubArch8,
+
+Triple::AMDGPUSubArch810,
+
+Triple::AMDGPUSubArch9,Triple::AMDGPUSubArch9,
+Triple::AMDGPUSubArch9,Triple::AMDGPUSubArch9,
+Triple::AMDGPUSubArch9,Triple::AMDGPUSubArch9,
+Triple::AMDGPUSubArch9,
+
+Triple::AMDGPUSubArch908, Triple::AMDGPUSubArch90A,
+
+Triple::AMDGPUSubArch9_4, Triple::AMDGPUSubArch9_4,
+Triple::AMDGPUSubArch9_4,
+
+Triple::AMDGPUSubArch10_1, Triple::AMDGPUSubArch10_1,
+Triple::AMDGPUSubArch10_1, Triple::AMDGPUSubArch10_1,
+Triple::AMDGPUSubArch10_1,
+
+Triple::AMDGPUSubArch10_3, Triple::AMDGPUSubArch10_3,
+Triple::AMDGPUSubArch10_3, Triple::AMDGPUSubArch10_3,
+Triple::AMDGPUSubArch10_3, Triple::AMDGPUSubArch10_3,
+Triple::AMDGPUSubArch10_3, Triple::AMDGPUSubArch10_3,
+
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+
+Triple::AMDGPUSubArch11_7, Triple::AMDGPUSubArch11_7,
+Triple::AMDGPUSubArch11_7, Triple::AMDGPUSubArch11_7,
+
+Triple::AMDGPUSubArch12, Triple::AMDGPUSubArch12,
+Triple::AMDGPUSubArch12,
+
+Triple::AMDGPUSubArch12_5, Triple::AMDGPUSubArch12_5,
+Triple::AMDGPUSubArch12_5,
+
+Triple::AMDGPUSubArch13, Triple::AMDGPUSubArch13};
+
+Triple::SubArchType AMDGPU::getMajorSubArch(Triple::SubArchType X) {
+ if (X < Triple::FirstAMDGPUSubArch || X > Triple::LastAMDGPUSubArch)
+return Triple::NoSubArch;
+ return AMDGPUMajorFamilies[X - Triple::FirstAMDGPUSubArch];
+}
+
+bool AMDGPU::isSubArchCompatible(Triple::SubArchType A, Triple::SubArchType B)
{
+ if (A == B || A == Triple::NoSubArch || B == Triple::NoSubArch)
+return true;
+
+ Triple::SubArchType MajorA = AMDGPU::getMajorSubArch(A);
+ Triple::SubArchType MajorB = AMDGPU::getMajorSubArch(B);
+
+ // One side is the major-family subarch covering the other's family.
+ if (A == MajorA)
+return MajorA == MajorB;
+ if (B == MajorB)
+return MajorA == MajorB;
+
+ return false;
+}
+
+bool AMDGPU::isCPUValidForSubArch(Triple::SubArchType SubArch, GPUKind AK) {
+ // An unrecognized GPU is never valid.
+ if (AK == GK_NONE)
+return false;
+ // A legacy triple without a subarch accepts any known GPU.
+ if (SubArch == Triple::NoSubArch)
+return true;
+ return isSubArchCompatible(getSubArch(AK), SubArch);
+}
+
+bool AMDGPU::isCPUValidForSubArch(Triple::SubArchType SubArch, StringRef CPU) {
+ return isCPUValidForSubArch(SubArch, parseArchAMDGCN(CPU));
+}
+
+bool AMDGPU::isSubArchCompatible(const Triple &A, const Triple &B) {
+ // Tolerate subarch mismatch if one entry is none. This is a hack for bitcode
+ // libraries.
+ // There's a missing enum entry for an unknown subarch. Make sure the
+ // subarch is really empty.
+ if (A.getSubArch() == Triple::NoSubArch)
+return A.getArchName().size() == 6;
+
+ if (B.getSubArch() == Triple::NoSubArch)
+return B.getArchName().size() == 6;
+
+ return isSubArchCompatible(A.getSubArch(), B.getSubArch());
+}
+
+std::string AMDGPU::mergeSubArch(const Triple &A, const Triple &B) {
+ if (A.getSubArch() == Triple::NoSubArch)
+return B.str();
+ if (B.getSubArch() == Tri
[Lldb-commits] [clang] [flang] [lld] [lldb] [llvm] AMDGPU: Introduce amdgpu triple arch (PR #206480)
@@ -34,9 +34,159 @@ StringRef llvm::AMDGPU::getArchFamilyNameAMDGCN(GPUKind AK)
{
return ArchName.empty() ? "" : ArchName.drop_back(2);
}
+Triple::SubArchType llvm::AMDGPU::getSubArch(GPUKind AK) {
+ switch (AK) {
+#define AMDGCN_GPU(NAME, ENUM, SUBARCH, ISAVERSION, FEATURES)
\
+ case ENUM:
\
+return SUBARCH;
+#include "llvm/TargetParser/AMDGPUTargetParser.def"
+ default:
+return Triple::SubArchType::NoSubArch;
+ }
+}
+
+AMDGPU::GPUKind
+llvm::AMDGPU::getGPUKindFromSubArch(Triple::SubArchType SubArch) {
+ switch (SubArch) {
+#define AMDGCN_GPU(NAME, ENUM, SUBARCH, ISAVERSION, FEATURES)
\
+ case SUBARCH:
\
+return ENUM;
+#include "llvm/TargetParser/AMDGPUTargetParser.def"
+ default:
+return GK_NONE;
+ }
+}
+
+static const Triple::SubArchType
slinder1 wrote:
This seems like a bit of a nightmare to maintain, although I guess we will only
be adding on to the end.
I think a `switch` would at least be more immediately digestible
https://github.com/llvm/llvm-project/pull/206480
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[Lldb-commits] [clang] [flang] [lld] [lldb] [llvm] AMDGPU: Introduce amdgpu triple arch (PR #206480)
@@ -873,6 +879,24 @@ AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T,
const Triple &TT,
TLOF(createTLOF(getTargetTriple())) {
initAsmInfo();
if (TT.isAMDGCN()) {
+// Triple is missing a representation for non-empty, but unrecognized
+// subarches. Only permit no subarch for any subtarget if it was really
+// empty.
+bool IsUnknownSubArch =
+TT.getSubArch() == Triple::NoSubArch && TT.getArchName().size() != 6;
+if (IsUnknownSubArch)
+ reportFatalUsageError("unknown subarch " + TT.getArchName());
+
+if (TT.getSubArch() != Triple::NoSubArch) {
+ AMDGPU::GPUKind Kind = AMDGPU::parseArchAMDGCN(CPU);
+ Triple::SubArchType GPUSubArch = AMDGPU::getSubArch(Kind);
+ if (Kind != AMDGPU::GK_NONE && GPUSubArch != TT.getSubArch() &&
+ TT.getSubArch() != AMDGPU::getMajorSubArch(GPUSubArch)) {
slinder1 wrote:
Is that something we can "fix" with the switch to the new architecture? It
would require adding `Legacy` variants of things like `parseArchAMDGCN`, but
then in the "correct" versions we could add `.Case("",
AMDGPU::GPUKind::GK_EMPTY)` or something to differentiate the case?
https://github.com/llvm/llvm-project/pull/206480
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[Lldb-commits] [clang] [flang] [lld] [lldb] [llvm] AMDGPU: Introduce amdgpu triple arch (PR #206480)
@@ -34,9 +34,159 @@ StringRef llvm::AMDGPU::getArchFamilyNameAMDGCN(GPUKind AK)
{
return ArchName.empty() ? "" : ArchName.drop_back(2);
}
+Triple::SubArchType llvm::AMDGPU::getSubArch(GPUKind AK) {
+ switch (AK) {
+#define AMDGCN_GPU(NAME, ENUM, SUBARCH, ISAVERSION, FEATURES)
\
+ case ENUM:
\
+return SUBARCH;
+#include "llvm/TargetParser/AMDGPUTargetParser.def"
+ default:
+return Triple::SubArchType::NoSubArch;
+ }
+}
+
+AMDGPU::GPUKind
+llvm::AMDGPU::getGPUKindFromSubArch(Triple::SubArchType SubArch) {
+ switch (SubArch) {
+#define AMDGCN_GPU(NAME, ENUM, SUBARCH, ISAVERSION, FEATURES)
\
+ case SUBARCH:
\
+return ENUM;
+#include "llvm/TargetParser/AMDGPUTargetParser.def"
+ default:
+return GK_NONE;
+ }
+}
+
+static const Triple::SubArchType
+AMDGPUMajorFamilies[Triple::LastAMDGPUSubArch - Triple::FirstAMDGPUSubArch
+
+1] = {
+Triple::AMDGPUSubArch6,Triple::AMDGPUSubArch6,
+Triple::AMDGPUSubArch6,Triple::AMDGPUSubArch6,
+
+Triple::AMDGPUSubArch7,Triple::AMDGPUSubArch7,
+Triple::AMDGPUSubArch7,Triple::AMDGPUSubArch7,
+Triple::AMDGPUSubArch7,Triple::AMDGPUSubArch7,
+Triple::AMDGPUSubArch7,
+
+Triple::AMDGPUSubArch8,Triple::AMDGPUSubArch8,
+Triple::AMDGPUSubArch8,Triple::AMDGPUSubArch8,
+Triple::AMDGPUSubArch8,
+
+Triple::AMDGPUSubArch810,
+
+Triple::AMDGPUSubArch9,Triple::AMDGPUSubArch9,
+Triple::AMDGPUSubArch9,Triple::AMDGPUSubArch9,
+Triple::AMDGPUSubArch9,Triple::AMDGPUSubArch9,
+Triple::AMDGPUSubArch9,
+
+Triple::AMDGPUSubArch908, Triple::AMDGPUSubArch90A,
+
+Triple::AMDGPUSubArch9_4, Triple::AMDGPUSubArch9_4,
+Triple::AMDGPUSubArch9_4,
+
+Triple::AMDGPUSubArch10_1, Triple::AMDGPUSubArch10_1,
+Triple::AMDGPUSubArch10_1, Triple::AMDGPUSubArch10_1,
+Triple::AMDGPUSubArch10_1,
+
+Triple::AMDGPUSubArch10_3, Triple::AMDGPUSubArch10_3,
+Triple::AMDGPUSubArch10_3, Triple::AMDGPUSubArch10_3,
+Triple::AMDGPUSubArch10_3, Triple::AMDGPUSubArch10_3,
+Triple::AMDGPUSubArch10_3, Triple::AMDGPUSubArch10_3,
+
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+Triple::AMDGPUSubArch11, Triple::AMDGPUSubArch11,
+
+Triple::AMDGPUSubArch11_7, Triple::AMDGPUSubArch11_7,
+Triple::AMDGPUSubArch11_7, Triple::AMDGPUSubArch11_7,
+
+Triple::AMDGPUSubArch12, Triple::AMDGPUSubArch12,
+Triple::AMDGPUSubArch12,
+
+Triple::AMDGPUSubArch12_5, Triple::AMDGPUSubArch12_5,
+Triple::AMDGPUSubArch12_5,
+
+Triple::AMDGPUSubArch13, Triple::AMDGPUSubArch13};
+
+Triple::SubArchType AMDGPU::getMajorSubArch(Triple::SubArchType X) {
+ if (X < Triple::FirstAMDGPUSubArch || X > Triple::LastAMDGPUSubArch)
+return Triple::NoSubArch;
+ return AMDGPUMajorFamilies[X - Triple::FirstAMDGPUSubArch];
+}
+
+bool AMDGPU::isSubArchCompatible(Triple::SubArchType A, Triple::SubArchType B)
{
slinder1 wrote:
Multiple of these functions implement the same logic, with just a few
particulars substituted in. It would be clearer if there was one place the
merge is done and the others are based on it, e.g. (likely with a bunch of
mistakes, can probably make things static, etc.)
```c++
enum class MergeSubArchResult {
A,
B,
Incompatible,
}
MergeSubArchResult AMDGPU::mergeSubArch(Triple::SubArchType A,
Triple::SubArchType B) {
if (A == Triple::NoSubArch)
return MergeSubArchResult::B;
if (B == Triple::NoSubArch)
return MergeSubArchResult::A;
Triple::SubArchType MajorA = AMDGPU::getMajorSubArch(A);
Triple::SubArchType MajorB = AMDGPU::getMajorSubArch(B);
if (MajorA != MajorB)
return MergeSubArchResult::Incompatible;
// With a compatible major arch, return the specific subarch.
if (A == MajorA)
return MergeSubArchResult::B;
return MergeSubArchResult::A;
}
bool AMDGPU::isSubArchCompatible(Triple::SubArchType A, Triple::SubArchType B) {
return mergeSubArch(A, B) != MergeSubArchResult::Incompatible;
}
std::string AMDGPU::mergeSubArch(const Triple &A, const Triple &B) {
switch (mergeSubArch(A.getSubArch(), B.getSubArch()) {
case MergeSubArchResult::A: return A.str();
case MergeSubArchResult::B: return B.str();
case MergeSubArchResult::Incompatible: return B.str(); // ?
}
}
```
https://github.com/llvm/llvm-project/pull/206480
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[Lldb-commits] [clang] [flang] [lld] [lldb] [llvm] AMDGPU: Introduce amdgpu triple arch (PR #206480)
@@ -874,6 +880,24 @@ AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T,
const Triple &TT,
TLOF(createTLOF(getTargetTriple())) {
initAsmInfo();
if (TT.isAMDGCN()) {
+// Triple is missing a representation for non-empty, but unrecognized
slinder1 wrote:
Is it too much churn to expand the representation in Triple itself?
It seems like comparisons against `NoSubArch` for everyone else would just need
to be for `NoSubArch || UnknownSubArch`?
Doesn't have to be done here, but it is a bit unfortunate to have to hack
around it in this way
https://github.com/llvm/llvm-project/pull/206480
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[Lldb-commits] [clang] [flang] [lld] [lldb] [llvm] AMDGPU: Introduce amdgpu triple arch (PR #206480)
@@ -45,6 +195,51 @@ StringRef llvm::AMDGPU::getArchNameAMDGCN(GPUKind AK) {
}
}
+// Canonical GPU name for each AMDGPU subarch, indexed by SubArch -
+// Triple::FirstAMDGPUSubArch.
+static const StringLiteral AMDGPUSubArchNames[Triple::LastAMDGPUSubArch -
slinder1 wrote:
Ditto here, I think a `switch` is more clear
https://github.com/llvm/llvm-project/pull/206480
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[Lldb-commits] [clang] [flang] [lld] [lldb] [llvm] AMDGPU: Introduce amdgpu triple arch (PR #206480)
@@ -6695,9 +6709,22 @@ bool AMDGPUAsmParser::ParseDirectiveISAVersion() {
std::optional MaybeParsed =
AMDGPU::TargetID::parseTargetIDString(TargetIDDirective);
if (!MaybeParsed)
-return Error(getParser().getTok().getLoc(), "malformed target id");
+return Error(getParser().getTok().getLoc(),
+ "malformed target id '" + TargetIDDirective + "'");
const AMDGPU::TargetID &ParsedTargetID = *MaybeParsed;
+ const Triple &TT = getSTI().getTargetTriple();
+
+ // The processor named in the target id must be covered by the triple's
+ // subarch.
+ if (!AMDGPU::isCPUValidForSubArch(TT.getSubArch(),
+ParsedTargetID.getGPUKind())) {
+return Error(getParser().getTok().getLoc(),
slinder1 wrote:
Nit: Maybe not worth factoring it out, but this seems to be the exact error
from ParseDirectiveAMDGCNTarget, just formatted slightly differently
https://github.com/llvm/llvm-project/pull/206480
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