[Lldb-commits] [lldb] [RISCV][LLDB] Add RISC-V Architecture plugin for trap validation (PR #207675)

2026-07-07 Thread Sudharsan Veeravalli via lldb-commits 

https://github.com/svs-quic closed 
https://github.com/llvm/llvm-project/pull/207675
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[Lldb-commits] [lldb] [RISCV][LLDB] Add RISC-V Architecture plugin for trap validation (PR #207675)

2026-07-06 Thread Sudharsan Veeravalli via lldb-commits 

https://github.com/svs-quic updated 
https://github.com/llvm/llvm-project/pull/207675

>From a921acec8a4e4b577066372ce3f8511d66d18bbe Mon Sep 17 00:00:00 2001
From: Sudharsan Veeravalli 
Date: Mon, 6 Jul 2026 12:52:43 +0530
Subject: [PATCH 1/3] [RISCV][LLDB] Add RISC-V Architecture plugin for trap
 validation

---
 .../Plugins/Architecture/CMakeLists.txt   |  1 +
 .../Architecture/RISCV/ArchitectureRISCV.cpp  | 46 +++
 .../Architecture/RISCV/ArchitectureRISCV.h| 36 +
 .../Plugins/Architecture/RISCV/CMakeLists.txt |  7 ++
 lldb/unittests/Architecture/CMakeLists.txt|  1 +
 .../RISCV/ArchitectureRISCVTest.cpp   | 80 +++
 .../Architecture/RISCV/CMakeLists.txt | 11 +++
 lldb/unittests/CMakeLists.txt |  1 +
 8 files changed, 183 insertions(+)
 create mode 100644 lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp
 create mode 100644 lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h
 create mode 100644 lldb/source/Plugins/Architecture/RISCV/CMakeLists.txt
 create mode 100644 lldb/unittests/Architecture/CMakeLists.txt
 create mode 100644 lldb/unittests/Architecture/RISCV/ArchitectureRISCVTest.cpp
 create mode 100644 lldb/unittests/Architecture/RISCV/CMakeLists.txt

diff --git a/lldb/source/Plugins/Architecture/CMakeLists.txt 
b/lldb/source/Plugins/Architecture/CMakeLists.txt
index 0f898ef5116e9..93288ea5841db 100644
--- a/lldb/source/Plugins/Architecture/CMakeLists.txt
+++ b/lldb/source/Plugins/Architecture/CMakeLists.txt
@@ -4,3 +4,4 @@ add_subdirectory(Arm)
 add_subdirectory(Mips)
 add_subdirectory(PPC64)
 add_subdirectory(AArch64)
+add_subdirectory(RISCV)
diff --git a/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp 
b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp
new file mode 100644
index 0..f56a0712981a9
--- /dev/null
+++ b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp
@@ -0,0 +1,46 @@
+//===-- ArchitectureRISCV.cpp 
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "Plugins/Architecture/RISCV/ArchitectureRISCV.h"
+#include "lldb/Core/PluginManager.h"
+#include "lldb/Utility/ArchSpec.h"
+
+#include 
+
+using namespace lldb_private;
+
+LLDB_PLUGIN_DEFINE(ArchitectureRISCV)
+
+void ArchitectureRISCV::Initialize() {
+  PluginManager::RegisterPlugin(GetPluginNameStatic(),
+"RISC-V-specific algorithms",
+&ArchitectureRISCV::Create);
+}
+
+void ArchitectureRISCV::Terminate() {
+  PluginManager::UnregisterPlugin(&ArchitectureRISCV::Create);
+}
+
+std::unique_ptr ArchitectureRISCV::Create(const ArchSpec &arch) {
+  auto machine = arch.GetMachine();
+  if (machine != llvm::Triple::riscv32 && machine != llvm::Triple::riscv64)
+return nullptr;
+  return std::unique_ptr(new ArchitectureRISCV());
+}
+
+bool ArchitectureRISCV::IsValidTrapInstruction(
+llvm::ArrayRef reference, llvm::ArrayRef observed) const 
{
+  // RISC-V has only two trap encodings here: 16-bit C.EBREAK or 32-bit EBREAK.
+  // These instructions don't have any operands so check that the reference and
+  // exact bytes match.
+  if ((reference.size() != 2 && reference.size() != 4) ||
+  reference.size() > observed.size())
+return false;
+
+  return std::equal(reference.begin(), reference.end(), observed.begin());
+}
diff --git a/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h 
b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h
new file mode 100644
index 0..0a97411a25f76
--- /dev/null
+++ b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h
@@ -0,0 +1,36 @@
+//===-- ArchitectureRISCV.h -*- C++ 
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_PLUGINS_ARCHITECTURE_RISCV_ARCHITECTURERISCV_H
+#define LLDB_SOURCE_PLUGINS_ARCHITECTURE_RISCV_ARCHITECTURERISCV_H
+
+#include "lldb/Core/Architecture.h"
+
+namespace lldb_private {
+
+class ArchitectureRISCV : public Architecture {
+public:
+  static llvm::StringRef GetPluginNameStatic() { return "riscv"; }
+  static void Initialize();
+  static void Terminate();
+
+  llvm::StringRef GetPluginName() override { return GetPluginNameStatic(); }
+
+  void OverrideStopInfo(Thread &thread) const override {}
+
+  bool IsValidTrapInstruction(llvm::ArrayRef reference,
+  llvm::ArrayRef observed) const override;
+
+private:

[Lldb-commits] [lldb] [RISCV][LLDB] Add RISC-V Architecture plugin for trap validation (PR #207675)

2026-07-06 Thread Sudharsan Veeravalli via lldb-commits 

svs-quic wrote:

> Does the generic implementation not work fine for RISC-V? I thought you only 
> needed to override it when the instruction had an immediate?

We have this set for RISCV in 
`lldb/source/Host/common/NativeProcessProtocol.cpp`

```
  case llvm::Triple::riscv32:
  case llvm::Triple::riscv64:  
  case llvm::Triple::loongarch32:
  case llvm::Triple::loongarch64:
// On these architectures the PC doesn't get updated for breakpoint hits.
return 0;
```

The test that fails looks like:

```
#include 
int global = 0;
int main() {
  global = 5; // Set a breakpoint here
  puts("");
  __builtin_debugtrap();
  global = 10;
  __builtin_trap();
  global = 15;
  return global;
}
```

When we run in lldb this is what we see:

```
(lldb) b main.c:4
Breakpoint 1: where = dtrap.o`main + 12 at main.c:4:10, address = 0x08048136
(lldb) gdb-remote 1234
(lldb) Process 430709 stopped
* thread #1, stop reason = signal SIGTRAP
   frame #0: 0x08048166 dtrap.o`_start
dtrap.o`_start:
->  0x8048166 <+0>:  auipc  gp, 0x3
0x804816a <+4>:  addi   gp, gp, 0x776
0x804816e <+8>:  auipc  a0, 0xf7fb8
0x8048172 <+12>: addi   a0, a0, -0x16e
c
Process 430709 resuming
(lldb) Process 430709 stopped
* thread #1, stop reason = breakpoint 1.1
   frame #0: 0x08048136 dtrap.o`main at main.c:4:10
   1#include 
   2int global = 0;
   3int main() {
-> 4  global = 5; // Set a breakpoint here
   5  puts("");
   6  __builtin_debugtrap();
   7  global = 10;
c
Process 430709 resuming
(lldb) Process 430709 stopped
* thread #1, stop reason = signal SIGTRAP
   frame #0: 0x08048150 dtrap.o`main at main.c:6:3
   3int main() {
   4  global = 5; // Set a breakpoint here
   5  puts("");
-> 6  __builtin_debugtrap();
   7  global = 10;
   8  __builtin_trap();
   9  global = 15;
dis
dtrap.o`main:
0x804812a <+0>:  addi   sp, sp, -0x10
0x804812c <+2>:  sw ra, 0xc(sp)
0x804812e <+4>:  sw s0, 0x8(sp)
0x8048130 <+6>:  addi   s0, sp, 0x10
0x8048132 <+8>:  li a0, 0x0
0x8048134 <+10>: sw a0, 0x4(sp)
0x8048136 <+12>: auipc  a0, 0x3
0x804813a <+16>: addi   a1, a0, -0x5a
0x804813e <+20>: sw a1, 0x0(sp)
0x8048140 <+22>: li a0, 0x5
0x8048142 <+24>: sw a0, 0x0(a1)
0x8048144 <+26>: auipc  a0, 0x1
0x8048148 <+30>: addi   a0, a0, -0x24
0x804814c <+34>: jal0x80483c0
0x804814e <+36>: lw a0, 0x0(sp)
->  0x8048150 <+38>: ebreak 
0x8048152 <+40>: li a1, 0xa
```

When we continue from here on the SIGTRAP LLDB does not know EBREAK is a valid 
TRAP instruction and so a continue stays on the same instruction:

```
(lldb) c
Process 430709 resuming
(lldb) Process 430709 stopped
* thread #1, stop reason = signal SIGTRAP
   frame #0: 0x08048150 dtrap.o`main at main.c:6:3
   3int main() {
   4  global = 5; // Set a breakpoint here
   5  puts("");
-> 6  __builtin_debugtrap();
   7  global = 10;
   8  __builtin_trap();
   9  global = 15;
dis
dtrap.o`main:
0x804812a <+0>:  addi   sp, sp, -0x10
0x804812c <+2>:  sw ra, 0xc(sp)
0x804812e <+4>:  sw s0, 0x8(sp)
0x8048130 <+6>:  addi   s0, sp, 0x10
0x8048132 <+8>:  li a0, 0x0
0x8048134 <+10>: sw a0, 0x4(sp)
0x8048136 <+12>: auipc  a0, 0x3
0x804813a <+16>: addi   a1, a0, -0x5a
0x804813e <+20>: sw a1, 0x0(sp)
0x8048140 <+22>: li a0, 0x5
0x8048142 <+24>: sw a0, 0x0(a1)
0x8048144 <+26>: auipc  a0, 0x1
0x8048148 <+30>: addi   a0, a0, -0x24
0x804814c <+34>: jal0x80483c0
0x804814e <+36>: lw a0, 0x0(sp)
->  0x8048150 <+38>: ebreak 
0x8048152 <+40>: li a1, 0xa
0x8048154 <+42>: sw a1, 0x0(a0)
```

Hope this helps.



https://github.com/llvm/llvm-project/pull/207675
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[Lldb-commits] [lldb] [RISCV][LLDB] Add RISC-V Architecture plugin for trap validation (PR #207675)

2026-07-06 Thread Sudharsan Veeravalli via lldb-commits 


@@ -0,0 +1,44 @@
+//===-- ArchitectureRISCV.cpp 
-===//

svs-quic wrote:

thanks for pointing to the link. I've made the changes.

https://github.com/llvm/llvm-project/pull/207675
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[Lldb-commits] [lldb] [RISCV][LLDB] Add RISC-V Architecture plugin for trap validation (PR #207675)

2026-07-06 Thread Sudharsan Veeravalli via lldb-commits 


@@ -0,0 +1,44 @@
+//===-- ArchitectureRISCV.cpp 
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "Plugins/Architecture/RISCV/ArchitectureRISCV.h"
+#include "lldb/Core/PluginManager.h"
+#include "lldb/Utility/ArchSpec.h"
+
+using namespace lldb_private;
+
+LLDB_PLUGIN_DEFINE(ArchitectureRISCV)
+
+void ArchitectureRISCV::Initialize() {
+  PluginManager::RegisterPlugin(GetPluginNameStatic(),
+"RISC-V-specific algorithms",
+&ArchitectureRISCV::Create);
+}
+
+void ArchitectureRISCV::Terminate() {
+  PluginManager::UnregisterPlugin(&ArchitectureRISCV::Create);
+}
+
+std::unique_ptr ArchitectureRISCV::Create(const ArchSpec &arch) {
+  auto machine = arch.GetMachine();
+  if (machine != llvm::Triple::riscv32 && machine != llvm::Triple::riscv64)
+return nullptr;
+  return std::unique_ptr(new ArchitectureRISCV());
+}
+
+bool ArchitectureRISCV::IsValidTrapInstruction(
+llvm::ArrayRef reference, llvm::ArrayRef observed) const 
{
+  // RISC-V has only two trap encodings here: 16-bit C.EBREAK or 32-bit EBREAK.
+  // These instructions don't have any operands so check that the reference and
+  // observed bytes  match.

svs-quic wrote:

Done

https://github.com/llvm/llvm-project/pull/207675
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[Lldb-commits] [lldb] [RISCV][LLDB] Add RISC-V Architecture plugin for trap validation (PR #207675)

2026-07-06 Thread Sudharsan Veeravalli via lldb-commits 

https://github.com/svs-quic updated 
https://github.com/llvm/llvm-project/pull/207675

>From a921acec8a4e4b577066372ce3f8511d66d18bbe Mon Sep 17 00:00:00 2001
From: Sudharsan Veeravalli 
Date: Mon, 6 Jul 2026 12:52:43 +0530
Subject: [PATCH 1/3] [RISCV][LLDB] Add RISC-V Architecture plugin for trap
 validation

---
 .../Plugins/Architecture/CMakeLists.txt   |  1 +
 .../Architecture/RISCV/ArchitectureRISCV.cpp  | 46 +++
 .../Architecture/RISCV/ArchitectureRISCV.h| 36 +
 .../Plugins/Architecture/RISCV/CMakeLists.txt |  7 ++
 lldb/unittests/Architecture/CMakeLists.txt|  1 +
 .../RISCV/ArchitectureRISCVTest.cpp   | 80 +++
 .../Architecture/RISCV/CMakeLists.txt | 11 +++
 lldb/unittests/CMakeLists.txt |  1 +
 8 files changed, 183 insertions(+)
 create mode 100644 lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp
 create mode 100644 lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h
 create mode 100644 lldb/source/Plugins/Architecture/RISCV/CMakeLists.txt
 create mode 100644 lldb/unittests/Architecture/CMakeLists.txt
 create mode 100644 lldb/unittests/Architecture/RISCV/ArchitectureRISCVTest.cpp
 create mode 100644 lldb/unittests/Architecture/RISCV/CMakeLists.txt

diff --git a/lldb/source/Plugins/Architecture/CMakeLists.txt 
b/lldb/source/Plugins/Architecture/CMakeLists.txt
index 0f898ef5116e9..93288ea5841db 100644
--- a/lldb/source/Plugins/Architecture/CMakeLists.txt
+++ b/lldb/source/Plugins/Architecture/CMakeLists.txt
@@ -4,3 +4,4 @@ add_subdirectory(Arm)
 add_subdirectory(Mips)
 add_subdirectory(PPC64)
 add_subdirectory(AArch64)
+add_subdirectory(RISCV)
diff --git a/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp 
b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp
new file mode 100644
index 0..f56a0712981a9
--- /dev/null
+++ b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp
@@ -0,0 +1,46 @@
+//===-- ArchitectureRISCV.cpp 
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "Plugins/Architecture/RISCV/ArchitectureRISCV.h"
+#include "lldb/Core/PluginManager.h"
+#include "lldb/Utility/ArchSpec.h"
+
+#include 
+
+using namespace lldb_private;
+
+LLDB_PLUGIN_DEFINE(ArchitectureRISCV)
+
+void ArchitectureRISCV::Initialize() {
+  PluginManager::RegisterPlugin(GetPluginNameStatic(),
+"RISC-V-specific algorithms",
+&ArchitectureRISCV::Create);
+}
+
+void ArchitectureRISCV::Terminate() {
+  PluginManager::UnregisterPlugin(&ArchitectureRISCV::Create);
+}
+
+std::unique_ptr ArchitectureRISCV::Create(const ArchSpec &arch) {
+  auto machine = arch.GetMachine();
+  if (machine != llvm::Triple::riscv32 && machine != llvm::Triple::riscv64)
+return nullptr;
+  return std::unique_ptr(new ArchitectureRISCV());
+}
+
+bool ArchitectureRISCV::IsValidTrapInstruction(
+llvm::ArrayRef reference, llvm::ArrayRef observed) const 
{
+  // RISC-V has only two trap encodings here: 16-bit C.EBREAK or 32-bit EBREAK.
+  // These instructions don't have any operands so check that the reference and
+  // exact bytes match.
+  if ((reference.size() != 2 && reference.size() != 4) ||
+  reference.size() > observed.size())
+return false;
+
+  return std::equal(reference.begin(), reference.end(), observed.begin());
+}
diff --git a/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h 
b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h
new file mode 100644
index 0..0a97411a25f76
--- /dev/null
+++ b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h
@@ -0,0 +1,36 @@
+//===-- ArchitectureRISCV.h -*- C++ 
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_PLUGINS_ARCHITECTURE_RISCV_ARCHITECTURERISCV_H
+#define LLDB_SOURCE_PLUGINS_ARCHITECTURE_RISCV_ARCHITECTURERISCV_H
+
+#include "lldb/Core/Architecture.h"
+
+namespace lldb_private {
+
+class ArchitectureRISCV : public Architecture {
+public:
+  static llvm::StringRef GetPluginNameStatic() { return "riscv"; }
+  static void Initialize();
+  static void Terminate();
+
+  llvm::StringRef GetPluginName() override { return GetPluginNameStatic(); }
+
+  void OverrideStopInfo(Thread &thread) const override {}
+
+  bool IsValidTrapInstruction(llvm::ArrayRef reference,
+  llvm::ArrayRef observed) const override;
+
+private:

[Lldb-commits] [lldb] [RISCV][LLDB] Add RISC-V Architecture plugin for trap validation (PR #207675)

2026-07-06 Thread David Spickett via lldb-commits 

DavidSpickett wrote:

I trust the other reviewers to handle this.

https://github.com/llvm/llvm-project/pull/207675
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[Lldb-commits] [lldb] [RISCV][LLDB] Add RISC-V Architecture plugin for trap validation (PR #207675)

2026-07-06 Thread Sudharsan Veeravalli via lldb-commits 

https://github.com/svs-quic updated 
https://github.com/llvm/llvm-project/pull/207675

>From a921acec8a4e4b577066372ce3f8511d66d18bbe Mon Sep 17 00:00:00 2001
From: Sudharsan Veeravalli 
Date: Mon, 6 Jul 2026 12:52:43 +0530
Subject: [PATCH 1/2] [RISCV][LLDB] Add RISC-V Architecture plugin for trap
 validation

---
 .../Plugins/Architecture/CMakeLists.txt   |  1 +
 .../Architecture/RISCV/ArchitectureRISCV.cpp  | 46 +++
 .../Architecture/RISCV/ArchitectureRISCV.h| 36 +
 .../Plugins/Architecture/RISCV/CMakeLists.txt |  7 ++
 lldb/unittests/Architecture/CMakeLists.txt|  1 +
 .../RISCV/ArchitectureRISCVTest.cpp   | 80 +++
 .../Architecture/RISCV/CMakeLists.txt | 11 +++
 lldb/unittests/CMakeLists.txt |  1 +
 8 files changed, 183 insertions(+)
 create mode 100644 lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp
 create mode 100644 lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h
 create mode 100644 lldb/source/Plugins/Architecture/RISCV/CMakeLists.txt
 create mode 100644 lldb/unittests/Architecture/CMakeLists.txt
 create mode 100644 lldb/unittests/Architecture/RISCV/ArchitectureRISCVTest.cpp
 create mode 100644 lldb/unittests/Architecture/RISCV/CMakeLists.txt

diff --git a/lldb/source/Plugins/Architecture/CMakeLists.txt 
b/lldb/source/Plugins/Architecture/CMakeLists.txt
index 0f898ef5116e9..93288ea5841db 100644
--- a/lldb/source/Plugins/Architecture/CMakeLists.txt
+++ b/lldb/source/Plugins/Architecture/CMakeLists.txt
@@ -4,3 +4,4 @@ add_subdirectory(Arm)
 add_subdirectory(Mips)
 add_subdirectory(PPC64)
 add_subdirectory(AArch64)
+add_subdirectory(RISCV)
diff --git a/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp 
b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp
new file mode 100644
index 0..f56a0712981a9
--- /dev/null
+++ b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp
@@ -0,0 +1,46 @@
+//===-- ArchitectureRISCV.cpp 
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "Plugins/Architecture/RISCV/ArchitectureRISCV.h"
+#include "lldb/Core/PluginManager.h"
+#include "lldb/Utility/ArchSpec.h"
+
+#include 
+
+using namespace lldb_private;
+
+LLDB_PLUGIN_DEFINE(ArchitectureRISCV)
+
+void ArchitectureRISCV::Initialize() {
+  PluginManager::RegisterPlugin(GetPluginNameStatic(),
+"RISC-V-specific algorithms",
+&ArchitectureRISCV::Create);
+}
+
+void ArchitectureRISCV::Terminate() {
+  PluginManager::UnregisterPlugin(&ArchitectureRISCV::Create);
+}
+
+std::unique_ptr ArchitectureRISCV::Create(const ArchSpec &arch) {
+  auto machine = arch.GetMachine();
+  if (machine != llvm::Triple::riscv32 && machine != llvm::Triple::riscv64)
+return nullptr;
+  return std::unique_ptr(new ArchitectureRISCV());
+}
+
+bool ArchitectureRISCV::IsValidTrapInstruction(
+llvm::ArrayRef reference, llvm::ArrayRef observed) const 
{
+  // RISC-V has only two trap encodings here: 16-bit C.EBREAK or 32-bit EBREAK.
+  // These instructions don't have any operands so check that the reference and
+  // exact bytes match.
+  if ((reference.size() != 2 && reference.size() != 4) ||
+  reference.size() > observed.size())
+return false;
+
+  return std::equal(reference.begin(), reference.end(), observed.begin());
+}
diff --git a/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h 
b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h
new file mode 100644
index 0..0a97411a25f76
--- /dev/null
+++ b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h
@@ -0,0 +1,36 @@
+//===-- ArchitectureRISCV.h -*- C++ 
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_PLUGINS_ARCHITECTURE_RISCV_ARCHITECTURERISCV_H
+#define LLDB_SOURCE_PLUGINS_ARCHITECTURE_RISCV_ARCHITECTURERISCV_H
+
+#include "lldb/Core/Architecture.h"
+
+namespace lldb_private {
+
+class ArchitectureRISCV : public Architecture {
+public:
+  static llvm::StringRef GetPluginNameStatic() { return "riscv"; }
+  static void Initialize();
+  static void Terminate();
+
+  llvm::StringRef GetPluginName() override { return GetPluginNameStatic(); }
+
+  void OverrideStopInfo(Thread &thread) const override {}
+
+  bool IsValidTrapInstruction(llvm::ArrayRef reference,
+  llvm::ArrayRef observed) const override;
+
+private:

[Lldb-commits] [lldb] [RISCV][LLDB] Add RISC-V Architecture plugin for trap validation (PR #207675)

2026-07-06 Thread via lldb-commits 

llvmorg-github-actions[bot] wrote:




@llvm/pr-subscribers-lldb

Author: Sudharsan Veeravalli (svs-quic)


Changes

Add a minimal `RISC-V Architecture` plugin and implement 
`IsValidTrapInstruction` for trap opcodes. The plugin recognizes riscv32 and 
riscv64 targets and validates 32-bit `EBREAK` and 16-bit `C.EBREAK`.

On RISC-V, `EBREAK` traps with the PC still pointing at the `EBREAK` 
instruction. A plain continue resumes from that same PC and traps again. This 
issue was found while trying to run the `TestBuiltinDebugTrap` test case 
locally on a `RISC-V QEMU`.

Added a cpp unit test to verify the behaviour of `IsValidTrapInstruction`. I've 
chosen to verify `EBREAK` on `riscv32` and `C.EBREAK` on `riscv64` so that 
there is some coverage for both targets.

Assisted by gpt-5.5

---
Full diff: https://github.com/llvm/llvm-project/pull/207675.diff


8 Files Affected:

- (modified) lldb/source/Plugins/Architecture/CMakeLists.txt (+1) 
- (added) lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp (+46) 
- (added) lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h (+36) 
- (added) lldb/source/Plugins/Architecture/RISCV/CMakeLists.txt (+7) 
- (added) lldb/unittests/Architecture/CMakeLists.txt (+1) 
- (added) lldb/unittests/Architecture/RISCV/ArchitectureRISCVTest.cpp (+80) 
- (added) lldb/unittests/Architecture/RISCV/CMakeLists.txt (+11) 
- (modified) lldb/unittests/CMakeLists.txt (+1) 


``diff
diff --git a/lldb/source/Plugins/Architecture/CMakeLists.txt 
b/lldb/source/Plugins/Architecture/CMakeLists.txt
index 0f898ef5116e9..93288ea5841db 100644
--- a/lldb/source/Plugins/Architecture/CMakeLists.txt
+++ b/lldb/source/Plugins/Architecture/CMakeLists.txt
@@ -4,3 +4,4 @@ add_subdirectory(Arm)
 add_subdirectory(Mips)
 add_subdirectory(PPC64)
 add_subdirectory(AArch64)
+add_subdirectory(RISCV)
diff --git a/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp 
b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp
new file mode 100644
index 0..f56a0712981a9
--- /dev/null
+++ b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp
@@ -0,0 +1,46 @@
+//===-- ArchitectureRISCV.cpp 
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "Plugins/Architecture/RISCV/ArchitectureRISCV.h"
+#include "lldb/Core/PluginManager.h"
+#include "lldb/Utility/ArchSpec.h"
+
+#include 
+
+using namespace lldb_private;
+
+LLDB_PLUGIN_DEFINE(ArchitectureRISCV)
+
+void ArchitectureRISCV::Initialize() {
+  PluginManager::RegisterPlugin(GetPluginNameStatic(),
+"RISC-V-specific algorithms",
+&ArchitectureRISCV::Create);
+}
+
+void ArchitectureRISCV::Terminate() {
+  PluginManager::UnregisterPlugin(&ArchitectureRISCV::Create);
+}
+
+std::unique_ptr ArchitectureRISCV::Create(const ArchSpec &arch) {
+  auto machine = arch.GetMachine();
+  if (machine != llvm::Triple::riscv32 && machine != llvm::Triple::riscv64)
+return nullptr;
+  return std::unique_ptr(new ArchitectureRISCV());
+}
+
+bool ArchitectureRISCV::IsValidTrapInstruction(
+llvm::ArrayRef reference, llvm::ArrayRef observed) const 
{
+  // RISC-V has only two trap encodings here: 16-bit C.EBREAK or 32-bit EBREAK.
+  // These instructions don't have any operands so check that the reference and
+  // exact bytes match.
+  if ((reference.size() != 2 && reference.size() != 4) ||
+  reference.size() > observed.size())
+return false;
+
+  return std::equal(reference.begin(), reference.end(), observed.begin());
+}
diff --git a/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h 
b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h
new file mode 100644
index 0..0a97411a25f76
--- /dev/null
+++ b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h
@@ -0,0 +1,36 @@
+//===-- ArchitectureRISCV.h -*- C++ 
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLDB_SOURCE_PLUGINS_ARCHITECTURE_RISCV_ARCHITECTURERISCV_H
+#define LLDB_SOURCE_PLUGINS_ARCHITECTURE_RISCV_ARCHITECTURERISCV_H
+
+#include "lldb/Core/Architecture.h"
+
+namespace lldb_private {
+
+class ArchitectureRISCV : public Architecture {
+public:
+  static llvm::StringRef GetPluginNameStatic() { return "riscv"; }
+  static void Initialize();
+  static void Terminate();
+
+  llvm::StringRef GetPluginName() override { return GetPluginNameStatic(); }
+
+  void OverrideStopInfo(Th

[Lldb-commits] [lldb] [RISCV][LLDB] Add RISC-V Architecture plugin for trap validation (PR #207675)

2026-07-06 Thread Sudharsan Veeravalli via lldb-commits 

https://github.com/svs-quic created 
https://github.com/llvm/llvm-project/pull/207675

Add a minimal `RISC-V Architecture` plugin and implement 
`IsValidTrapInstruction` for trap opcodes. The plugin recognizes riscv32 and 
riscv64 targets and validates 32-bit `EBREAK` and 16-bit `C.EBREAK`.

On RISC-V, `EBREAK` traps with the PC still pointing at the `EBREAK` 
instruction. A plain continue resumes from that same PC and traps again. This 
issue was found while trying to run the `TestBuiltinDebugTrap` test case 
locally on a `RISC-V QEMU`.

Added a cpp unit test to verify the behaviour of `IsValidTrapInstruction`. I've 
chosen to verify `EBREAK` on `riscv32` and `C.EBREAK` on `riscv64` so that 
there is some coverage for both targets.

Assisted by gpt-5.5

>From a921acec8a4e4b577066372ce3f8511d66d18bbe Mon Sep 17 00:00:00 2001
From: Sudharsan Veeravalli 
Date: Mon, 6 Jul 2026 12:52:43 +0530
Subject: [PATCH] [RISCV][LLDB] Add RISC-V Architecture plugin for trap
 validation

---
 .../Plugins/Architecture/CMakeLists.txt   |  1 +
 .../Architecture/RISCV/ArchitectureRISCV.cpp  | 46 +++
 .../Architecture/RISCV/ArchitectureRISCV.h| 36 +
 .../Plugins/Architecture/RISCV/CMakeLists.txt |  7 ++
 lldb/unittests/Architecture/CMakeLists.txt|  1 +
 .../RISCV/ArchitectureRISCVTest.cpp   | 80 +++
 .../Architecture/RISCV/CMakeLists.txt | 11 +++
 lldb/unittests/CMakeLists.txt |  1 +
 8 files changed, 183 insertions(+)
 create mode 100644 lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp
 create mode 100644 lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h
 create mode 100644 lldb/source/Plugins/Architecture/RISCV/CMakeLists.txt
 create mode 100644 lldb/unittests/Architecture/CMakeLists.txt
 create mode 100644 lldb/unittests/Architecture/RISCV/ArchitectureRISCVTest.cpp
 create mode 100644 lldb/unittests/Architecture/RISCV/CMakeLists.txt

diff --git a/lldb/source/Plugins/Architecture/CMakeLists.txt 
b/lldb/source/Plugins/Architecture/CMakeLists.txt
index 0f898ef5116e9..93288ea5841db 100644
--- a/lldb/source/Plugins/Architecture/CMakeLists.txt
+++ b/lldb/source/Plugins/Architecture/CMakeLists.txt
@@ -4,3 +4,4 @@ add_subdirectory(Arm)
 add_subdirectory(Mips)
 add_subdirectory(PPC64)
 add_subdirectory(AArch64)
+add_subdirectory(RISCV)
diff --git a/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp 
b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp
new file mode 100644
index 0..f56a0712981a9
--- /dev/null
+++ b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp
@@ -0,0 +1,46 @@
+//===-- ArchitectureRISCV.cpp 
-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "Plugins/Architecture/RISCV/ArchitectureRISCV.h"
+#include "lldb/Core/PluginManager.h"
+#include "lldb/Utility/ArchSpec.h"
+
+#include 
+
+using namespace lldb_private;
+
+LLDB_PLUGIN_DEFINE(ArchitectureRISCV)
+
+void ArchitectureRISCV::Initialize() {
+  PluginManager::RegisterPlugin(GetPluginNameStatic(),
+"RISC-V-specific algorithms",
+&ArchitectureRISCV::Create);
+}
+
+void ArchitectureRISCV::Terminate() {
+  PluginManager::UnregisterPlugin(&ArchitectureRISCV::Create);
+}
+
+std::unique_ptr ArchitectureRISCV::Create(const ArchSpec &arch) {
+  auto machine = arch.GetMachine();
+  if (machine != llvm::Triple::riscv32 && machine != llvm::Triple::riscv64)
+return nullptr;
+  return std::unique_ptr(new ArchitectureRISCV());
+}
+
+bool ArchitectureRISCV::IsValidTrapInstruction(
+llvm::ArrayRef reference, llvm::ArrayRef observed) const 
{
+  // RISC-V has only two trap encodings here: 16-bit C.EBREAK or 32-bit EBREAK.
+  // These instructions don't have any operands so check that the reference and
+  // exact bytes match.
+  if ((reference.size() != 2 && reference.size() != 4) ||
+  reference.size() > observed.size())
+return false;
+
+  return std::equal(reference.begin(), reference.end(), observed.begin());
+}
diff --git a/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h 
b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h
new file mode 100644
index 0..0a97411a25f76
--- /dev/null
+++ b/lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h
@@ -0,0 +1,36 @@
+//===-- ArchitectureRISCV.h -*- C++ 
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//