llvmbot wrote:
@llvm/pr-subscribers-clang-format
Author: None (llvmbot)
Changes
Backport 6ca816f88d5f0f2032d1610207023133eaf40a1e
Requested by: @owenca
---
Full diff: https://github.com/llvm/llvm-project/pull/114640.diff
2 Files Affected:
- (modified) clang/lib/Format/UnwrappedLinePar
llvmbot wrote:
@HazardyKnusperkeks What do you think about merging this PR to the release
branch?
https://github.com/llvm/llvm-project/pull/114640
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https://github.com/llvmbot milestoned
https://github.com/llvm/llvm-project/pull/114640
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https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/114640
Backport 6ca816f88d5f0f2032d1610207023133eaf40a1e
Requested by: @owenca
>From 628477ce78cf2460ef3ec075494dcbbb67f8f7c8 Mon Sep 17 00:00:00 2001
From: Owen Pan
Date: Fri, 1 Nov 2024 18:47:50 -0700
Subject: [PAT
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/114438
>From 7181479ee055c0c8d15a674d577a9cd694e21621 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 31 Oct 2024 12:49:07 -0400
Subject: [PATCH] [WIP][AMDGPU][Attributor] Make `AAAMDWavesPerEU` honor
existing
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/114438
>From fe1979082eea45d70ac6b6112f2eb4c4fdb2fa72 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 31 Oct 2024 12:49:07 -0400
Subject: [PATCH] [WIP][AMDGPU][Attributor] Make `AAAMDWavesPerEU` honor
existing
llvmbot wrote:
@llvm/pr-subscribers-bolt
Author: Amir Ayupov (aaupov)
Changes
Reuse secondary entry points vector and include landing pad offsets.
Use LSB to encode LPENTRY bit, similar to BRANCHENTRY bit used to
distinguish branch and block entries in the address map.
Test Plan: updated
https://github.com/aaupov created
https://github.com/llvm/llvm-project/pull/114602
Reuse secondary entry points vector and include landing pad offsets.
Use LSB to encode LPENTRY bit, similar to BRANCHENTRY bit used to
distinguish branch and block entries in the address map.
Test Plan: updated b
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/114577
>From 488643ca48229d9c48d9b28916fd887b8be15205 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 1 Nov 2024 12:39:52 -0400
Subject: [PATCH] [PassBuilder] Add `ThinOrFullLTOPhase` to optimizer pipeline
---
@@ -821,8 +825,15 @@ void
AMDGPUTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
PM.addPass(AMDGPUSwLowerLDSPass(*this));
if (EnableLowerModuleLDS)
PM.addPass(AMDGPULowerModuleLDSPass(*this));
-if (EnableAMDGPUAttributor && Lev
@@ -821,8 +825,15 @@ void
AMDGPUTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
PM.addPass(AMDGPUSwLowerLDSPass(*this));
if (EnableLowerModuleLDS)
PM.addPass(AMDGPULowerModuleLDSPass(*this));
-if (EnableAMDGPUAttributor && Lev
@@ -821,8 +825,15 @@ void
AMDGPUTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
PM.addPass(AMDGPUSwLowerLDSPass(*this));
if (EnableLowerModuleLDS)
PM.addPass(AMDGPULowerModuleLDSPass(*this));
-if (EnableAMDGPUAttributor && Lev
@@ -821,8 +825,15 @@ void
AMDGPUTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
PM.addPass(AMDGPUSwLowerLDSPass(*this));
if (EnableLowerModuleLDS)
PM.addPass(AMDGPULowerModuleLDSPass(*this));
-if (EnableAMDGPUAttributor && Lev
ilovepi wrote:
> Again, LGTM, but lets get another maintainer to take a look before landing.
well, assuming presubmit is working. I see a number of test failures, ATM.
https://github.com/llvm/llvm-project/pull/113816
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https://github.com/ilovepi commented:
Again, LGTM, but lets get another maintainer to take a look before landing.
https://github.com/llvm/llvm-project/pull/113816
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@@ -78,6 +78,79 @@ _start:
adrp x1, :got_auth:zed
add x1, x1, :got_auth_lo12:zed
+#--- ok-tiny.s
+
+# RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux ok-tiny.s -o ok-tiny.o
+
+# RUN: ld.lld ok-tiny.o a.so -pie -o external-tiny
+# RUN: llvm-readelf -r -S -x .got exte
@@ -1355,6 +1355,36 @@ unsigned RelocationScanner::handleTlsRelocation(RelExpr
expr, RelType type,
return 1;
}
+ auto fatalBothAuthAndNonAuth = [&sym]() {
+fatal("both AUTH and non-AUTH TLSDESC entries for '" + sym.getName() +
+ "' requested, but only one
https://github.com/ilovepi commented:
I think this is basically good from my perspective, but I'd like one of the
longtime LLD maintainers, and maybe someone more experienced w/ PAC to chime in
before landing. Maybe @smithp35, @MaskRay, or @kbeyls have some thoughts?
https://github.com/llvm/ll
https://github.com/ilovepi edited
https://github.com/llvm/llvm-project/pull/113817
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@@ -0,0 +1,134 @@
+// REQUIRES: aarch64
+// RUN: rm -rf %t && split-file %s %t && cd %t
+
+//--- a.s
+
+.section .tbss,"awT",@nobits
+.global a
+a:
+.xword 0
+
+//--- ok.s
+
+// RUN: llvm-mc -filetype=obj -triple=aarch64-pc-linux -mattr=+pauth ok.s -o
ok.o
+// RUN: ld.lld -shared
Author: Valentin Clement (バレンタイン クレメン)
Date: 2024-11-01T10:39:56-07:00
New Revision: 704c0b8e429443150ef4b58fc654ef6087f90e03
URL:
https://github.com/llvm/llvm-project/commit/704c0b8e429443150ef4b58fc654ef6087f90e03
DIFF:
https://github.com/llvm/llvm-project/commit/704c0b8e429443150ef4b58fc654e
https://github.com/clementval closed
https://github.com/llvm/llvm-project/pull/114302
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llvmbot wrote:
@llvm/pr-subscribers-clang-codegen
Author: Shilei Tian (shiltian)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/114577.diff
6 Files Affected:
- (modified) clang/lib/CodeGen/BackendUtil.cpp (+12-10)
- (modified) llvm/include/llvm/Passes/PassBuilder.h
https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/114577
None
>From dc94afc308989a4dbaee911f93f1cc1855bd7c55 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 1 Nov 2024 12:39:52 -0400
Subject: [PATCH] [PassBuilder] Add `ThinOrFullLTOPhase` to optimizer pipeline
shiltian wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/114577?utm_source=stack-comment-downstack-mergeability-warning"
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/114547
>From 912283a403e1a3a95ebead98467cc743024b5455 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 1 Nov 2024 10:51:20 -0400
Subject: [PATCH] [PassBuilder] Add `LTOPreLink` to early simplication EP call
back
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/114547
>From 8ae74a4c6a96eb0c44668d571aa61116eaa48cbe Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 1 Nov 2024 10:51:20 -0400
Subject: [PATCH] [PassBuilder] Add `LTOPreLink` to early simplication EP call
back
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/114547
>From e753c4fadf85f1730a458804bec41d32df5a692b Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 1 Nov 2024 10:51:20 -0400
Subject: [PATCH] [PassBuilder] Add `LTOPreLink` to early simplication EP call
back
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/114547
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https://github.com/wangpc-pp edited
https://github.com/llvm/llvm-project/pull/114517
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@@ -424,6 +424,58 @@ AArch64RegisterInfo::explainReservedReg(const
MachineFunction &MF,
return {};
}
+static SmallVector ReservedHi = {
sdesmalen-arm wrote:
I don't think there is a bug; the code for moving an instruction goes through
the list of operands
@@ -999,7 +999,9 @@ class AArch64BtiPac final : public AArch64 {
private:
bool btiHeader; // bti instruction needed in PLT Header and Entry
- bool pacEntry; // autia1716 instruction needed in PLT Entry
+ bool pacEntry; // Authenticated branch needed in PLT Entry
https://github.com/kovdan01 updated
https://github.com/llvm/llvm-project/pull/113945
>From f2daf75b8506e31180f2d41291c6f1a63da5138b Mon Sep 17 00:00:00 2001
From: Daniil Kovalev
Date: Mon, 28 Oct 2024 21:23:54 +0300
Subject: [PATCH 1/2] [PAC][lld] Use braa instr in PAC PLT sequence with valid
https://github.com/kovdan01 updated
https://github.com/llvm/llvm-project/pull/113816
>From 4b1795d57490dbcef1cf7ce17739a0d6023e5cca Mon Sep 17 00:00:00 2001
From: Daniil Kovalev
Date: Fri, 25 Oct 2024 21:28:18 +0300
Subject: [PATCH 1/2] [PAC][lld][AArch64][ELF] Support signed GOT with tiny
cod
https://github.com/kovdan01 updated
https://github.com/llvm/llvm-project/pull/113817
>From d89a47e22f427f8fe989ca24c9289821c8bda09d Mon Sep 17 00:00:00 2001
From: Daniil Kovalev
Date: Fri, 25 Oct 2024 12:32:27 +0300
Subject: [PATCH 1/2] [PAC][lld][AArch64][ELF] Support signed TLSDESC
Support `
https://github.com/kovdan01 edited
https://github.com/llvm/llvm-project/pull/113816
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@@ -78,6 +78,79 @@ _start:
adrp x1, :got_auth:zed
add x1, x1, :got_auth_lo12:zed
+#--- ok-tiny.s
+
+# RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux ok-tiny.s -o ok-tiny.o
+
+# RUN: ld.lld ok-tiny.o a.so -pie -o external-tiny
+# RUN: llvm-readelf -r -S -x .got exte
https://github.com/nikic approved this pull request.
A tentative LGTM. I *think* this particular change is fine, but it's a
dangerous area because all of AA basically does not support pointers of vectors
at all and treats them as escapes. Wouldn't surprise me if this causes a
miscompile.
http
@@ -1355,6 +1355,36 @@ unsigned RelocationScanner::handleTlsRelocation(RelExpr
expr, RelType type,
return 1;
}
+ auto fatalBothAuthAndNonAuth = [&sym]() {
+fatal("both AUTH and non-AUTH TLSDESC entries for '" + sym.getName() +
+ "' requested, but only one
https://github.com/kovdan01 updated
https://github.com/llvm/llvm-project/pull/113812
>From c2ffa88c7b9f8e7a6b12cef59c83b288382c402b Mon Sep 17 00:00:00 2001
From: Daniil Kovalev
Date: Sun, 27 Oct 2024 17:23:17 +0300
Subject: [PATCH] [PAC][CodeGen][ELF][AArch64] Support signed GOT with tiny
cod
@@ -1144,42 +2872,116 @@ entry:
define i32 @memcmp_size_4(ptr %s1, ptr %s2) nounwind {
; CHECK-ALIGNED-RV32-LABEL: memcmp_size_4:
; CHECK-ALIGNED-RV32: # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT:addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT:sw ra, 12(sp) # 4-byte
llvmbot wrote:
@llvm/pr-subscribers-backend-risc-v
Author: Pengcheng Wang (wangpc-pp)
Changes
---
Patch is 404.53 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/114517.diff
4 Files Affected:
- (modified) llvm/lib/Target/RISCV/RISCVISelLowe
https://github.com/wangpc-pp created
https://github.com/llvm/llvm-project/pull/114517
None
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