[llvm-branch-commits] [clang] [llvm] [llvm] Introduce callee_type operand bundle (PR #87573)

2025-03-15 Thread Matt Arsenault via llvm-branch-commits
@@ -105,4 +105,17 @@ declare ptr @objc_retainAutoreleasedReturnValue(ptr) declare ptr @objc_unsafeClaimAutoreleasedReturnValue(ptr) declare void @llvm.assume(i1) +define void @f_type(ptr %ptr) { +; CHECK: Multiple "callee_type" operand bundles +; CHECK-NEXT: call void @g() [ "

[llvm-branch-commits] [clang] release/20.x: [Clang] Do not emit nodiscard warnings for the base expr of static member access (#131450) (PR #131474)

2025-03-15 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-clang Author: None (llvmbot) Changes Backport 9a1e390 Requested by: @cor3ntin --- Full diff: https://github.com/llvm/llvm-project/pull/131474.diff 5 Files Affected: - (modified) clang/include/clang/Sema/Sema.h (-5) - (modified) clang/lib/Sema/SemaE

[llvm-branch-commits] [clang] release/20.x: [Clang] Do not emit nodiscard warnings for the base expr of static member access (#131450) (PR #131474)

2025-03-15 Thread via llvm-branch-commits
https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/131474 Backport 9a1e390 Requested by: @cor3ntin >From e46c31e5a5d2aae2fcfc8d835681fcb58ea4c505 Mon Sep 17 00:00:00 2001 From: cor3ntin Date: Sat, 15 Mar 2025 22:27:08 +0100 Subject: [PATCH] [Clang] Do not emit nodisc

[llvm-branch-commits] [clang] release/20.x: [Clang] Do not emit nodiscard warnings for the base expr of static member access (#131450) (PR #131474)

2025-03-15 Thread via llvm-branch-commits
llvmbot wrote: @shafik What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/131474 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listin

[llvm-branch-commits] [clang] release/20.x: [Clang] Do not emit nodiscard warnings for the base expr of static member access (#131450) (PR #131474)

2025-03-15 Thread via llvm-branch-commits
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/131474 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [Clang][CodeGen] Do not promote if complex divisor is real (PR #131451)

2025-03-15 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-clang Author: Mészáros Gergely (Maetveis) Changes Relates-to: https://github.com/llvm/llvm-project/issues/131129 --- Full diff: https://github.com/llvm/llvm-project/pull/131451.diff 2 Files Affected: - (modified) clang/lib/CodeGen/CGExprComplex.cpp (

[llvm-branch-commits] [compiler-rt] [llvm] [ctxprof] Make ContextRoot an implementation detail (PR #131416)

2025-03-15 Thread Mircea Trofin via llvm-branch-commits
https://github.com/mtrofin updated https://github.com/llvm/llvm-project/pull/131416 >From e6d651d645a5510011f9f90e28e812e5bb46f64f Mon Sep 17 00:00:00 2001 From: Mircea Trofin Date: Thu, 13 Mar 2025 20:46:45 -0700 Subject: [PATCH] [ctxprof] Make ContextRoot an implementation detail --- .../li

[llvm-branch-commits] [clang] release/20.x: [clang] Reject constexpr-unknown values as constant expressions more consistently (PR #130658)

2025-03-15 Thread Shafik Yaghmour via llvm-branch-commits
https://github.com/shafik commented: Thank you for backporting these changes! https://github.com/llvm/llvm-project/pull/130658 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-

[llvm-branch-commits] [clang] [clang] Introduce CallGraphSection option (PR #117037)

2025-03-15 Thread via llvm-branch-commits
https://github.com/Prabhuk updated https://github.com/llvm/llvm-project/pull/117037 >From 6a12be2c5b60a95a06875b0b2c4f14228d1fa882 Mon Sep 17 00:00:00 2001 From: prabhukr Date: Wed, 12 Mar 2025 23:30:01 + Subject: [PATCH] Fix EOF newlines. Created using spr 1.3.6-beta.1 --- clang/test/Dri

[llvm-branch-commits] [clang-tools-extra] [clang-tidy] support pointee mutation check in misc-const-correctness (PR #130494)

2025-03-15 Thread via llvm-branch-commits
@@ -125,6 +132,22 @@ Options // No warning const int *const pointer_variable = &value; +.. option:: WarnPointersAsPointers + + This option enables the suggestion for ``const`` of the value pointing. + Default is `true`. + + Requires 'AnalyzePointers' to be 'true'. -

[llvm-branch-commits] [llvm] AMDGPU: Switch test to generated checks (PR #131315)

2025-03-15 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/131315 >From 1b2648aa5b6f91032e35d53888fa521046c385fd Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 14 Mar 2025 17:04:33 +0700 Subject: [PATCH] AMDGPU: Switch test to generated checks I doubt this is testing

[llvm-branch-commits] [mlir] 07f03ef - Revert "[mlir][xegpu] Add XeGPU subgroup map propagation analysis for XeGPU S…"

2025-03-15 Thread via llvm-branch-commits
Author: Charitha Saumya Date: 2025-03-14T10:32:05-07:00 New Revision: 07f03ef6ab2a35ad904a62a85c45c4f7644d7e75 URL: https://github.com/llvm/llvm-project/commit/07f03ef6ab2a35ad904a62a85c45c4f7644d7e75 DIFF: https://github.com/llvm/llvm-project/commit/07f03ef6ab2a35ad904a62a85c45c4f7644d7e75.dif

[llvm-branch-commits] [llvm] AMDGPU: Replace ptr addrspace(8) undef uses with poison (PR #130904)

2025-03-15 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/130904 >From fa3c82be14f0e94ea7e1a33c167968c7379f2563 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 12 Mar 2025 13:24:50 +0700 Subject: [PATCH] AMDGPU: Replace ptr addrspace(8) undef uses with poison --- ll

[llvm-branch-commits] [clang] [clang][HeuristicResolver] Default argument heuristic for template parameters (PR #131074)

2025-03-15 Thread Nathan Ridge via llvm-branch-commits
https://github.com/HighCommander4 created https://github.com/llvm/llvm-project/pull/131074 Fixes https://github.com/clangd/clangd/discussions/1056 >From 32ca27b5daa8cd1a0a9ad7b60c0ceecebaf9e8b6 Mon Sep 17 00:00:00 2001 From: Nathan Ridge Date: Thu, 13 Mar 2025 01:23:03 -0400 Subject: [PATCH] [

[llvm-branch-commits] [clang] [clang] Introduce CallGraphSection option (PR #117037)

2025-03-15 Thread via llvm-branch-commits
https://github.com/Prabhuk updated https://github.com/llvm/llvm-project/pull/117037 >From 6a12be2c5b60a95a06875b0b2c4f14228d1fa882 Mon Sep 17 00:00:00 2001 From: prabhukr Date: Wed, 12 Mar 2025 23:30:01 + Subject: [PATCH] Fix EOF newlines. Created using spr 1.3.6-beta.1 --- clang/test/Dri

[llvm-branch-commits] [clang] [HLSL][NFC] Use builtin method builder to create default resource constructor (PR #131384)

2025-03-15 Thread Helena Kotas via llvm-branch-commits
https://github.com/hekota edited https://github.com/llvm/llvm-project/pull/131384 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][Legalizer] Widen i16 G_SEXT_INREG (PR #131308)

2025-03-15 Thread Pierre van Houtryve via llvm-branch-commits
https://github.com/Pierre-vh updated https://github.com/llvm/llvm-project/pull/131308 >From e6862b4528d1ed48bbca9e742dd9a96d8777545b Mon Sep 17 00:00:00 2001 From: pvanhout Date: Wed, 5 Mar 2025 13:41:04 +0100 Subject: [PATCH 1/2] [AMDGPU][Legalizer] Widen i16 G_SEXT_INREG It's better to widen

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port BranchRelaxation to NPM (PR #130067)

2025-03-15 Thread Christudasan Devadasan via llvm-branch-commits
@@ -1,5 +1,6 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -verify-machineinstrs -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a --amdgpu-s-branch-bits=5 -run-pass branch-relaxation %s -o - | FileCheck %s +# RUN: llc -verify-machineinstrs -

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIPreEmitPeephole to NPM (PR #130065)

2025-03-15 Thread Christudasan Devadasan via llvm-branch-commits
@@ -1,5 +1,6 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass si-pre-emit-peephole -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s -implicit-check-not=S_SET_GPR_IDX +# RUN: llc -mt

[llvm-branch-commits] [llvm] [AMDGPU] Precommit si-fold-bitmask.mir (PR #131310)

2025-03-15 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Pierre van Houtryve (Pierre-vh) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/131310.diff 1 Files Affected: - (added) llvm/test/CodeGen/AMDGPU/si-fold-bitmasks.mir (+429) ``diff diff --git a/llvm/

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port RemoveLoadsIntoFakeUses to NPM (PR #130068)

2025-03-15 Thread Akshat Oke via llvm-branch-commits
https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130068 >From 49cfcf28f0fce75df19c3a01520aa17ca6825847 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 09:30:37 + Subject: [PATCH] [CodeGen][NPM] Port RemoveLoadsIntoFakeUses to NPM --- .../llvm/

[llvm-branch-commits] [llvm] release/20.x: [ValueTracking] Skip incoming values that are the same as the phi in `isGuaranteedNotToBeUndefOrPoison` (#130111) (PR #130474)

2025-03-15 Thread Nikita Popov via llvm-branch-commits
https://github.com/nikic approved this pull request. https://github.com/llvm/llvm-project/pull/130474 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [NFC][Cloning] Move DebugInfoFinder decl closer to its place of usage (PR #129154)

2025-03-15 Thread Artem Pianykh via llvm-branch-commits
https://github.com/artempyanykh updated https://github.com/llvm/llvm-project/pull/129154 >From 50754266de793fb34b1bed5c0d1d71c5b1e8e828 Mon Sep 17 00:00:00 2001 From: Artem Pianykh Date: Tue, 25 Feb 2025 13:09:23 -0800 Subject: [PATCH] [NFC][Cloning] Move DebugInfoFinder decl closer to its plac

[llvm-branch-commits] [llvm] AMDGPU: Replace unused permlane inputs with poison instead of undef (PR #131288)

2025-03-15 Thread Nuno Lopes via llvm-branch-commits
@@ -1115,7 +1115,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const { case Intrinsic::amdgcn_permlanex16_var: { // Discard vdst_in if it's not going to be read. Value *VDstIn = II.getArgOperand(0); -if (isa(VDstIn)) +if (isa(VDst

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port GCNCreateVOPD to NPM (PR #130059)

2025-03-15 Thread Akshat Oke via llvm-branch-commits
https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130059 >From 78bcc3a3576cc1f0dba5c9feb5ed781a62877ffe Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Mon, 10 Mar 2025 04:31:20 + Subject: [PATCH 1/3] [AMDGPU][NFC] Format GCNCreateVOPD.cpp --- llvm/lib/Target/

[llvm-branch-commits] [clang] Backport: [clang] fix matching of nested template template parameters (PR #130950)

2025-03-15 Thread Mike Lothian via llvm-branch-commits
FireBurn wrote: The template issue I'm seeing bisected to: ``` 28ad8978ee2054298d4198bf10c8cb68730af037 is the first bad commit commit 28ad8978ee2054298d4198bf10c8cb68730af037 Author: Matheus Izvekov Date: Thu Jan 23 20:37:33 2025 -0300 Reland: [clang] unified CWG2398 and P0522 changes;

[llvm-branch-commits] [llvm] [llvm] Extract and propagate indirect call type id (PR #87575)

2025-03-15 Thread via llvm-branch-commits
https://github.com/Prabhuk updated https://github.com/llvm/llvm-project/pull/87575 >From 1a8d810d352fbe84c0521c7614689b60ade693c8 Mon Sep 17 00:00:00 2001 From: Necip Fazil Yildiran Date: Tue, 19 Nov 2024 15:25:34 -0800 Subject: [PATCH 1/4] Fixed the tests and addressed most of the review comm

[llvm-branch-commits] [llvm] [NFC][Cloning] Move DebugInfoFinder decl closer to its place of usage (PR #129154)

2025-03-15 Thread Artem Pianykh via llvm-branch-commits
https://github.com/artempyanykh updated https://github.com/llvm/llvm-project/pull/129154 >From dab28ad0a6c11e2f1c2812feb688dd0c6a562de7 Mon Sep 17 00:00:00 2001 From: Artem Pianykh Date: Tue, 25 Feb 2025 13:09:23 -0800 Subject: [PATCH] [NFC][Cloning] Move DebugInfoFinder decl closer to its plac

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Cleanup AMDGPUPassRegistry.def (PR #130071)

2025-03-15 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Akshat Oke (optimisan) Changes Finishing up AMDGPU specific passes. Only ones remaining are assembly printer, virt reg rewriter and PEI. --- Full diff: https://github.com/llvm/llvm-project/pull/130071.diff 3 Files Affected: -

[llvm-branch-commits] [llvm] release/20.x: [llvm-objcopy] Apply encryptable offset to first segment, not section (#130517) (PR #131398)

2025-03-15 Thread via llvm-branch-commits
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[llvm-branch-commits] [llvm] [CodeGen][NPM] Port StackFrameLayoutAnalysisPass to NPM (PR #130070)

2025-03-15 Thread Akshat Oke via llvm-branch-commits
https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130070 >From 92a1774222ba4f86a8781c4f62253865cc4ed74f Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 10:45:25 + Subject: [PATCH] [CodeGen][NPM] Port StackFrameLayoutAnalysisPass to NPM --- .../

[llvm-branch-commits] [clang] [llvm] release/20.x: [Hexagon] Set the default compilation target to V68 (#125239) (PR #128597)

2025-03-15 Thread Brian Cain via llvm-branch-commits
androm3da wrote: @quic-akaryaki can you fix #127558 on `main` and then cherry-pick it to 20.x? Because we are going to hold this pull req from 20.x until that one is ready. Or at least IMO it doesn't make sense to change the default compiler target without also changing the default for the a

[llvm-branch-commits] [clang] [clang] Introduce CallGraphSection option (PR #117037)

2025-03-15 Thread via llvm-branch-commits
https://github.com/Prabhuk updated https://github.com/llvm/llvm-project/pull/117037 >From 6a12be2c5b60a95a06875b0b2c4f14228d1fa882 Mon Sep 17 00:00:00 2001 From: prabhukr Date: Wed, 12 Mar 2025 23:30:01 + Subject: [PATCH] Fix EOF newlines. Created using spr 1.3.6-beta.1 --- clang/test/Dri

[llvm-branch-commits] [libcxx] [libc++][format] Implements P3107R5 in . (PR #130500)

2025-03-15 Thread Mark de Wever via llvm-branch-commits
https://github.com/mordante updated https://github.com/llvm/llvm-project/pull/130500 >From f3b052aa1bbc633655108e6e3a432c820169d96f Mon Sep 17 00:00:00 2001 From: Mark de Wever Date: Sat, 30 Mar 2024 17:35:56 +0100 Subject: [PATCH] [libc++][format] Implements P3107R5 in . The followup paper P3

[llvm-branch-commits] [llvm] [SeparateConstOffsetFromGEP] Preserve inbounds flag based on ValueTracking (PR #130617)

2025-03-15 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-nvptx Author: Fabian Ritter (ritter-x2a) Changes If we know that the initial GEP was inbounds, and we change it to a sequence of GEPs from the same base pointer where every offset is non-negative, then the new GEPs are inbounds. For SWDEV-516125

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM (PR #130064)

2025-03-15 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm approved this pull request. https://github.com/llvm/llvm-project/pull/130064 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [SeparateConstOffsetFromGEP] Preserve inbounds flag based on ValueTracking (PR #130617)

2025-03-15 Thread Matt Arsenault via llvm-branch-commits
@@ -1079,6 +1081,8 @@ bool SeparateConstOffsetFromGEP::splitGEP(GetElementPtrInst *GEP) { // and the old index if they are not used. RecursivelyDeleteTriviallyDeadInstructions(UserChainTail); RecursivelyDeleteTriviallyDeadInstructions(OldIdx); +

[llvm-branch-commits] [llvm][AsmPrinter] Emit call graph section (PR #87576)

2025-03-15 Thread via llvm-branch-commits
https://github.com/Prabhuk updated https://github.com/llvm/llvm-project/pull/87576 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port XRayInstrumentation to NPM (PR #129865)

2025-03-15 Thread Akshat Oke via llvm-branch-commits
@@ -143,11 +170,43 @@ void XRayInstrumentation::prependRetWithPatchableExit( } } -bool XRayInstrumentation::runOnMachineFunction(MachineFunction &MF) { +PreservedAnalyses +XRayInstrumentationPass::run(MachineFunction &MF, + MachineFunctionAnalys

[llvm-branch-commits] [llvm] [NFC][Cloning] Move DebugInfoFinder decl closer to its place of usage (PR #129154)

2025-03-15 Thread Artem Pianykh via llvm-branch-commits
https://github.com/artempyanykh updated https://github.com/llvm/llvm-project/pull/129154 >From 80ad60fc01005ad4c8331bb97e9848f0ae7c9341 Mon Sep 17 00:00:00 2001 From: Artem Pianykh Date: Tue, 25 Feb 2025 13:09:23 -0800 Subject: [PATCH] [NFC][Cloning] Move DebugInfoFinder decl closer to its plac

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port VirtRegRewriter to NPM (PR #130564)

2025-03-15 Thread Akshat Oke via llvm-branch-commits
https://github.com/optimisan edited https://github.com/llvm/llvm-project/pull/130564 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [flang] [flang][cuda] Convert cuf.shared_memory operation to LLVM ops (PR #131396)

2025-03-15 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-flang-fir-hlfir Author: Valentin Clement (バレンタイン クレメン) (clementval) Changes Convert the operation to `llvm.addressof` operation with `llvm.getelementptr` with the appropriate offset. --- Full diff: https://github.com/llvm/llvm-project/pull/131396.diff

[llvm-branch-commits] [llvm] [NFC][Coro] Use CloneFunctionInto for coroutine cloning instead of CloneFunction (PR #129149)

2025-03-15 Thread Artem Pianykh via llvm-branch-commits
https://github.com/artempyanykh updated https://github.com/llvm/llvm-project/pull/129149 >From aa95bd86b5e80797b53b3915059d06b66cebcf85 Mon Sep 17 00:00:00 2001 From: Artem Pianykh Date: Tue, 25 Feb 2025 12:42:14 -0800 Subject: [PATCH] [NFC][Coro] Use CloneFunctionInto for coroutine cloning in

[llvm-branch-commits] [llvm] [AMDGPU] Precommit si-fold-bitmask.mir (PR #131310)

2025-03-15 Thread Pierre van Houtryve via llvm-branch-commits
Pierre-vh wrote: > We can fold the clamp of the shift amount into the shift instruction during > selection as we know the instruction ignores the high bits. We do that in the > DAG path already. I think it special cases the and & (bitwidth - 1) pattern, > which should form canonically. In prin

[llvm-branch-commits] [clang] [clang][driver] Use rva22u64_v as the default march for Fuchsia targets (PR #131183)

2025-03-15 Thread via llvm-branch-commits
https://github.com/hiraditya approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/131183 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SILateBranchLowering to NPM (PR #130063)

2025-03-15 Thread Akshat Oke via llvm-branch-commits
optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/130063?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port StackFrameLayoutAnalysisPass to NPM (PR #130070)

2025-03-15 Thread Akshat Oke via llvm-branch-commits
https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130070 >From 94618bb78cba09176b39b9d603c0fb9cdb066676 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 10:45:25 + Subject: [PATCH] [CodeGen][NPM] Port StackFrameLayoutAnalysisPass to NPM --- .../

[llvm-branch-commits] [compiler-rt] [llvm] [ctxprof] Make ContextRoot an implementation detail (PR #131416)

2025-03-15 Thread Mircea Trofin via llvm-branch-commits
https://github.com/mtrofin updated https://github.com/llvm/llvm-project/pull/131416 >From e6d651d645a5510011f9f90e28e812e5bb46f64f Mon Sep 17 00:00:00 2001 From: Mircea Trofin Date: Thu, 13 Mar 2025 20:46:45 -0700 Subject: [PATCH] [ctxprof] Make ContextRoot an implementation detail --- .../li

[llvm-branch-commits] [llvm] [AMDGPU] Precommit si-fold-bitmask.mir (PR #131310)

2025-03-15 Thread Pierre van Houtryve via llvm-branch-commits
Pierre-vh wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/131310?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [NFC][Cloning] Remove now unused FindDebugInfoToIdentityMap (PR #129151)

2025-03-15 Thread Artem Pianykh via llvm-branch-commits
https://github.com/artempyanykh updated https://github.com/llvm/llvm-project/pull/129151 >From 8da28defead71eac40108c41aa218c3adf5f3dd6 Mon Sep 17 00:00:00 2001 From: Artem Pianykh Date: Tue, 25 Feb 2025 13:00:47 -0800 Subject: [PATCH] [NFC][Cloning] Remove now unused FindDebugInfoToIdentityMap

[llvm-branch-commits] [clang][CallGraphSection] Type id metadata for indirect calls (PR #117036)

2025-03-15 Thread via llvm-branch-commits
https://github.com/Prabhuk updated https://github.com/llvm/llvm-project/pull/117036 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIMemoryLegalizer to NPM (PR #130060)

2025-03-15 Thread Akshat Oke via llvm-branch-commits
https://github.com/optimisan created https://github.com/llvm/llvm-project/pull/130060 None >From 54641a84426002597f90f780e57575c4d31c6f58 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Wed, 5 Mar 2025 11:06:40 + Subject: [PATCH] [AMDGPU][NPM] Port SIMemoryLegalizer to NPM --- llvm/lib/T

[llvm-branch-commits] [clang] Backport: [clang] fix matching of nested template template parameters (PR #130950)

2025-03-15 Thread Mike Lothian via llvm-branch-commits
FireBurn wrote: Sorry my C++ templating skills aren't good enough to create a reduced example, it should be self contained to that repo - or at least enough to show the error, it shouldn't be using system libraries https://github.com/llvm/llvm-project/pull/130950 __

[llvm-branch-commits] [llvm] [AMDGPU][Legalizer] Widen i16 G_SEXT_INREG (PR #131308)

2025-03-15 Thread Pierre van Houtryve via llvm-branch-commits
Pierre-vh wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/131308?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] AMDGPU: Replace some test i32 undef uses with poison (PR #131092)

2025-03-15 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/131092 >From bebdc38263f50c285f66899f61d1b5ad19f0d48b Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Thu, 13 Mar 2025 14:46:17 +0700 Subject: [PATCH] AMDGPU: Replace some test i32 undef uses with poison --- .../C

[llvm-branch-commits] [llvm] release/20.x: [HEXAGON] Fix hvx-isel for extract_subvector op (#129672) (PR #130215)

2025-03-15 Thread via llvm-branch-commits
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/130215 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][RegBankInfo] Promote scalar i16 and/or/xor to i32 (PR #131306)

2025-03-15 Thread Matt Arsenault via llvm-branch-commits
@@ -2432,6 +2433,29 @@ void AMDGPURegisterBankInfo::applyMappingImpl( return; } +// 16-bit operations are VALU only, but can be promoted to 32-bit SALU. +// Packed 16-bit operations need to be scalarized and promoted. +if (DstTy.getSizeInBits() == 16 && D

[llvm-branch-commits] [llvm] [NFC][Cloning] Replace DIFinder usage in CloneFunctionInto with a MetadataPredicate (PR #129148)

2025-03-15 Thread Artem Pianykh via llvm-branch-commits
https://github.com/artempyanykh updated https://github.com/llvm/llvm-project/pull/129148 >From 66695d8ecc670230dd1621297851d0d0e673ff1a Mon Sep 17 00:00:00 2001 From: Artem Pianykh Date: Tue, 25 Feb 2025 12:07:03 -0800 Subject: [PATCH] [NFC][Cloning] Replace DIFinder usage in CloneFunctionInto

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIMemoryLegalizer to NPM (PR #130060)

2025-03-15 Thread Akshat Oke via llvm-branch-commits
optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/130060?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [libcxx] release/20.x: [libcxx] Add a missing include for __bit_iterator (#127015) (PR #131382)

2025-03-15 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-libcxx Author: None (llvmbot) Changes Backport 672e385 Requested by: @ian-twilightcoder --- Full diff: https://github.com/llvm/llvm-project/pull/131382.diff 1 Files Affected: - (modified) libcxx/include/__vector/vector_bool.h (+1) ``diff

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIInsertHardClauses to NPM (PR #130062)

2025-03-15 Thread Akshat Oke via llvm-branch-commits
optimisan wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/130062?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [AMDGPU][GlobalISel] Combine (sext (trunc (sext_in_reg x))) (PR #131312)

2025-03-15 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Pierre van Houtryve (Pierre-vh) Changes This is a bit of an akward pattern that can come up as a result of legalization and then widening of i16 operations to i32 in RegBankSelect on AMDGPU. This quick combine avoids redundant pat

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port StackFrameLayoutAnalysisPass to NPM (PR #130070)

2025-03-15 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm approved this pull request. https://github.com/llvm/llvm-project/pull/130070 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Port SIPreEmitPeephole to NPM (PR #130065)

2025-03-15 Thread Akshat Oke via llvm-branch-commits
https://github.com/optimisan ready_for_review https://github.com/llvm/llvm-project/pull/130065 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][SIFoldOperands] Fold some redundant bitmasks (PR #131311)

2025-03-15 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Pierre van Houtryve (Pierre-vh) Changes Instructions like shifts only read some of the bits of the shift amount operand, between 4 and 6 bits. If the source operand is being masked, we can just ignore the mask. Effects are minima

[llvm-branch-commits] [llvm] [AMDGPU] Update target helpers & GCNSchedStrategy for dynamic VGPRs (PR #130047)

2025-03-15 Thread Diana Picus via llvm-branch-commits
@@ -1452,6 +1452,16 @@ bool GCNSchedStage::shouldRevertScheduling(unsigned WavesAfter) { if (WavesAfter < DAG.MinOccupancy) return true; + // For dynamic VGPR mode, we don't want to waste any VGPR blocks. + if (ST.isDynamicVGPREnabled()) { rovka wrote

[llvm-branch-commits] [flang] [flang][OpenMP] Use OmpDirectiveSpecification in standalone directives (PR #131163)

2025-03-15 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-flang-openmp @llvm/pr-subscribers-flang-semantics Author: Krzysztof Parzyszek (kparzysz) Changes This uses OmpDirectiveSpecification in the rest of the standalone directives. --- Patch is 38.80 KiB, truncated to 20.00 KiB below, full version: https://

[llvm-branch-commits] [llvm] AMDGPU: Switch scheduler-subrange-crash.ll to generated checks (PR #131316)

2025-03-15 Thread Matt Arsenault via llvm-branch-commits
arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/131316?utm_source=stack-comment-downstack-mergeability-warning";

[llvm-branch-commits] [llvm] [AMDGPU][RegBankCombiner] Add cast_of_cast and constant_fold_cast combines (PR #131307)

2025-03-15 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Pierre van Houtryve (Pierre-vh) Changes We can add a bunch of exts/truncs during RBSelect, we should be able to fold them away afterwards. --- Patch is 184.40 KiB, truncated to 20.00 KiB below, full version: https://github.com/l

[llvm-branch-commits] [llvm] [AMDGPU][NFC] Format GCNCreateVOPD.cpp (PR #130548)

2025-03-15 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Akshat Oke (optimisan) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/130548.diff 1 Files Affected: - (modified) llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp (+9-9) ``diff diff --git a/llvm/lib/Target/

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port PostRAHazardRecognizer to NPM (PR #130066)

2025-03-15 Thread Akshat Oke via llvm-branch-commits
https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/130066 >From 3060681f19ebf8d1ff61f54c7efd679ef6fbb817 Mon Sep 17 00:00:00 2001 From: Akshat Oke Date: Thu, 6 Mar 2025 06:42:54 + Subject: [PATCH] [CodeGen][NPM] Port PostRAHazardRecognizer to NPM --- .../llvm/C

[llvm-branch-commits] [llvm] AMDGPU: Switch scheduler-subrange-crash.ll to generated checks (PR #131316)

2025-03-15 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/131316 >From 9ce83f0ac4d3a856341617f698f5fd3261ca4554 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 14 Mar 2025 18:03:12 +0700 Subject: [PATCH] AMDGPU: Switch scheduler-subrange-crash.ll to generated checks

[llvm-branch-commits] [llvm] AMDGPU: Replace unused update.dpp inputs with poison instead of undef (PR #131287)

2025-03-15 Thread Matt Arsenault via llvm-branch-commits
arsenm wrote: > My concern is that it is not obvious when the semantics allow it, when you > have a plethora of undocumented target intrinsics. I guess the grown-up > solution is to document them properly. Yes, the intrinsics should have the edge cases all specified. I also assume this is why

[llvm-branch-commits] [llvm] [AMDGPU][SIFoldOperands] Fold some redundant bitmasks (PR #131311)

2025-03-15 Thread Pierre van Houtryve via llvm-branch-commits
https://github.com/Pierre-vh ready_for_review https://github.com/llvm/llvm-project/pull/131311 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][GlobalISel] Combine (sext (trunc (sext_in_reg x))) (PR #131312)

2025-03-15 Thread Pierre van Houtryve via llvm-branch-commits
https://github.com/Pierre-vh ready_for_review https://github.com/llvm/llvm-project/pull/131312 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU: Migrate more tests away from undef (PR #131314)

2025-03-15 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-llvm-globalisel Author: Matt Arsenault (arsenm) Changes andorbitset.ll is interesting since it directly depends on the difference between poison and undef. Not sure it's useful to keep the version using poison, I assume none of this code makes it to code

[llvm-branch-commits] [llvm] AMDGPU: Switch simplifydemandedbits-recursion.ll to generated checks (PR #131317)

2025-03-15 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/131317 >From 0bccd4581d72280722f34f28e87682dd27e59c5c Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 14 Mar 2025 18:06:43 +0700 Subject: [PATCH] AMDGPU: Switch simplifydemandedbits-recursion.ll to generated c

[llvm-branch-commits] [llvm] [AMDGPU][GlobalISel] Allow forming s16 U/SBFX pre-regbankselect (PR #131309)

2025-03-15 Thread Pierre van Houtryve via llvm-branch-commits
Pierre-vh wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/131309?utm_source=stack-comment-downstack-mergeability-warning

[llvm-branch-commits] [llvm] [AMDGPU] Precommit si-fold-bitmask.mir (PR #131310)

2025-03-15 Thread Pierre van Houtryve via llvm-branch-commits
https://github.com/Pierre-vh updated https://github.com/llvm/llvm-project/pull/131310 >From fcd5623ccd18100197817f7f4d5a500ca433f8dc Mon Sep 17 00:00:00 2001 From: pvanhout Date: Fri, 14 Mar 2025 10:00:21 +0100 Subject: [PATCH] [AMDGPU] Precommit si-fold-bitmask.mir --- llvm/test/CodeGen/AMDG

[llvm-branch-commits] [clang] [Clang][CodeGen] Do not promote if complex divisor is real (PR #131451)

2025-03-15 Thread Mészáros Gergely via llvm-branch-commits
https://github.com/Maetveis ready_for_review https://github.com/llvm/llvm-project/pull/131451 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][RegBankInfo] Promote scalar i16 and/or/xor to i32 (PR #131306)

2025-03-15 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Pierre van Houtryve (Pierre-vh) Changes See #64591 --- Patch is 72.45 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/131306.diff 5 Files Affected: - (modified) llvm/lib/Target/AMDGP

[llvm-branch-commits] [clang] [Clang][CodeGen] Promote in complex compound divassign (PR #131453)

2025-03-15 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-clang Author: Mészáros Gergely (Maetveis) Changes When `-fcomplex-arithmetic=promoted` is set complex divassign `/=` should promote to a wider type the same way division (without assignment) does. Prior to this change, Smith's algorithm would be used for

[llvm-branch-commits] [clang] [Clang][CodeGen] Promote in complex compound divassign (PR #131453)

2025-03-15 Thread Mészáros Gergely via llvm-branch-commits
https://github.com/Maetveis ready_for_review https://github.com/llvm/llvm-project/pull/131453 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [Clang][CodeGen] Promote in complex compound divassign (PR #131453)

2025-03-15 Thread Mészáros Gergely via llvm-branch-commits
https://github.com/Maetveis created https://github.com/llvm/llvm-project/pull/131453 When `-fcomplex-arithmetic=promoted` is set complex divassign `/=` should promote to a wider type the same way division (without assignment) does. Prior to this change, Smith's algorithm would be used for divass

[llvm-branch-commits] [clang] [Clang][CodeGen] Promote in complex compound divassign (PR #131453)

2025-03-15 Thread Mészáros Gergely via llvm-branch-commits
Maetveis wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/131453?utm_source=stack-comment-downstack-mergeability-warning"

[llvm-branch-commits] [llvm] [NFC][Cloning] Clean up comments in CloneFunctionInto (PR #129153)

2025-03-15 Thread Artem Pianykh via llvm-branch-commits
https://github.com/artempyanykh updated https://github.com/llvm/llvm-project/pull/129153 >From 1335a81fb84b008b42fb35d2c9fa4d1ed38a3081 Mon Sep 17 00:00:00 2001 From: Artem Pianykh Date: Tue, 25 Feb 2025 13:07:40 -0800 Subject: [PATCH] [NFC][Cloning] Clean up comments in CloneFunctionInto Summ

[llvm-branch-commits] [clang] [Clang][CodeGen] Do not promote if complex divisor is real (PR #131451)

2025-03-15 Thread Mészáros Gergely via llvm-branch-commits
Maetveis wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/131451?utm_source=stack-comment-downstack-mergeability-warning"

[llvm-branch-commits] [clang] [Clang][CodeGen] Do not promote if complex divisor is real (PR #131451)

2025-03-15 Thread Mészáros Gergely via llvm-branch-commits
https://github.com/Maetveis created https://github.com/llvm/llvm-project/pull/131451 Relates-to: https://github.com/llvm/llvm-project/issues/131129 From 45e679eba25f309130404fe879d36bb727872b62 Mon Sep 17 00:00:00 2001 From: Gergely Meszaros Date: Sat, 15 Mar 2025 11:54:12 +0100 Subject: [PATC

[llvm-branch-commits] [compiler-rt] [llvm] [ctxprof] Make ContextRoot an implementation detail (PR #131416)

2025-03-15 Thread Mircea Trofin via llvm-branch-commits
https://github.com/mtrofin updated https://github.com/llvm/llvm-project/pull/131416 >From f671b9be95158ad5082a88e4a924c556f5f5e930 Mon Sep 17 00:00:00 2001 From: Mircea Trofin Date: Thu, 13 Mar 2025 20:46:45 -0700 Subject: [PATCH] [ctxprof] Make ContextRoot an implementation detail --- .../li