@@ -0,0 +1,84 @@
+; RUN: opt -S -dxil-translate-metadata < %s | FileCheck %s
+; RUN: opt -S --passes="dxil-pretty-printer" < %s 2>&1 | FileCheck %s
--check-prefix=PRINT
+; RUN: llc %s --filetype=asm -o - < %s 2>&1 | FileCheck %s
--check-prefixes=CHECK,PRINT
+
+target triple = "d
@@ -0,0 +1,84 @@
+; RUN: opt -S -dxil-translate-metadata < %s | FileCheck %s
+; RUN: opt -S --passes="dxil-pretty-printer" < %s 2>&1 | FileCheck %s
--check-prefix=PRINT
+; RUN: llc %s --filetype=asm -o - < %s 2>&1 | FileCheck %s
--check-prefixes=CHECK,PRINT
+
+target triple = "d
https://github.com/hekota approved this pull request.
LGTM!
https://github.com/llvm/llvm-project/pull/160957
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https://github.com/llvm/llvm-project/pull/160485
>From b049f4ae5a64c12116b44dd35065e30983965f51 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 24 Sep 2025 19:06:39 +0900
Subject: [PATCH] Greedy: Merge VirtRegMap queries into one use (NFC)
---
llvm/l
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/160484
>From 5e1d9bbb70573ae0dba49769638b977895f4385e Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 24 Sep 2025 19:02:49 +0900
Subject: [PATCH] Greedy: Move physreg check when trying to recolor vregs (NFC)
I
https://github.com/melver updated
https://github.com/llvm/llvm-project/pull/156842
>From 48227c8f7712b2dc807b252d18353c91905b1fb5 Mon Sep 17 00:00:00 2001
From: Marco Elver
Date: Mon, 8 Sep 2025 17:19:04 +0200
Subject: [PATCH] fixup!
Created using spr 1.3.8-beta.1
---
llvm/lib/Transforms/Inst
https://github.com/atrosinenko created
https://github.com/llvm/llvm-project/pull/160900
Refactor emitPtrauthDiscriminator function: introduce `isPtrauthRegSafe`
function, update the comments and assertions for readability.
>From 9d7322653d8b992fd40305a06ff9a60435a9a999 Mon Sep 17 00:00:00 2001
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/160486
>From 35d5c37667cfebc6208a2f7d274f85e60675f661 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 24 Sep 2025 19:14:06 +0900
Subject: [PATCH] Greedy: Use initializer list for recoloring candidates (NFC)
--
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/160467
>From ab5210369e2999663044dbabd34491daf75f53b1 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 24 Sep 2025 16:53:33 +0900
Subject: [PATCH] Greedy: Take hints from copy to physical subreg
Previously this
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/160484
>From 5e1d9bbb70573ae0dba49769638b977895f4385e Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 24 Sep 2025 19:02:49 +0900
Subject: [PATCH] Greedy: Move physreg check when trying to recolor vregs (NFC)
I
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/160486
>From 35d5c37667cfebc6208a2f7d274f85e60675f661 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 24 Sep 2025 19:14:06 +0900
Subject: [PATCH] Greedy: Use initializer list for recoloring candidates (NFC)
--
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/160467
>From ab5210369e2999663044dbabd34491daf75f53b1 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 24 Sep 2025 16:53:33 +0900
Subject: [PATCH] Greedy: Take hints from copy to physical subreg
Previously this
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/160485
>From b049f4ae5a64c12116b44dd35065e30983965f51 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 24 Sep 2025 19:06:39 +0900
Subject: [PATCH] Greedy: Merge VirtRegMap queries into one use (NFC)
---
llvm/l
https://github.com/melver updated
https://github.com/llvm/llvm-project/pull/156839
>From b3653330c2c39ebaa094670f11afb0f9d36b9de2 Mon Sep 17 00:00:00 2001
From: Marco Elver
Date: Thu, 4 Sep 2025 12:07:26 +0200
Subject: [PATCH] fixup! Insert AllocToken into index.rst
Created using spr 1.3.8-bet
https://github.com/melver updated
https://github.com/llvm/llvm-project/pull/156840
>From 14c75441e84aa32e4f5876598b9a2c59d4ecbe65 Mon Sep 17 00:00:00 2001
From: Marco Elver
Date: Mon, 8 Sep 2025 21:32:21 +0200
Subject: [PATCH 1/2] fixup! fix for incomplete types
Created using spr 1.3.8-beta.1
https://github.com/arichardson updated
https://github.com/llvm/llvm-project/pull/105735
>From e4bd1181d160b8728e7d4158417a83e183bd1709 Mon Sep 17 00:00:00 2001
From: Alex Richardson
Date: Thu, 22 Aug 2024 14:36:04 -0700
Subject: [PATCH 01/10] fix indentation in langref
Created using spr 1.3.6-
https://github.com/boomanaiden154 updated
https://github.com/llvm/llvm-project/pull/160028
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https://github.com/bogner created
https://github.com/llvm/llvm-project/pull/160957
This introduces the `dx.Padding` type as an alternative to the `dx.Layout`
types that are currently used for cbuffers. Later, we'll remove the `dx.Layout`
types completely, but making the backend handle either m
https://github.com/melver updated
https://github.com/llvm/llvm-project/pull/156840
>From 14c75441e84aa32e4f5876598b9a2c59d4ecbe65 Mon Sep 17 00:00:00 2001
From: Marco Elver
Date: Mon, 8 Sep 2025 21:32:21 +0200
Subject: [PATCH 1/2] fixup! fix for incomplete types
Created using spr 1.3.8-beta.1
llvmbot wrote:
@llvm/pr-subscribers-backend-directx
Author: Justin Bogner (bogner)
Changes
This introduces the `dx.Padding` type as an alternative to the `dx.Layout`
types that are currently used for cbuffers. Later, we'll remove the `dx.Layout`
types completely, but making the backend h
@@ -183,12 +201,20 @@ class TypeHashMode : public ModeBase {
using ModeBase::ModeBase;
uint64_t operator()(const CallBase &CB, OptimizationRemarkEmitter &ORE) {
+const auto [N, H] = getHash(CB, ORE);
+return N ? boundedToken(H) : H;
+ }
+
+protected:
+ std::pair
https://github.com/mizvekov updated
https://github.com/llvm/llvm-project/pull/160777
>From 1160542a693e22cc81c719e371d1b6282ecc3800 Mon Sep 17 00:00:00 2001
From: Matheus Izvekov
Date: Wed, 24 Sep 2025 17:18:41 -0300
Subject: [PATCH] [clang] fix transformation of subst constant template
parame
https://github.com/mtrofin converted_to_draft
https://github.com/llvm/llvm-project/pull/160629
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>From 14c75441e84aa32e4f5876598b9a2c59d4ecbe65 Mon Sep 17 00:00:00 2001
From: Marco Elver
Date: Mon, 8 Sep 2025 21:32:21 +0200
Subject: [PATCH 1/2] fixup! fix for incomplete types
Created using spr 1.3.8-beta.1
Author: cmtice
Date: 2025-09-26T13:43:48-07:00
New Revision: 82903acbcb8fa521594c6c3b0efa3331dcc0abb0
URL:
https://github.com/llvm/llvm-project/commit/82903acbcb8fa521594c6c3b0efa3331dcc0abb0
DIFF:
https://github.com/llvm/llvm-project/commit/82903acbcb8fa521594c6c3b0efa3331dcc0abb0.diff
LOG: R
https://github.com/melver updated
https://github.com/llvm/llvm-project/pull/156842
>From 48227c8f7712b2dc807b252d18353c91905b1fb5 Mon Sep 17 00:00:00 2001
From: Marco Elver
Date: Mon, 8 Sep 2025 17:19:04 +0200
Subject: [PATCH] fixup!
Created using spr 1.3.8-beta.1
---
llvm/lib/Transforms/Inst
https://github.com/melver updated
https://github.com/llvm/llvm-project/pull/156839
>From b3653330c2c39ebaa094670f11afb0f9d36b9de2 Mon Sep 17 00:00:00 2001
From: Marco Elver
Date: Thu, 4 Sep 2025 12:07:26 +0200
Subject: [PATCH] fixup! Insert AllocToken into index.rst
Created using spr 1.3.8-bet
https://github.com/melver updated
https://github.com/llvm/llvm-project/pull/160131
>From 8bd83ce9eeb447edb7b0d983a85c8ab50c323a37 Mon Sep 17 00:00:00 2001
From: Marco Elver
Date: Mon, 22 Sep 2025 17:34:08 +0200
Subject: [PATCH 1/2] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=
=?UTF-
https://github.com/nikic commented:
The test says:
```llvm
; Don't crash processing degenerate metadata.
define void @or_icmps_empty_metadata(i32 %x, i32 %y, ptr %p) {
```
So I believe the intention here is specifically to test this degenerate
situation of 0, 0 branch weights.
Possibly these s
@@ -113,7 +113,7 @@ using Bar = Foo; // expected-note {{candidate
template ignored: co
// expected-note {{implicit deduction guide
declared as 'template requires __is_deducible(test9::Bar,
test9::Foo) Bar(test9::Foo) -> test9::Foo'}} \
Author: Petr Hosek
Date: 2025-09-26T12:19:01-07:00
New Revision: b88459a993fe36f9ac31d8736711ca039394d667
URL:
https://github.com/llvm/llvm-project/commit/b88459a993fe36f9ac31d8736711ca039394d667
DIFF:
https://github.com/llvm/llvm-project/commit/b88459a993fe36f9ac31d8736711ca039394d667.diff
LO
https://github.com/melver updated
https://github.com/llvm/llvm-project/pull/156839
>From b3653330c2c39ebaa094670f11afb0f9d36b9de2 Mon Sep 17 00:00:00 2001
From: Marco Elver
Date: Thu, 4 Sep 2025 12:07:26 +0200
Subject: [PATCH] fixup! Insert AllocToken into index.rst
Created using spr 1.3.8-bet
https://github.com/melver updated
https://github.com/llvm/llvm-project/pull/156842
>From 48227c8f7712b2dc807b252d18353c91905b1fb5 Mon Sep 17 00:00:00 2001
From: Marco Elver
Date: Mon, 8 Sep 2025 17:19:04 +0200
Subject: [PATCH] fixup!
Created using spr 1.3.8-beta.1
---
llvm/lib/Transforms/Inst
https://github.com/melver updated
https://github.com/llvm/llvm-project/pull/156841
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>From 14c75441e84aa32e4f5876598b9a2c59d4ecbe65 Mon Sep 17 00:00:00 2001
From: Marco Elver
Date: Mon, 8 Sep 2025 21:32:21 +0200
Subject: [PATCH 1/2] fixup! fix for incomplete types
Created using spr 1.3.8-beta.1
Author: joaosaffran
Date: 2025-09-26T12:00:50-04:00
New Revision: ac34c5a7f113faf0cb8e1e05aea939a603b3412a
URL:
https://github.com/llvm/llvm-project/commit/ac34c5a7f113faf0cb8e1e05aea939a603b3412a
DIFF:
https://github.com/llvm/llvm-project/commit/ac34c5a7f113faf0cb8e1e05aea939a603b3412a.diff
L
@@ -212,7 +212,7 @@ MDNode *MetadataBuilder::BuildStaticSampler(const
StaticSampler &Sampler) {
ConstantAsMetadata::get(Builder.getInt32(Sampler.Space)),
ConstantAsMetadata::get(
Builder.getInt32(to_underlying(Sampler.Visibility))),
- };
+ ConstantA
@@ -3524,7 +3524,13 @@
tryToMatchAndCreateMulAccumulateReduction(VPReductionRecipe *Red,
};
VPValue *VecOp = Red->getVecOp();
+ VPValue *Sub = nullptr;
sdesmalen-arm wrote:
nit: Is it worth making `Sub` a `VPRecipeBase`? (since that's the only use-case
https://github.com/sdesmalen-arm approved this pull request.
LGTM with nits addressed
https://github.com/llvm/llvm-project/pull/160154
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@@ -3524,7 +3524,13 @@
tryToMatchAndCreateMulAccumulateReduction(VPReductionRecipe *Red,
};
VPValue *VecOp = Red->getVecOp();
+ VPValue *Sub = nullptr;
VPValue *A, *B;
+ // Sub reductions could have a sub between the add reduction and vec op.
+ if (match(VecOp, m_Bi
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/160486
>From 757179588b9274b1a7ce65885d6ce7b9f79db150 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 24 Sep 2025 19:14:06 +0900
Subject: [PATCH] Greedy: Use initializer list for recoloring candidates (NFC)
--
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff origin/main HEAD --extensions cpp,h --
llvm/lib/CodeGen/RegAllocGreedy.cpp llvm/lib/C
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/160154
>From 1e26f885620a00e9733102c36dd626552cb9dda5 Mon Sep 17 00:00:00 2001
From: Sam Tebbs
Date: Mon, 22 Sep 2025 17:16:40 +0100
Subject: [PATCH 1/7] [LV] Add ExtNegatedMulAccReduction expression type
This PR a
llvmbot wrote:
@llvm/pr-subscribers-backend-directx
Author: None (joaosaffran)
Changes
Reverts llvm/llvm-project#153287
---
Full diff: https://github.com/llvm/llvm-project/pull/160917.diff
6 Files Affected:
- (modified) llvm/lib/Target/DirectX/DXILPostOptimizationValidation.cpp
(+12-6
https://github.com/joaosaffran closed
https://github.com/llvm/llvm-project/pull/160917
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https://github.com/joaosaffran created
https://github.com/llvm/llvm-project/pull/160917
Reverts llvm/llvm-project#153287
>From ac34c5a7f113faf0cb8e1e05aea939a603b3412a Mon Sep 17 00:00:00 2001
From: joaosaffran
Date: Fri, 26 Sep 2025 12:00:50 -0400
Subject: [PATCH] Revert "[DirectX] Validating
https://github.com/joaosaffran closed
https://github.com/llvm/llvm-project/pull/153287
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mizvekov wrote:
> Give others some time with this, but I think we need to do a better job with
> figuring out what that diagnostic is trying to say, vs leaving empty quotes.
Yes, pre-existing, the file is riddled with those. It's just that the template
parameters are anonymous, it's not a thin
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/160467
>From f409ccc1223fc7965f52e522d260295cb6053e4f Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 24 Sep 2025 16:53:33 +0900
Subject: [PATCH 1/2] Greedy: Take hints from copy to physical subreg
Previously
llvmbot wrote:
@llvm/pr-subscribers-backend-aarch64
Author: Anatoly Trosinenko (atrosinenko)
Changes
Refactor emitPtrauthDiscriminator function: introduce `isPtrauthRegSafe`
function, update the comments and assertions for readability.
---
Full diff: https://github.com/llvm/llvm-project/p
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/160467
>From f409ccc1223fc7965f52e522d260295cb6053e4f Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 24 Sep 2025 16:53:33 +0900
Subject: [PATCH 1/2] Greedy: Take hints from copy to physical subreg
Previously
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/160484
>From f588d48f0e41e7c28bd5f5ff9f7c8c673f9310b2 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 24 Sep 2025 19:02:49 +0900
Subject: [PATCH] Greedy: Move physreg check when trying to recolor vregs (NFC)
I
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/160485
>From b9629d1bf8fe6609b443438f2f62305f7f30dd8d Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 24 Sep 2025 19:06:39 +0900
Subject: [PATCH] Greedy: Merge VirtRegMap queries into one use (NFC)
---
llvm/l
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/160485
>From b9629d1bf8fe6609b443438f2f62305f7f30dd8d Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 24 Sep 2025 19:06:39 +0900
Subject: [PATCH] Greedy: Merge VirtRegMap queries into one use (NFC)
---
llvm/l
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/160484
>From f588d48f0e41e7c28bd5f5ff9f7c8c673f9310b2 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Wed, 24 Sep 2025 19:02:49 +0900
Subject: [PATCH] Greedy: Move physreg check when trying to recolor vregs (NFC)
I
@@ -2861,12 +2861,17 @@ InstructionCost
VPExpressionRecipe::computeCost(ElementCount VF,
return Ctx.TTI.getMulAccReductionCost(false, Opcode, RedTy, SrcVecTy,
Ctx.CostKind);
- case ExpressionTypes::ExtMulAccReduction:
+ case Exp
atrosinenko wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/160901?utm_source=stack-comment-downstack-mergeability-warni
jtb20 wrote:
> clang unit tests (parsing, sema, codegen) are required. Also, need to update
> OpenMP.rst and ReleseNotes docs
I added a couple of tests, but forgot about the docs. I'll push again in a
bit...
https://github.com/llvm/llvm-project/pull/159774
https://github.com/tblah closed https://github.com/llvm/llvm-project/pull/155810
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https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/160154
>From 1e26f885620a00e9733102c36dd626552cb9dda5 Mon Sep 17 00:00:00 2001
From: Sam Tebbs
Date: Mon, 22 Sep 2025 17:16:40 +0100
Subject: [PATCH 1/6] [LV] Add ExtNegatedMulAccReduction expression type
This PR a
https://github.com/atrosinenko ready_for_review
https://github.com/llvm/llvm-project/pull/160900
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@@ -5954,6 +5976,48 @@ void CGOpenMPRuntime::emitTaskwaitCall(CodeGenFunction
&CGF, SourceLocation Loc,
Region->emitUntiedSwitch(CGF);
}
+void CGOpenMPRuntime::emitTaskgraphCall(CodeGenFunction &CGF,
+SourceLocation Loc,
+
https://github.com/jtb20 updated
https://github.com/llvm/llvm-project/pull/159774
>From 56dc3e12256472425106c8b059bdc6dfad6c4fdd Mon Sep 17 00:00:00 2001
From: Julian Brown
Date: Mon, 15 Sep 2025 05:25:55 -0500
Subject: [PATCH 1/3] [OpenMP] Taskgraph frontend support
This is a version of the '
Author: Philip Reames
Date: 2025-09-26T07:55:18-07:00
New Revision: 22e10bb12cab65673e7259c63f322208761a0da6
URL:
https://github.com/llvm/llvm-project/commit/22e10bb12cab65673e7259c63f322208761a0da6
DIFF:
https://github.com/llvm/llvm-project/commit/22e10bb12cab65673e7259c63f322208761a0da6.diff
https://github.com/jdenny-ornl updated
https://github.com/llvm/llvm-project/pull/159163
>From 5a9959313c0aebc1c707d19e30055cb925be7760 Mon Sep 17 00:00:00 2001
From: "Joel E. Denny"
Date: Tue, 16 Sep 2025 16:03:11 -0400
Subject: [PATCH 1/5] [LoopUnroll] Fix block frequencies for epilogue
As an
https://github.com/llvmbot milestoned
https://github.com/llvm/llvm-project/pull/160680
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@@ -0,0 +1,157 @@
+// RUN: %clang_cc1-fsanitize=alloc-token -falloc-token-max=2147483647
-triple x86_64-linux-gnu -std=c++20 -fexceptions -fcxx-exceptions -emit-llvm %s
-o - | FileCheck %s
+// RUN: %clang_cc1 -O -fsanitize=alloc-token -falloc-token-max=2147483647
-triple x8
@@ -3012,6 +3018,11 @@ class VPExpressionRecipe : public VPSingleDefRecipe {
VPWidenRecipe *Mul, VPReductionRecipe *Red)
: VPExpressionRecipe(ExpressionTypes::ExtMulAccReduction,
{Ext0, Ext1, Mul, Red}) {}
+ VPExpressionRec
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/160154
>From 1e26f885620a00e9733102c36dd626552cb9dda5 Mon Sep 17 00:00:00 2001
From: Sam Tebbs
Date: Mon, 22 Sep 2025 17:16:40 +0100
Subject: [PATCH 1/5] [LV] Add ExtNegatedMulAccReduction expression type
This PR a
@@ -113,7 +113,7 @@ using Bar = Foo; // expected-note {{candidate
template ignored: co
// expected-note {{implicit deduction guide
declared as 'template requires __is_deducible(test9::Bar,
test9::Foo) Bar(test9::Foo) -> test9::Foo'}} \
https://github.com/zhaoqi5 updated
https://github.com/llvm/llvm-project/pull/160857
>From f8c413dcb8cb641d94770df48eff80e6dd8a21fb Mon Sep 17 00:00:00 2001
From: Qi Zhao
Date: Fri, 26 Sep 2025 19:07:22 +0800
Subject: [PATCH 1/2] [LoongArch] Custom legalize vector_shuffle to
`xvinsve0.{w/d}` wh
https://github.com/zhaoqi5 updated
https://github.com/llvm/llvm-project/pull/160857
>From 9e5c32ebd39d726dadee02aa47659fa7b2b2053d Mon Sep 17 00:00:00 2001
From: Qi Zhao
Date: Fri, 26 Sep 2025 19:07:22 +0800
Subject: [PATCH 1/2] [LoongArch] Custom legalize vector_shuffle to
`xvinsve0.{w/d}` wh
Author: Derek Schuff
Date: 2025-09-24T09:22:03-07:00
New Revision: 9119e5cb91a81ec07a84dca19b88960f501b46e7
URL:
https://github.com/llvm/llvm-project/commit/9119e5cb91a81ec07a84dca19b88960f501b46e7
DIFF:
https://github.com/llvm/llvm-project/commit/9119e5cb91a81ec07a84dca19b88960f501b46e7.diff
https://github.com/cjacek approved this pull request.
https://github.com/llvm/llvm-project/pull/160770
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llvmbot wrote:
@llvm/pr-subscribers-backend-loongarch
Author: ZhaoQi (zhaoqi5)
Changes
---
Patch is 39.04 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/160857.diff
4 Files Affected:
- (modified) llvm/lib/Target/LoongArch/LoongArchISelLowe
https://github.com/zhaoqi5 created
https://github.com/llvm/llvm-project/pull/160857
None
>From f0b8917ccc6109e64d16f2bc4966f2696843b5e7 Mon Sep 17 00:00:00 2001
From: Qi Zhao
Date: Fri, 26 Sep 2025 19:07:22 +0800
Subject: [PATCH] [LoongArch] Custom legalize vector_shuffle to
`xvinsve0.{w/d}`
@@ -0,0 +1,469 @@
+//===- AllocToken.cpp - Allocation token instrumentation
--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
https://github.com/tblah approved this pull request.
LGTM, thanks
https://github.com/llvm/llvm-project/pull/160298
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@@ -0,0 +1,31 @@
+! This test checks lowering of the OpenMP tile directive
+! It is done 3 times corresponding to every possible fraction of the last
+! iteration before passing beyond UB.
+
+! RUN: %flang %flags %openmp_flags -fopenmp-version=51 -DUB=16 %s -o
%t-ub16.exe
---
https://github.com/tblah approved this pull request.
Looks great!
https://github.com/llvm/llvm-project/pull/160292
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@@ -403,6 +403,7 @@ void DefFormat::genLiteralParser(StringRef value,
FmtContext &ctx,
.Case("]", "RSquare")
.Case("?", "Question")
.Case("+", "Plus")
+ .Case("-", "Minus")
tblah wrote:
Thanks for the con
https://github.com/Meinersbur edited
https://github.com/llvm/llvm-project/pull/159773
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tblah wrote:
Thanks for the replies.
> Do you have a suggestion which operation? Need to be an operation that takes
> at least two region arguments.
The reduction and privatisation declaration operations have multiple regions. I
can't imagine why we would ever generate canonical loops inside
@@ -77,6 +77,177 @@ struct LLVMPointerPointerLikeModel
};
} // namespace
+/// Generate a name of a canonical loop nest of the format
+/// `(_s_r)*` that describes its nesting inside parent
+/// operations (`_r`) and that operation's region (`_s`). The region
+/// number is omi
@@ -77,6 +77,177 @@ struct LLVMPointerPointerLikeModel
};
} // namespace
+/// Generate a name of a canonical loop nest of the format
+/// `(_s_r)*` that describes its nesting inside parent
+/// operations (`_r`) and that operation's region (`_s`). The region
+/// number is omi
tangaac wrote:
For LSX zext, I believe previous behavior is the best practice.
For LSX sext, vector element sext as twice element size, the best practice is
like below:
``` llvm
%B = sext <4 x i16> %A to <4 x i32>
vslti.h v2, v1, 0
vilvl.h v1, v2, v1
%B = sext <4 x i32> %A to <4 x i64>
vslti.
llvmbot wrote:
@llvm/pr-subscribers-flang-semantics
Author: Krzysztof Parzyszek (kparzysz)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/160595.diff
7 Files Affected:
- (modified) flang/include/flang/Parser/openmp-utils.h (+1-3)
- (modified) flang/include/flang/Par
https://github.com/yingopq approved this pull request.
https://github.com/llvm/llvm-project/pull/160807
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@@ -16289,20 +16289,68 @@
TreeTransform::TransformPackIndexingExpr(PackIndexingExpr *E) {
IndexExpr.get(), ExpandedExprs, FullySubstituted);
}
-template
-ExprResult
-TreeTransform::TransformSubstNonTypeTemplateParmPackExpr(
- Sub
@@ -113,7 +113,7 @@ using Bar = Foo; // expected-note {{candidate
template ignored: co
// expected-note {{implicit deduction guide
declared as 'template requires __is_deducible(test9::Bar,
test9::Foo) Bar(test9::Foo) -> test9::Foo'}} \
@@ -16289,20 +16289,68 @@
TreeTransform::TransformPackIndexingExpr(PackIndexingExpr *E) {
IndexExpr.get(), ExpandedExprs, FullySubstituted);
}
-template
-ExprResult
-TreeTransform::TransformSubstNonTypeTemplateParmPackExpr(
- Sub
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