[llvm-branch-commits] [llvm] [LV] Mask off possibly aliasing vector lanes (PR #100579)

2025-11-20 Thread Sander de Smalen via llvm-branch-commits
@@ -8974,11 +8982,104 @@ void LoopVectorizationPlanner::attachRuntimeChecks( assert((!CM.OptForSize || CM.Hints->getForce() == LoopVectorizeHints::FK_Enabled) && "Cannot SCEV check stride or overflow when optimizing for size"); -VPlanTransforms::a

[llvm-branch-commits] [llvm] [LV] Mask off possibly aliasing vector lanes (PR #100579)

2025-11-20 Thread Sander de Smalen via llvm-branch-commits
@@ -702,6 +703,29 @@ Value *VPInstruction::generate(VPTransformState &State) { {PredTy, ScalarTC->getType()}, {VIVElem0, ScalarTC}, nullptr, Name); } + // Count the number of bits set in each lane and redu

[llvm-branch-commits] [llvm] [AMDGPU] Make SIShrinkInstructions pass return valid changed state (PR #168833)

2025-11-20 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH edited https://github.com/llvm/llvm-project/pull/168833 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Make SIShrinkInstructions pass return valid changed state (PR #168833)

2025-11-20 Thread Vikram Hegde via llvm-branch-commits
@@ -527,14 +534,16 @@ void SIShrinkInstructions::shrinkMadFma(MachineInstr &MI) const { TII->removeModOperands(MI); MI.setDesc(TII->get(NewOpcode)); } + return true; } /// Attempt to shrink AND/OR/XOR operations requiring non-inlineable literals. /// For AND or

[llvm-branch-commits] [llvm] [AMDGPU] Make SIShrinkInstructions pass return valid changed state (PR #168833)

2025-11-20 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH edited https://github.com/llvm/llvm-project/pull/168833 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Make SIShrinkInstructions pass return valid changed state (PR #168833)

2025-11-20 Thread Jay Foad via llvm-branch-commits
@@ -241,27 +241,30 @@ void SIShrinkInstructions::copyExtraImplicitOps(MachineInstr &NewMI, } } -void SIShrinkInstructions::shrinkScalarCompare(MachineInstr &MI) const { +bool SIShrinkInstructions::shrinkScalarCompare(MachineInstr &MI) const { if (!ST->hasSCmpK()) -re

[llvm-branch-commits] [llvm] [AMDGPU] Make SIShrinkInstructions pass return valid changed state (PR #168833)

2025-11-20 Thread Jay Foad via llvm-branch-commits
@@ -527,14 +534,16 @@ void SIShrinkInstructions::shrinkMadFma(MachineInstr &MI) const { TII->removeModOperands(MI); MI.setDesc(TII->get(NewOpcode)); } + return true; } /// Attempt to shrink AND/OR/XOR operations requiring non-inlineable literals. /// For AND or

[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::updateBTIVariant (PR #167308)

2025-11-20 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/167308 From 905a5ea9bcac7c7127e863acefc04c8785efc5ba Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Mon, 1 Sep 2025 08:52:28 + Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::updateBTIVariant Checks if an i

[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart (PR #167329)

2025-11-20 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/167329 From b40af549e92c21dc416ab639fea60ae56cccef80 Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Wed, 17 Sep 2025 12:24:04 + Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart This function

[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::isBTILandingPad (PR #167306)

2025-11-20 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/167306 From d054c47f005e0812673e95aac9eeaf16cd2fe52c Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Thu, 28 Aug 2025 12:32:37 + Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::isBTILandingPad - takes both i

[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::updateBTIVariant (PR #167308)

2025-11-20 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/167308 From 905a5ea9bcac7c7127e863acefc04c8785efc5ba Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Mon, 1 Sep 2025 08:52:28 + Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::updateBTIVariant Checks if an i

[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::isBTILandingPad (PR #167306)

2025-11-20 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/167306 From d054c47f005e0812673e95aac9eeaf16cd2fe52c Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Thu, 28 Aug 2025 12:32:37 + Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::isBTILandingPad - takes both i

[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart (PR #167329)

2025-11-20 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/167329 From b40af549e92c21dc416ab639fea60ae56cccef80 Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Wed, 17 Sep 2025 12:24:04 + Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart This function

[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart (PR #167329)

2025-11-20 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/167329 From a7a53e6d8ba084b149b4c0e0d6cd5d5f77d3cf15 Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Wed, 17 Sep 2025 12:24:04 + Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart This function

[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::isBTILandingPad (PR #167306)

2025-11-20 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/167306 From ebaccb2c87fb47e9f075b03bdccc5deb96f9b796 Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Thu, 28 Aug 2025 12:32:37 + Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::isBTILandingPad - takes both i

[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart (PR #167329)

2025-11-20 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/167329 From a7a53e6d8ba084b149b4c0e0d6cd5d5f77d3cf15 Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Wed, 17 Sep 2025 12:24:04 + Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::addBTItoBBStart This function

[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::isBTILandingPad (PR #167306)

2025-11-20 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/167306 From ebaccb2c87fb47e9f075b03bdccc5deb96f9b796 Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Thu, 28 Aug 2025 12:32:37 + Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::isBTILandingPad - takes both i

[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::updateBTIVariant (PR #167308)

2025-11-20 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/167308 From 43aa2de9114d020e848e7f3f6ea10cee3b7f75f5 Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Mon, 1 Sep 2025 08:52:28 + Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::updateBTIVariant Checks if an i

[llvm-branch-commits] [llvm] [BOLT][BTI] Add MCPlusBuilder::updateBTIVariant (PR #167308)

2025-11-20 Thread Gergely Bálint via llvm-branch-commits
https://github.com/bgergely0 updated https://github.com/llvm/llvm-project/pull/167308 From 43aa2de9114d020e848e7f3f6ea10cee3b7f75f5 Mon Sep 17 00:00:00 2001 From: Gergely Balint Date: Mon, 1 Sep 2025 08:52:28 + Subject: [PATCH] [BOLT][BTI] Add MCPlusBuilder::updateBTIVariant Checks if an i

[llvm-branch-commits] [mlir] 6b3939d - Revert "[mlir][Pass] Fix crash when applying a pass to an optional interface …"

2025-11-20 Thread via llvm-branch-commits
Author: Matthias Springer Date: 2025-11-20T18:31:30+08:00 New Revision: 6b3939db8b3b0928d32992e9074c4dfceb2861fc URL: https://github.com/llvm/llvm-project/commit/6b3939db8b3b0928d32992e9074c4dfceb2861fc DIFF: https://github.com/llvm/llvm-project/commit/6b3939db8b3b0928d32992e9074c4dfceb2861fc.d

[llvm-branch-commits] [llvm] [AMDGPU] Make SIShrinkInstructions pass return valid changed state (PR #168833)

2025-11-20 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Vikram Hegde (vikramRH) Changes The SIShrinkInstructions run() method currently returns "false" unconditionally. This change makes it return the actual changed state. PS: I'm not considering setting regalloc hints as changes here

[llvm-branch-commits] [llvm] [AMDGPU] Make SIShrinkInstructions pass return valid changed state (PR #168833)

2025-11-20 Thread Vikram Hegde via llvm-branch-commits
https://github.com/vikramRH ready_for_review https://github.com/llvm/llvm-project/pull/168833 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] e3e0d8c - Revert "[AMDGPU] Add wave reduce intrinsics for float types - 2 (#161815)"

2025-11-20 Thread via llvm-branch-commits
Author: Aaditya Date: 2025-11-20T15:34:05+05:30 New Revision: e3e0d8cad53390c3175fbf538335b0903b3bd257 URL: https://github.com/llvm/llvm-project/commit/e3e0d8cad53390c3175fbf538335b0903b3bd257 DIFF: https://github.com/llvm/llvm-project/commit/e3e0d8cad53390c3175fbf538335b0903b3bd257.diff LOG: