shiltian wrote:
Is it a "move" or adds new tests? There doesn't seem to be any delete.
https://github.com/llvm/llvm-project/pull/142114
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listi
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/141985
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/141804
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -11922,6 +11922,18 @@ bool llvm::isBoolSGPR(SDValue V) {
case ISD::SMULO:
case ISD::UMULO:
return V.getResNo() == 1;
+ case ISD::INTRINSIC_WO_CHAIN: {
+unsigned IntrinsicID = V.getConstantOperandVal(0);
+switch (IntrinsicID) {
+case Intrinsic::amdgcn_is_
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/141589
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -392,6 +394,55 @@ void
AMDGPURegBankCombinerImpl::applyCanonicalizeZextShiftAmt(
MI.eraseFromParent();
}
+bool AMDGPURegBankCombinerImpl::lowerUniformBFX(MachineInstr &MI) const {
+ assert(MI.getOpcode() == TargetOpcode::G_UBFX ||
+ MI.getOpcode() == TargetOpcod
shiltian wrote:
This is still a work in progress, as three test cases are currently crashing.
I'd like to get some early feedback on whether this is the right approach to
support `opsel` for fake16.
https://github.com/llvm/llvm-project/pull/139185
__
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/139185
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
shiltian wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/139185?utm_source=stack-comment-downstack-mergeability-warning"
https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/139185
None
>From 810682aeeaa305de0a36145770016f7364404908 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 8 May 2025 19:26:31 -0400
Subject: [PATCH] [AMDGPU][Fake16] Support OPSEL for `v_cvt_f16_f32` and
`v_c
https://github.com/shiltian approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/138626
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -1108,47 +1108,25 @@ struct AAAMDWavesPerEU : public AAAMDSizeRangeAttribute
{
Function *F = getAssociatedFunction();
auto &InfoCache = static_cast(A.getInfoCache());
-auto TakeRange = [&](std::pair R) {
- auto [Min, Max] = R;
- ConstantRange Range(AP
@@ -1408,8 +1433,14 @@ static bool runImpl(Module &M, AnalysisGetter &AG,
TargetMachine &TM,
}
}
- ChangeStatus Change = A.run();
- return Change == ChangeStatus::CHANGED;
+ bool Changed = A.run() == ChangeStatus::CHANGED;
shiltian wrote:
I didn't f
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/123995
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -1333,6 +1308,56 @@ static void addPreloadKernArgHint(Function &F,
TargetMachine &TM) {
}
}
+/// The final check and update of the attribute 'amdgpu-waves-per-eu' based on
+/// the determined 'amdgpu-flat-work-group-size' attribute. We can't do this
+/// during attributo
@@ -1108,47 +1108,25 @@ struct AAAMDWavesPerEU : public AAAMDSizeRangeAttribute
{
Function *F = getAssociatedFunction();
auto &InfoCache = static_cast(A.getInfoCache());
-auto TakeRange = [&](std::pair R) {
- auto [Min, Max] = R;
- ConstantRange Range(AP
@@ -1425,8 +1453,14 @@ static bool runImpl(Module &M, AnalysisGetter &AG,
TargetMachine &TM,
}
}
- ChangeStatus Change = A.run();
- return Change == ChangeStatus::CHANGED;
+ bool Changed = A.run() == ChangeStatus::CHANGED;
+
+ if (Changed && (LTOPhase == ThinOrFullL
shiltian wrote:
Will close this for now. I'll revisit this if we can handle the case under
discussion properly.
https://github.com/llvm/llvm-project/pull/137655
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm
https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/137655
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -11,11 +10,9 @@ define amdgpu_kernel void @ptr_nest_3(ptr addrspace(1)
nocapture readonly %Arg)
; CHECK-NEXT: entry:
; CHECK-NEXT:[[I:%.*]] = tail call i32 @llvm.amdgcn.workitem.id.x()
; CHECK-NEXT:[[P1:%.*]] = getelementptr inbounds ptr, ptr addrspace(1)
[[ARG:%.
@@ -11,11 +10,9 @@ define amdgpu_kernel void @ptr_nest_3(ptr addrspace(1)
nocapture readonly %Arg)
; CHECK-NEXT: entry:
; CHECK-NEXT:[[I:%.*]] = tail call i32 @llvm.amdgcn.workitem.id.x()
; CHECK-NEXT:[[P1:%.*]] = getelementptr inbounds ptr, ptr addrspace(1)
[[ARG:%.
https://github.com/shiltian ready_for_review
https://github.com/llvm/llvm-project/pull/137655
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -11,11 +10,9 @@ define amdgpu_kernel void @ptr_nest_3(ptr addrspace(1)
nocapture readonly %Arg)
; CHECK-NEXT: entry:
; CHECK-NEXT:[[I:%.*]] = tail call i32 @llvm.amdgcn.workitem.id.x()
; CHECK-NEXT:[[P1:%.*]] = getelementptr inbounds ptr, ptr addrspace(1)
[[ARG:%.
shiltian wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/137655?utm_source=stack-comment-downstack-mergeability-warning"
https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/137655
None
>From 531195729a62694205763accce085b46d9a5bc10 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 27 Apr 2025 13:38:11 -0400
Subject: [PATCH] [AMDGPU] Remove the pass `AMDGPUPromoteKernelArguments`
--
https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/136865
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/136798
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/136304
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/136798
>From 9d2612c4379eb827406642b508f2dce32fc13e59 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 23 Apr 2025 09:17:46 -0400
Subject: [PATCH] [AMDGPU] Make `AllocaInst` return AS5 in
`getAssumedAddrSpace`
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/136798
>From 2d75ec2eb1a927513bb92bcb26e313a3831426ef Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 23 Apr 2025 09:17:46 -0400
Subject: [PATCH] [AMDGPU] Make `AllocaInst` return AS5 in
`getAssumedAddrSpace`
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/136798
>From 9d2612c4379eb827406642b508f2dce32fc13e59 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 23 Apr 2025 09:17:46 -0400
Subject: [PATCH] [AMDGPU] Make `AllocaInst` return AS5 in
`getAssumedAddrSpace`
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/136798
>From 2d75ec2eb1a927513bb92bcb26e313a3831426ef Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 23 Apr 2025 09:17:46 -0400
Subject: [PATCH] [AMDGPU] Make `AllocaInst` return AS5 in
`getAssumedAddrSpace`
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/136798
>From 8b975d26cd4540ad95bdaafb02a0f48154cb57f1 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 23 Apr 2025 09:17:46 -0400
Subject: [PATCH] [AMDGPU] Make `AllocaInst` return AS5 in
`getAssumedAddrSpace`
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/136798
>From 8b975d26cd4540ad95bdaafb02a0f48154cb57f1 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 23 Apr 2025 09:17:46 -0400
Subject: [PATCH] [AMDGPU] Make `AllocaInst` return AS5 in
`getAssumedAddrSpace`
shiltian wrote:
> In the real world, people emit address space 0 allocas all over the place and
> then report backend bugs when it fails in codegen
Technically we can avoid that by just hard error
https://github.com/llvm/llvm-project/pull/136865
___
@@ -12603,6 +12603,18 @@ struct AAAddressSpaceImpl : public AAAddressSpace {
auto CheckAddressSpace = [&](Value &Obj) {
if (isa(&Obj))
return true;
+ // Some targets relax the requirement for alloca to be in an exact
address
+ // space, allowing it
shiltian wrote:
> The A field does not assert anything about the content of the module. It does
> not assert that any alloca with a non-A valued alloca can be replaced with an
> A address space alloca. An alloca that does not match this address space is
> not invalid, and you cannot say anythi
shiltian wrote:
> This looks like an attempt to fix up broken IR producers, but I guess that's
> not it?
Yeah, I initially thought that was broken IR too. At first, I was in favor of
not allowing alloca in AS0 at all and just making it a verifier error, like
what was done in
https://github.c
@@ -0,0 +1,35 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --version 5
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=infer-address-spaces %s -o -
| FileCheck %s
+
+declare void @bar(ptr)
+
+define i32 @static_alloca() {
+; CHECK-LAB
shiltian wrote:
I've updated the PR to use `getAssumedAddrSpace`, which is same as what
`InferAddressSpacePass` does. @arsenm @nikic
https://github.com/llvm/llvm-project/pull/136865
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/136865
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -0,0 +1,35 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --version 5
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=infer-address-spaces %s -o -
| FileCheck %s
+
+declare void @bar(ptr)
+
+define i32 @static_alloca() {
+; CHECK-LAB
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/136798
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
shiltian wrote:
The LLVM Lang Ref says:
> The function of the data layout string may not be what you expect. Notably,
> this is not a specification from the frontend of what alignment the code
> generator should use.
>
> Instead, if specified, **the target data layout is required to match what
shiltian wrote:
> The address space should just come directly from the alloca. You don't know
> if it's correct to just replace the addrspace with whatever the datalayout
> says is the alloca addrspace. The datalayout value is for new allocas where
> the code has no additional context
If the
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/136798
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -951,6 +951,9 @@ bool AMDGPUTargetMachine::isNoopAddrSpaceCast(unsigned
SrcAS,
}
unsigned AMDGPUTargetMachine::getAssumedAddrSpace(const Value *V) const {
+ if (isa(V))
shiltian wrote:
I don't think we need to differentiate them. It is either flat or pri
@@ -0,0 +1,35 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --version 5
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=infer-address-spaces %s -o -
| FileCheck %s
+
+declare void @bar(ptr)
+
+define i32 @static_alloca() {
+; CHECK-LAB
@@ -150,15 +138,11 @@ define amdgpu_kernel void @static_alloca_kernel(ptr %p) {
; GI-NEXT:v_mov_b32_e32 v1, s15
; GI-NEXT:s_mov_b32 s14, s16
; GI-NEXT:s_movk_i32 s32, 0x400
-; GI-NEXT:s_mov_b32 s36, 0
shiltian wrote:
That's why I explicitly add
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/136798
>From b5f7d3d1f11da0b48fa5b634700c1bc539f4f413 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 23 Apr 2025 09:17:46 -0400
Subject: [PATCH] [AMDGPU] Make `AllocaInst` return AS5 in
`getAssumedAddrSpace`
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/136798
>From b5f7d3d1f11da0b48fa5b634700c1bc539f4f413 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 23 Apr 2025 09:17:46 -0400
Subject: [PATCH] [AMDGPU] Make `AllocaInst` return AS5 in
`getAssumedAddrSpace`
shiltian wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/136798?utm_source=stack-comment-downstack-mergeability-warning"
https://github.com/shiltian ready_for_review
https://github.com/llvm/llvm-project/pull/136798
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/136798
None
>From fb9ba07decd8da6ac12391fa04301a3614ed9c3d Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 22 Apr 2025 21:37:21 -0400
Subject: [PATCH] [AMDGPU] Make `AllocaInst` return AS5 in
`getAssumedAddrSp
shiltian wrote:
Just a quick side question, do we have any write-up or documentation about the
memory model?
https://github.com/llvm/llvm-project/pull/135340
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.or
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/134805
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/134838
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/134837
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
Seems to be very mechanical.
https://github.com/llvm/llvm-project/pull/134584
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinf
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/133422
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/133410
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/133409
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/133409
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/133421
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/133421
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/133420
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/133422
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/133420
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/133411
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/133411
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/133410
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/133407
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/133407
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -1425,8 +1453,14 @@ static bool runImpl(Module &M, AnalysisGetter &AG,
TargetMachine &TM,
}
}
- ChangeStatus Change = A.run();
- return Change == ChangeStatus::CHANGED;
+ bool Changed = A.run() == ChangeStatus::CHANGED;
+
+ if (Changed && (LTOPhase == ThinOrFullL
@@ -1336,6 +1311,59 @@ static void addPreloadKernArgHint(Function &F,
TargetMachine &TM) {
}
}
+static void checkWavesPerEU(Module &M, TargetMachine &TM) {
+ for (Function &F : M) {
+const GCNSubtarget &ST = TM.getSubtarget(F);
+
+auto FlatWgrpSizeAttr =
+A
@@ -899,4 +899,5 @@ void test_set_fpenv(unsigned long env) {
// CHECK-DAG: [[$GRID_RANGE]] = !{i32 1, i32 0}
// CHECK-DAG: [[$WS_RANGE]] = !{i16 1, i16 1025}
-// CHECK-DAG: attributes #[[$NOUNWIND_READONLY]] = { convergent mustprogress
nocallback nofree nounwind willreturn me
shiltian wrote:
Hmm, I still can't see the test change?
https://github.com/llvm/llvm-project/pull/131623
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/131758
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -1,10 +1,72 @@
-; RUN: llc < %s
-target datalayout =
"e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9"
-target tri
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/131051
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/131052
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/130914
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/131052
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/131050
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/130914
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/131051
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/131050
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/130900
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/130898
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/130915
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/130915
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/130903
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/130898
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -548,6 +548,8 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
case Intrinsic::amdgcn_sqrt:
case Intrinsic::amdgcn_rsq: {
Value *Src = II.getArgOperand(0);
+if (isa(Src))
+ return IC.replaceInstUsesWith(II, Src);
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/130903
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/130902
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/130904
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/130904
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/130902
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/130902
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
1 - 100 of 519 matches
Mail list logo
