[llvm-branch-commits] [llvm] [mlir] [mlir][LLVM] add argument and result attributes to llvm.call (PR #123177)

2025-02-01 Thread Tobias Gysi via llvm-branch-commits
https://github.com/gysit edited https://github.com/llvm/llvm-project/pull/123177 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [mlir] [mlir][LLVM] add argument and result attributes to llvm.call (PR #123177)

2025-02-01 Thread Tobias Gysi via llvm-branch-commits
https://github.com/gysit commented: Nice! I did leave some comments assuming the base commit will land soon. https://github.com/llvm/llvm-project/pull/123177 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.or

[llvm-branch-commits] [llvm] [mlir] [mlir][LLVM] add argument and result attributes to llvm.call (PR #123177)

2025-02-01 Thread Tobias Gysi via llvm-branch-commits
@@ -1596,6 +1603,23 @@ ModuleTranslation::convertParameterAttrs(LLVMFuncOp func, int argIdx, return attrBuilder; } +FailureOr +ModuleTranslation::convertParameterAttrs(CallOp, int argIdx, gysit wrote: ```suggestion ModuleTranslation::convertParameterAttrs(

[llvm-branch-commits] [llvm] [mlir] [mlir][LLVM] add argument and result attributes to llvm.call (PR #123177)

2025-02-01 Thread Tobias Gysi via llvm-branch-commits
@@ -1721,7 +1738,10 @@ ParseResult InvokeOp::parse(OpAsmParser &parser, OperationState &result) { return failure(); // Parse the trailing type list and resolve the function operands. - if (parseCallTypeAndResolveOperands(parser, result, isDirect, operands)) + SmallVec

[llvm-branch-commits] [llvm] [mlir] [mlir][LLVM] add argument and result attributes to llvm.call (PR #123177)

2025-02-01 Thread Tobias Gysi via llvm-branch-commits
@@ -0,0 +1,17 @@ +// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s + +llvm.func @somefunc(i32, !llvm.ptr) + +// CHECK-LABEL: define void @test_call_arg_attrs_direct +llvm.func @test_call_arg_attrs_direct(%arg0: i32, %arg1: !llvm.ptr) { + // CHECK: call void @somefunc(i32

[llvm-branch-commits] [llvm] [mlir] [mlir][LLVM] add argument and result attributes to llvm.call (PR #123177)

2025-02-01 Thread Tobias Gysi via llvm-branch-commits
@@ -265,6 +265,27 @@ convertOperationImpl(Operation &opInst, llvm::IRBuilderBase &builder, if (callOp.getWillReturnAttr()) call->addFnAttr(llvm::Attribute::WillReturn); +if (ArrayAttr argAttrsArray = callOp.getArgAttrsAttr()) + for (auto [argIdx, argAttrsAt

[llvm-branch-commits] [llvm] [mlir] [mlir][LLVM] add argument and result attributes to llvm.call (PR #123177)

2025-02-01 Thread Tobias Gysi via llvm-branch-commits
@@ -265,6 +265,27 @@ convertOperationImpl(Operation &opInst, llvm::IRBuilderBase &builder, if (callOp.getWillReturnAttr()) call->addFnAttr(llvm::Attribute::WillReturn); +if (ArrayAttr argAttrsArray = callOp.getArgAttrsAttr()) + for (auto [argIdx, argAttrsAt

[llvm-branch-commits] [mlir] [MLIR][LLVM]: Add an IR utility to perform slice walking (PR #103053)

2024-08-14 Thread Tobias Gysi via llvm-branch-commits
@@ -0,0 +1,98 @@ +//===- SliceWalk.h - Helpers for performing IR slice walks ---*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-

[llvm-branch-commits] [mlir] [MLIR][LLVM]: Add an IR utility to perform slice walking (PR #103053)

2024-08-14 Thread Tobias Gysi via llvm-branch-commits
@@ -363,9 +323,14 @@ static void createNewAliasScopesFromNoAliasParameter( // Find the set of underlying pointers that this pointer is based on. SmallPtrSet basedOnPointers; - for (Value pointer : pointerArgs) -llvm::copy(getUnderlyingObjectSet(pointer

[llvm-branch-commits] [mlir] [MLIR][LLVM]: Add an IR utility to perform slice walking (PR #103053)

2024-08-14 Thread Tobias Gysi via llvm-branch-commits
@@ -0,0 +1,98 @@ +//===- SliceWalk.h - Helpers for performing IR slice walks ---*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-

[llvm-branch-commits] [mlir] [MLIR][LLVM]: Add an IR utility to perform slice walking (PR #103053)

2024-08-14 Thread Tobias Gysi via llvm-branch-commits
https://github.com/gysit edited https://github.com/llvm/llvm-project/pull/103053 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] [MLIR][LLVM]: Add an IR utility to perform slice walking (PR #103053)

2024-08-14 Thread Tobias Gysi via llvm-branch-commits
https://github.com/gysit approved this pull request. LGTM modulo nits! https://github.com/llvm/llvm-project/pull/103053 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-

[llvm-branch-commits] [mlir] [MLIR][Mem2Reg] Change API to always retry promotion after changes (PR #91464)

2024-05-08 Thread Tobias Gysi via llvm-branch-commits
@@ -636,20 +636,36 @@ LogicalResult mlir::tryToPromoteMemorySlots( // lazily and cached to avoid expensive recomputation. BlockIndexCache blockIndexCache; - for (PromotableAllocationOpInterface allocator : allocators) { -for (MemorySlot slot : allocator.getPromotableS

[llvm-branch-commits] [mlir] [MLIR][LLVM][SROA] Support incorrectly typed memory accesses (PR #85813)

2024-03-20 Thread Tobias Gysi via llvm-branch-commits
https://github.com/gysit approved this pull request. Thanks LGTM! https://github.com/llvm/llvm-project/pull/85813 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commit

[llvm-branch-commits] [mlir] [MLIR][LLVM][SROA] Support incorrectly typed memory accesses (PR #85813)

2024-03-19 Thread Tobias Gysi via llvm-branch-commits
@@ -182,17 +176,107 @@ DeletionKind LLVM::StoreOp::removeBlockingUses( return DeletionKind::Delete; } +/// Checks if `slot` can be accessed through the provided access type. +static bool isValidAccessType(const MemorySlot &slot, Type accessType, +

[llvm-branch-commits] [mlir] [MLIR][LLVM][SROA] Support incorrectly typed memory accesses (PR #85813)

2024-03-19 Thread Tobias Gysi via llvm-branch-commits
@@ -384,16 +468,17 @@ bool LLVM::GEPOp::canRewire(const DestructurableMemorySlot &slot, // dynamic indices can never be properly rewired. if (!getDynamicIndices().empty()) return false; + TODO: This is not necessary, I think. + // if (slot.elemType != getElemTyp

[llvm-branch-commits] [mlir] [MLIR][LLVM][SROA] Support incorrectly typed memory accesses (PR #85813)

2024-03-19 Thread Tobias Gysi via llvm-branch-commits
@@ -215,3 +215,94 @@ llvm.func @no_nested_dynamic_indexing(%arg: i32) -> i32 { // CHECK: llvm.return %[[RES]] : i32 llvm.return %3 : i32 } + +// - + +// CHECK-LABEL: llvm.func @store_first_field +llvm.func @store_first_field(%arg: i32) { + %0 = llvm.mlir.constant(1 : i

[llvm-branch-commits] [mlir] [MLIR][LLVM][SROA] Support incorrectly typed memory accesses (PR #85813)

2024-03-19 Thread Tobias Gysi via llvm-branch-commits
https://github.com/gysit commented: Nice! https://github.com/llvm/llvm-project/pull/85813 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] [MLIR][LLVM][SROA] Support incorrectly typed memory accesses (PR #85813)

2024-03-19 Thread Tobias Gysi via llvm-branch-commits
@@ -26,8 +26,8 @@ struct MemorySlot { /// Memory slot attached with information about its destructuring procedure. struct DestructurableMemorySlot : public MemorySlot { - /// Maps an index within the memory slot to the type of the pointer that - /// will be generated to acce

[llvm-branch-commits] [mlir] [MLIR][LLVM][SROA] Support incorrectly typed memory accesses (PR #85813)

2024-03-19 Thread Tobias Gysi via llvm-branch-commits
https://github.com/gysit edited https://github.com/llvm/llvm-project/pull/85813 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] [flang] [MLIR][LLVM] Add distinct identifier to the DISubprogram attribute (PR #77093)

2024-01-05 Thread Tobias Gysi via llvm-branch-commits
https://github.com/gysit approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/77093 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] [flang] [MLIR][LLVM] Add distinct identifier to the DISubprogram attribute (PR #77093)

2024-01-05 Thread Tobias Gysi via llvm-branch-commits
@@ -66,12 +66,28 @@ static void addScopeToFunction(LLVM::LLVMFuncOp llvmFunc, LLVM::DISubroutineTypeAttr::get(context, llvm::dwarf::DW_CC_normal, {}); StringAttr funcNameAttr = llvmFunc.getNameAttr(); - auto subprogramAttr = LLVM::DISubprogramAttr::get( - context

[llvm-branch-commits] [flang] [mlir] [MLIR][LLVM] Add distinct identifier to the DISubprogram attribute (PR #77093)

2024-01-05 Thread Tobias Gysi via llvm-branch-commits
https://github.com/gysit edited https://github.com/llvm/llvm-project/pull/77093 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] 4c1eaf2 - [mlir] fix the rocm runtime wrapper to account for cuda / rocm api differences

2021-01-20 Thread Tobias Gysi via llvm-branch-commits
Author: Tobias Gysi Date: 2021-01-20T18:48:32+01:00 New Revision: 4c1eaf26ae70b9f0e441b0f613871d697c4c9a7d URL: https://github.com/llvm/llvm-project/commit/4c1eaf26ae70b9f0e441b0f613871d697c4c9a7d DIFF: https://github.com/llvm/llvm-project/commit/4c1eaf26ae70b9f0e441b0f613871d697c4c9a7d.diff L