dtcxzyw wrote:
> > Ping?
>
> Depends on the parent, plus was hoping to run this through compile time
> tracker
CTMark:
https://llvm-compile-time-tracker.com/compare.php?from=a861f50030a9dac28a35654506bb28d2bc239b56&to=a33632206ab5e08caf9e243009f5911400441d01&stat=instructions:u
llvm-opt-bench
https://github.com/dtcxzyw approved this pull request.
LG
https://github.com/llvm/llvm-project/pull/138676
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
dtcxzyw wrote:
> I don't think there is a need to backport FMF propagation fixes.
Is there a policy to judge whether or not to backport a miscompilation bug fix?
Actually, it is unlikely to trigger this bug in real-world projects. But this
fix is simple and safe to be backported.
I am fine wit
https://github.com/dtcxzyw approved this pull request.
https://github.com/llvm/llvm-project/pull/136467
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -3124,6 +3124,19 @@ inline auto m_c_LogicalOp(const LHS &L, const RHS &R) {
return m_LogicalOp(L, R);
}
+struct GuaranteedNotToBeUndefOrPoison_match {
+ template bool match(ITy *V) {
+if (auto *AsValue = dyn_cast(V))
+ return isGuaranteedNotToBeUndefOrPoison(As
@@ -4813,15 +4813,22 @@ Instruction *InstCombinerImpl::visitFreeze(FreezeInst
&I) {
// TODO: This could use getBinopAbsorber() / getBinopIdentity() to avoid
// duplicating logic for binops at least.
auto getUndefReplacement = [&I](Type *Ty) {
-Constant *BestVal
dtcxzyw wrote:
> I would like to incorporate this and then once freeze poison -> null
> canonicalization is removed from InstCombine refactor appropriately. Would
> this be acceptable?
I don't mean to block this patch. I just worry that these patches may not be
well tested (fuzzers/compile-ti
https://github.com/dtcxzyw commented:
We can do this fold in InstSimplify: https://alive2.llvm.org/ce/z/Dm53TP
However, we should wait for the following things before working on more
simplifications with `freeze poison`:
1. Remove `freeze poison -> null` canonicalization in InstCombine
2. Repla
https://github.com/dtcxzyw approved this pull request.
https://github.com/llvm/llvm-project/pull/125858
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/dtcxzyw approved this pull request.
https://github.com/llvm/llvm-project/pull/124895
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/dtcxzyw closed
https://github.com/llvm/llvm-project/pull/118216
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/dtcxzyw created
https://github.com/llvm/llvm-project/pull/118216
Backport
https://github.com/llvm/llvm-project/commit/f7ef0721d60f85e1f699f8d1b83d4402ae19b122
>From 6f08a0f1eb21de59f1c9cb2b8c86597d43e23b31 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Sun, 1 Dec 2024
dtcxzyw wrote:
@tstellar We should disable the greeter for PRs created by llvmbot.
https://github.com/llvm/llvm-project/pull/116814
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo
@@ -22505,6 +22506,53 @@ Value
*CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
return nullptr;
}
+Value *CodeGenFunction::EmitRISCVCpuIs(const CallExpr *E) {
+ const Expr *CPUExpr = E->getArg(0)->IgnoreParenCasts();
+ StringRef CPUStr = cast(CPUExpr)->getStri
@@ -22505,6 +22506,53 @@ Value
*CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
return nullptr;
}
+Value *CodeGenFunction::EmitRISCVCpuIs(const CallExpr *E) {
+ const Expr *CPUExpr = E->getArg(0)->IgnoreParenCasts();
+ StringRef CPUStr = cast(CPUExpr)->getStri
@@ -22505,6 +22506,53 @@ Value
*CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
return nullptr;
}
+Value *CodeGenFunction::EmitRISCVCpuIs(const CallExpr *E) {
+ const Expr *CPUExpr = E->getArg(0)->IgnoreParenCasts();
+ StringRef CPUStr = cast(CPUExpr)->getStri
@@ -22505,6 +22506,53 @@ Value
*CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
return nullptr;
}
+Value *CodeGenFunction::EmitRISCVCpuIs(const CallExpr *E) {
+ const Expr *CPUExpr = E->getArg(0)->IgnoreParenCasts();
+ StringRef CPUStr = cast(CPUExpr)->getStri
https://github.com/dtcxzyw edited
https://github.com/llvm/llvm-project/pull/111984
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/dtcxzyw created
https://github.com/llvm/llvm-project/pull/111984
Backport
https://github.com/llvm/llvm-project/commit/6a65e98fa7901dc1de91172d065fafb16ce89d77.
As https://github.com/llvm/llvm-project/pull/100899 exists in 19.x code base, I
guess 19.x is also a vulnerable ve
https://github.com/dtcxzyw milestoned
https://github.com/llvm/llvm-project/pull/111984
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/dtcxzyw approved this pull request.
https://github.com/llvm/llvm-project/pull/109502
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
dtcxzyw wrote:
> In that case - does it make sense to wait for that change before merging this?
See https://github.com/llvm/llvm-project/pull/107990.
https://github.com/llvm/llvm-project/pull/107945
___
llvm-branch-commits mailing list
llvm-branch-co
dtcxzyw wrote:
> > It introduces a performance regression. I have filed an issue to track
> > this: #107946.
>
> Is this something you also expect to backport in this case? do we want to
> wait for this fix to be available before we merge? In that case - would it be
> better to wait and merge
dtcxzyw wrote:
> Hi, since we are wrapping up LLVM 19.1.0 we are very strict with the fixes we
> pick at this point. Can you please respond to the following questions to help
> me understand if this has to be included in the final release or not.
>
> Is this PR a fix for a regression or a crit
https://github.com/dtcxzyw created
https://github.com/llvm/llvm-project/pull/107184
Backport 9fef09fd2918e7d8c357b98a9a798fe207941f73.
>From b247a5774de77002b48257e2ce885b7ae34e9faf Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Wed, 4 Sep 2024 12:19:46 +0800
Subject: [PATCH] [Clang][Code
https://github.com/dtcxzyw milestoned
https://github.com/llvm/llvm-project/pull/107184
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
dtcxzyw wrote:
@nikic Affected rust applications: just rustfmt tree-sitter
See also https://github.com/llvm/llvm-project/pull/105790/files
https://github.com/llvm/llvm-project/pull/105797
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.
https://github.com/dtcxzyw approved this pull request.
https://github.com/llvm/llvm-project/pull/104745
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/dtcxzyw approved this pull request.
https://github.com/llvm/llvm-project/pull/101875
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/dtcxzyw approved this pull request.
https://github.com/llvm/llvm-project/pull/97799
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -284,6 +284,42 @@ define <4 x i32> @bit_ceil_v4i32(<4 x i32> %x) {
ret <4 x i32> %sel
}
+define i32 @pr91691(i32 %0) {
+; CHECK-LABEL: @pr91691(
+; CHECK-NEXT:[[TMP2:%.*]] = sub i32 -2, [[TMP0:%.*]]
+; CHECK-NEXT:[[TMP3:%.*]] = tail call range(i32 0, 33) i32
@llv
@@ -284,6 +284,42 @@ define <4 x i32> @bit_ceil_v4i32(<4 x i32> %x) {
ret <4 x i32> %sel
}
+define i32 @pr91691(i32 %0) {
+; CHECK-LABEL: @pr91691(
+; CHECK-NEXT:[[TMP2:%.*]] = sub i32 -2, [[TMP0:%.*]]
+; CHECK-NEXT:[[TMP3:%.*]] = tail call range(i32 0, 33) i32
@llv
dtcxzyw wrote:
@AtariDreams Please don't rebase your patch unless there are some conflicts to
be resolved.
At least you should tell us what you did.
https://github.com/llvm/llvm-project/pull/91419
___
llvm-branch-commits mailing list
llvm-branch-c
@@ -3708,3 +3708,91 @@ define i32 @src_select_xxory_eq0_xorxy_y(i32 %x, i32 %y)
{
%cond = select i1 %xor0, i32 %xor, i32 %y
ret i32 %cond
}
+
+define i32 @sequence_select_with_same_cond_false(i1 %c1, i1 %c2){
dtcxzyw wrote:
These tests don't belong to the
https://github.com/dtcxzyw edited
https://github.com/llvm/llvm-project/pull/91419
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/dtcxzyw requested changes to this pull request.
https://github.com/llvm/llvm-project/pull/91419
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commi
https://github.com/dtcxzyw approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/91286
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
dtcxzyw wrote:
Fixed an incorrect type inference during RISC-V instruction selection, which
causes an assertion failure when trying to fold selects into their operands.
https://github.com/llvm/llvm-project/pull/90682
___
llvm-branch-commits mailing l
dtcxzyw wrote:
> Hi @dtcxzyw (or anyone else). If you would like to add a note about this fix
> in the release notes (completely optional). Please reply to this comment with
> a one or two sentence description of the fix.
Fixed an incorrect poison-generating flag preservation in InstSimplify.
https://github.com/dtcxzyw updated
https://github.com/llvm/llvm-project/pull/84298
>From 02e9b82d220961bc7a42295f051564a217144d4a Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 5 Mar 2024 22:34:04 +0800
Subject: [PATCH] [InstCombine] Fix miscompilation in PR83947 (#83993)
https://gith
https://github.com/dtcxzyw closed
https://github.com/llvm/llvm-project/pull/84021
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/dtcxzyw created
https://github.com/llvm/llvm-project/pull/84298
Backport #83993
It is an alternative to #84021.
>From 02e9b82d220961bc7a42295f051564a217144d4a Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 5 Mar 2024 22:34:04 +0800
Subject: [PATCH] [InstCombine]
https://github.com/dtcxzyw milestoned
https://github.com/llvm/llvm-project/pull/84298
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
dtcxzyw wrote:
> remote: Permission to llvmbot/llvm-project.git denied to dtcxzyw.
fatal: unable to access 'https://github.com/llvmbot/llvm-project/': The
requested URL returned error: 403
https://github.com/llvm/llvm-project/pull/84021
___
llvm-branc
dtcxzyw wrote:
> @nikic Do you know how to add a commit to this PR?
>
> ```
> diff --git a/llvm/test/Transforms/InstCombine/masked_intrinsics.ll
> b/llvm/test/Transforms/InstCombine/masked_intrinsics.ll
> index 2704905f7a35..c87c1199f727 100644
> --- a/llvm/test/Transforms/InstCombine/masked_in
dtcxzyw wrote:
@nikic Do you know how to add a commit to this PR?
```
diff --git a/llvm/test/Transforms/InstCombine/masked_intrinsics.ll
b/llvm/test/Transforms/InstCombine/masked_intrinsics.ll
index 2704905f7a35..c87c1199f727 100644
--- a/llvm/test/Transforms/InstCombine/masked_intrinsics.ll
+++
https://github.com/dtcxzyw approved this pull request.
https://github.com/llvm/llvm-project/pull/84141
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/dtcxzyw ready_for_review
https://github.com/llvm/llvm-project/pull/84023
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/dtcxzyw edited
https://github.com/llvm/llvm-project/pull/84023
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/dtcxzyw created
https://github.com/llvm/llvm-project/pull/84023
None
>From 2d873aac49219cc84335fcf6a77329fb23d74679 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 5 Mar 2024 17:21:16 +0800
Subject: [PATCH] [InstCombine] Handle scalable splat in
`getFlippedStrictnes
https://github.com/dtcxzyw milestoned
https://github.com/llvm/llvm-project/pull/84023
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/dtcxzyw edited
https://github.com/llvm/llvm-project/pull/80124
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
https://github.com/dtcxzyw requested changes to this pull request.
https://github.com/llvm/llvm-project/pull/80124
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commi
@@ -451,6 +456,9 @@ void RISCVPassConfig::addIRPasses() {
}
TargetPassConfig::addIRPasses();
+
+ if (getOptLevel() == CodeGenOptLevel::Aggressive && EnableSelectOpt)
dtcxzyw wrote:
> Failed Tests (1):
LLVM :: CodeGen/RISCV/O3-pipeline.ll
Please update
https://github.com/dtcxzyw approved this pull request.
LGTM if CI is happy.
https://github.com/llvm/llvm-project/pull/82347
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-br
https://github.com/dtcxzyw approved this pull request.
LGTM. Thanks!
https://github.com/llvm/llvm-project/pull/82322
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-com
@@ -11725,13 +11727,27 @@ void RISCVTargetLowering::ReplaceNodeResults(SDNode
*N,
Results.push_back(Result);
break;
}
- case ISD::READCYCLECOUNTER: {
-assert(!Subtarget.is64Bit() &&
- "READCYCLECOUNTER only has custom type legalization on riscv32");
+
https://github.com/dtcxzyw edited
https://github.com/llvm/llvm-project/pull/82322
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
@@ -0,0 +1,873 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -select-optimize -mtriple=riscv64 -S < %s \
+; RUN: | FileCheck %s --check-prefix=CHECK-SELECT
+; RUN: opt -select-optimize -mtriple=riscv64 -mattr=+enable-select-opt -S < %s
59 matches
Mail list logo
