[llvm-branch-commits] [clang] [llvm] Backport "riscv-isa" module metadata to 18.x (PR #91514)

tstellar wrote: Hi @topperc (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR.

[llvm-branch-commits] [clang] [llvm] Backport "riscv-isa" module metadata to 18.x (PR #91514)

https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/91514 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] Backport "riscv-isa" module metadata to 18.x (PR #91514)

https://github.com/tstellar updated https://github.com/llvm/llvm-project/pull/91514 >From be239653149f45e4a23036c840ae0bcdc9818161 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Tue, 13 Feb 2024 16:17:50 -0800 Subject: [PATCH 1/3] [RISCV] Add canonical ISA string as Module metadata in IR.

[llvm-branch-commits] [clang] [llvm] Backport "riscv-isa" module metadata to 18.x (PR #91514)

https://github.com/tstellar updated https://github.com/llvm/llvm-project/pull/91514 >From 285cfe36fe2a5d8c5ba111f882394405a3f78f31 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Tue, 13 Feb 2024 16:17:50 -0800 Subject: [PATCH 1/3] [RISCV] Add canonical ISA string as Module metadata in IR.

[llvm-branch-commits] [clang] [llvm] Backport "riscv-isa" module metadata to 18.x (PR #91514)

efriedma-quic wrote: If LTO was completely broken, this seems worth taking. And the changes look safe. LGTM. https://github.com/llvm/llvm-project/pull/91514 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org

[llvm-branch-commits] [clang] [llvm] Backport "riscv-isa" module metadata to 18.x (PR #91514)

tstellar wrote: @efriedma-quic Any objections to backporting this? https://github.com/llvm/llvm-project/pull/91514 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org

[llvm-branch-commits] [clang] [llvm] Backport "riscv-isa" module metadata to 18.x (PR #91514)

ilovepi wrote: This tends to bite anyone using LTO with RISCV. In particular I’m concerned about the impact on Rust, since they’ll pin LLVM until the LLVM 19 release. About 60% of Fuchsia is implemented in rust. More if you count only count userland. We’re hoping to avoid a situation where

[llvm-branch-commits] [clang] [llvm] Backport "riscv-isa" module metadata to 18.x (PR #91514)

topperc wrote: > Can you briefly summarize why this is important to backport? At first glance, > this is only relevant for LTO with mixed architecture specifications, > which... I can see someone might want it, I guess, but it seems pretty easy > to work around not having it. It's not just

[llvm-branch-commits] [clang] [llvm] Backport "riscv-isa" module metadata to 18.x (PR #91514)

efriedma-quic wrote: Can you briefly summarize why this is important to backport? At first glance, this is only relevant for LTO with mixed architecture specifications, which... I can see someone might want it, I guess, but it seems pretty easy to work around not having it.

[llvm-branch-commits] [clang] [llvm] Backport "riscv-isa" module metadata to 18.x (PR #91514)

https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/91514 >From ee109e3627e5b93297bfc7908f684eedb5feb5ec Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Tue, 13 Feb 2024 16:17:50 -0800 Subject: [PATCH 1/3] [RISCV] Add canonical ISA string as Module metadata in IR.

[llvm-branch-commits] [clang] [llvm] Backport "riscv-isa" module metadata to 18.x (PR #91514)

llvmbot wrote: @llvm/pr-subscribers-backend-risc-v Author: Craig Topper (topperc) Changes Resolves #91513 --- Patch is 57.83 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/91514.diff 10 Files Affected: - (modified)

[llvm-branch-commits] [clang] [llvm] Backport "riscv-isa" module metadata to 18.x (PR #91514)

https://github.com/topperc created https://github.com/llvm/llvm-project/pull/91514 Resolves #91513 >From f45df1cf1b74957e2f9609b982e964654f9af824 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Tue, 13 Feb 2024 16:17:50 -0800 Subject: [PATCH 1/3] [RISCV] Add canonical ISA string as Module

[llvm-branch-commits] [clang] [llvm] Backport "riscv-isa" module metadata to 18.x (PR #91514)

https://github.com/topperc milestoned https://github.com/llvm/llvm-project/pull/91514 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits