subject:"\[llvm\-branch\-commits\] \[llvm\] \[RISCV\] Use larger copies when register tuples are aligned $PR #84455$"

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-04-07 Thread Pengcheng Wang via llvm-branch-commits

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/84455 >From 35d0ea085b43a67c092e6263e6ec9d34e66e1453 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Tue, 12 Mar 2024 17:31:47 +0800 Subject: [PATCH 01/10] Reduce copies Created using spr 1.3.4 ---

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-04-07 Thread Pengcheng Wang via llvm-branch-commits

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/84455 >From 35d0ea085b43a67c092e6263e6ec9d34e66e1453 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Tue, 12 Mar 2024 17:31:47 +0800 Subject: [PATCH 1/9] Reduce copies Created using spr 1.3.4 ---

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-04-07 Thread Pengcheng Wang via llvm-branch-commits

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/84455 >From 35d0ea085b43a67c092e6263e6ec9d34e66e1453 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Tue, 12 Mar 2024 17:31:47 +0800 Subject: [PATCH 1/9] Reduce copies Created using spr 1.3.4 ---

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-04-05 Thread Luke Lau via llvm-branch-commits

https://github.com/lukel97 approved this pull request. https://github.com/llvm/llvm-project/pull/84455 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-04-02 Thread Pengcheng Wang via llvm-branch-commits

@@ -212,19 +185,13 @@ body: | ; CHECK-NEXT: $v7 = VMV1R_V $v14 ; CHECK-NEXT: $v8 = VMV1R_V $v15 ; CHECK-NEXT: $v9 = VMV1R_V $v16 -; CHECK-NEXT: $v4 = VMV1R_V $v10 -; CHECK-NEXT: $v5 = VMV1R_V $v11 -; CHECK-NEXT: $v6 = VMV1R_V $v12 -;

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-04-02 Thread Pengcheng Wang via llvm-branch-commits

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/84455 >From 35d0ea085b43a67c092e6263e6ec9d34e66e1453 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Tue, 12 Mar 2024 17:31:47 +0800 Subject: [PATCH 1/6] Reduce copies Created using spr 1.3.4 ---

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-04-02 Thread Craig Topper via llvm-branch-commits

@@ -212,19 +185,13 @@ body: | ; CHECK-NEXT: $v7 = VMV1R_V $v14 ; CHECK-NEXT: $v8 = VMV1R_V $v15 ; CHECK-NEXT: $v9 = VMV1R_V $v16 -; CHECK-NEXT: $v4 = VMV1R_V $v10 -; CHECK-NEXT: $v5 = VMV1R_V $v11 -; CHECK-NEXT: $v6 = VMV1R_V $v12 -;

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-04-02 Thread Craig Topper via llvm-branch-commits

@@ -212,19 +185,13 @@ body: | ; CHECK-NEXT: $v7 = VMV1R_V $v14 ; CHECK-NEXT: $v8 = VMV1R_V $v15 ; CHECK-NEXT: $v9 = VMV1R_V $v16 -; CHECK-NEXT: $v4 = VMV1R_V $v10 -; CHECK-NEXT: $v5 = VMV1R_V $v11 -; CHECK-NEXT: $v6 = VMV1R_V $v12 -;

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-04-01 Thread Pengcheng Wang via llvm-branch-commits

wangpc-pp wrote: Ping. Are there any more comments? https://github.com/llvm/llvm-project/pull/84455 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-31 Thread Luke Lau via llvm-branch-commits

@@ -302,102 +302,98 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock , RISCVII::VLMUL LMul, unsigned NF) const { const TargetRegisterInfo *TRI = STI.getRegisterInfo(); - unsigned Opc; - unsigned SubRegIdx; - unsigned

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-31 Thread Wang Pengcheng via llvm-branch-commits

@@ -302,102 +302,98 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock , RISCVII::VLMUL LMul, unsigned NF) const { const TargetRegisterInfo *TRI = STI.getRegisterInfo(); - unsigned Opc; - unsigned SubRegIdx; - unsigned

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-29 Thread Luke Lau via llvm-branch-commits

@@ -302,102 +302,98 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock , RISCVII::VLMUL LMul, unsigned NF) const { const TargetRegisterInfo *TRI = STI.getRegisterInfo(); - unsigned Opc; - unsigned SubRegIdx; - unsigned

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-27 Thread Wang Pengcheng via llvm-branch-commits

@@ -302,102 +302,98 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock , RISCVII::VLMUL LMul, unsigned NF) const { const TargetRegisterInfo *TRI = STI.getRegisterInfo(); - unsigned Opc; - unsigned SubRegIdx; - unsigned

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-27 Thread Wang Pengcheng via llvm-branch-commits

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/84455 >From 35d0ea085b43a67c092e6263e6ec9d34e66e1453 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Tue, 12 Mar 2024 17:31:47 +0800 Subject: [PATCH 1/5] Reduce copies Created using spr 1.3.4 ---

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-26 Thread Luke Lau via llvm-branch-commits

@@ -212,19 +185,13 @@ body: | ; CHECK-NEXT: $v7 = VMV1R_V $v14 ; CHECK-NEXT: $v8 = VMV1R_V $v15 ; CHECK-NEXT: $v9 = VMV1R_V $v16 -; CHECK-NEXT: $v4 = VMV1R_V $v10 -; CHECK-NEXT: $v5 = VMV1R_V $v11 -; CHECK-NEXT: $v6 = VMV1R_V $v12 -;

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-26 Thread Luke Lau via llvm-branch-commits

@@ -302,102 +302,98 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock , RISCVII::VLMUL LMul, unsigned NF) const { const TargetRegisterInfo *TRI = STI.getRegisterInfo(); - unsigned Opc; - unsigned SubRegIdx; - unsigned

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-26 Thread Luke Lau via llvm-branch-commits

@@ -302,102 +302,98 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock , RISCVII::VLMUL LMul, unsigned NF) const { const TargetRegisterInfo *TRI = STI.getRegisterInfo(); - unsigned Opc; - unsigned SubRegIdx; - unsigned

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-25 Thread Wang Pengcheng via llvm-branch-commits

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/84455 >From 35d0ea085b43a67c092e6263e6ec9d34e66e1453 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Tue, 12 Mar 2024 17:31:47 +0800 Subject: [PATCH 1/4] Reduce copies Created using spr 1.3.4 ---

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-25 Thread Wang Pengcheng via llvm-branch-commits

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/84455 >From 35d0ea085b43a67c092e6263e6ec9d34e66e1453 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Tue, 12 Mar 2024 17:31:47 +0800 Subject: [PATCH 1/3] Reduce copies Created using spr 1.3.4 ---

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-25 Thread Wang Pengcheng via llvm-branch-commits

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/84455 >From 35d0ea085b43a67c092e6263e6ec9d34e66e1453 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Tue, 12 Mar 2024 17:31:47 +0800 Subject: [PATCH 1/3] Reduce copies Created using spr 1.3.4 ---

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-24 Thread Wang Pengcheng via llvm-branch-commits

@@ -146,16 +127,12 @@ body: | ; CHECK-NEXT: $v7 = VMV1R_V $v12 ; CHECK-NEXT: $v8 = VMV1R_V $v13 ; CHECK-NEXT: $v9 = VMV1R_V $v14 -; CHECK-NEXT: $v6 = VMV1R_V $v10 -; CHECK-NEXT: $v7 = VMV1R_V $v11 -; CHECK-NEXT: $v8 = VMV1R_V $v12 -;

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-24 Thread Luke Lau via llvm-branch-commits

@@ -146,16 +127,12 @@ body: | ; CHECK-NEXT: $v7 = VMV1R_V $v12 ; CHECK-NEXT: $v8 = VMV1R_V $v13 ; CHECK-NEXT: $v9 = VMV1R_V $v14 -; CHECK-NEXT: $v6 = VMV1R_V $v10 -; CHECK-NEXT: $v7 = VMV1R_V $v11 -; CHECK-NEXT: $v8 = VMV1R_V $v12 -;

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-24 Thread Luke Lau via llvm-branch-commits

@@ -146,16 +127,12 @@ body: | ; CHECK-NEXT: $v7 = VMV1R_V $v12 ; CHECK-NEXT: $v8 = VMV1R_V $v13 ; CHECK-NEXT: $v9 = VMV1R_V $v14 -; CHECK-NEXT: $v6 = VMV1R_V $v10 -; CHECK-NEXT: $v7 = VMV1R_V $v11 -; CHECK-NEXT: $v8 = VMV1R_V $v12 -;

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-24 Thread Luke Lau via llvm-branch-commits

@@ -302,102 +302,81 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock , RISCVII::VLMUL LMul, unsigned NF) const { const TargetRegisterInfo *TRI = STI.getRegisterInfo(); - unsigned Opc; - unsigned SubRegIdx; - unsigned

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-24 Thread Wang Pengcheng via llvm-branch-commits

@@ -302,102 +302,81 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock , RISCVII::VLMUL LMul, unsigned NF) const { const TargetRegisterInfo *TRI = STI.getRegisterInfo(); - unsigned Opc; - unsigned SubRegIdx; - unsigned

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-24 Thread Luke Lau via llvm-branch-commits

@@ -302,102 +302,81 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock , RISCVII::VLMUL LMul, unsigned NF) const { const TargetRegisterInfo *TRI = STI.getRegisterInfo(); - unsigned Opc; - unsigned SubRegIdx; - unsigned

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-24 Thread Wang Pengcheng via llvm-branch-commits

wangpc-pp wrote: Ping. https://github.com/llvm/llvm-project/pull/84455 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-14 Thread Wang Pengcheng via llvm-branch-commits

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/84455 >From 35d0ea085b43a67c092e6263e6ec9d34e66e1453 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Tue, 12 Mar 2024 17:31:47 +0800 Subject: [PATCH 1/3] Reduce copies Created using spr 1.3.4 ---

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-14 Thread Wang Pengcheng via llvm-branch-commits

@@ -302,102 +302,87 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock , RISCVII::VLMUL LMul, unsigned NF) const { const TargetRegisterInfo *TRI = STI.getRegisterInfo(); - unsigned Opc; - unsigned SubRegIdx; - unsigned

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-14 Thread Wang Pengcheng via llvm-branch-commits

@@ -302,102 +302,87 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock , RISCVII::VLMUL LMul, unsigned NF) const { const TargetRegisterInfo *TRI = STI.getRegisterInfo(); - unsigned Opc; - unsigned SubRegIdx; - unsigned

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-14 Thread Wang Pengcheng via llvm-branch-commits

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/84455 >From 35d0ea085b43a67c092e6263e6ec9d34e66e1453 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Tue, 12 Mar 2024 17:31:47 +0800 Subject: [PATCH 1/2] Reduce copies Created using spr 1.3.4 ---

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-12 Thread Craig Topper via llvm-branch-commits

@@ -302,102 +302,87 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock , RISCVII::VLMUL LMul, unsigned NF) const { const TargetRegisterInfo *TRI = STI.getRegisterInfo(); - unsigned Opc; - unsigned SubRegIdx; - unsigned

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-12 Thread Craig Topper via llvm-branch-commits

@@ -302,102 +302,87 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock , RISCVII::VLMUL LMul, unsigned NF) const { const TargetRegisterInfo *TRI = STI.getRegisterInfo(); - unsigned Opc; - unsigned SubRegIdx; - unsigned

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-12 Thread Craig Topper via llvm-branch-commits

@@ -302,102 +302,87 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock , RISCVII::VLMUL LMul, unsigned NF) const { const TargetRegisterInfo *TRI = STI.getRegisterInfo(); - unsigned Opc; - unsigned SubRegIdx; - unsigned

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-12 Thread Craig Topper via llvm-branch-commits

@@ -302,102 +302,87 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock , RISCVII::VLMUL LMul, unsigned NF) const { const TargetRegisterInfo *TRI = STI.getRegisterInfo(); - unsigned Opc; - unsigned SubRegIdx; - unsigned

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-12 Thread Craig Topper via llvm-branch-commits

https://github.com/topperc edited https://github.com/llvm/llvm-project/pull/84455 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-12 Thread Craig Topper via llvm-branch-commits

@@ -302,102 +302,87 @@ void RISCVInstrInfo::copyPhysRegVector(MachineBasicBlock , RISCVII::VLMUL LMul, unsigned NF) const { const TargetRegisterInfo *TRI = STI.getRegisterInfo(); - unsigned Opc; - unsigned SubRegIdx; - unsigned

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-12 Thread Wang Pengcheng via llvm-branch-commits

https://github.com/wangpc-pp ready_for_review https://github.com/llvm/llvm-project/pull/84455 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-12 Thread Wang Pengcheng via llvm-branch-commits

https://github.com/wangpc-pp edited https://github.com/llvm/llvm-project/pull/84455 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [RISCV] Use larger copies when register tuples are aligned (PR #84455)

2024-03-12 Thread Wang Pengcheng via llvm-branch-commits

https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/84455 >From 35d0ea085b43a67c092e6263e6ec9d34e66e1453 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Tue, 12 Mar 2024 17:31:47 +0800 Subject: [PATCH] Reduce copies Created using spr 1.3.4 ---

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