[llvm-branch-commits] [clang] 261253a - [Clang][docs] Add preprocessor changes to ReleaseNotes.

Author: Michael Kruse Date: 2022-03-02T13:01:28-06:00 New Revision: 261253aa60cc10f21788fb55ae27152242a65989 URL: https://github.com/llvm/llvm-project/commit/261253aa60cc10f21788fb55ae27152242a65989 DIFF: https://github.com/llvm/llvm-project/commit/261253aa60cc10f21788fb55ae27152242a65989.diff

[llvm-branch-commits] [llvm] a98c04d - [Attributor][FIX] Use liveness information of the right function

Author: Johannes Doerfert Date: 2022-03-02T12:48:04-08:00 New Revision: a98c04d58930814f4ff00293ffd14feca57feafa URL: https://github.com/llvm/llvm-project/commit/a98c04d58930814f4ff00293ffd14feca57feafa DIFF: https://github.com/llvm/llvm-project/commit/a98c04d58930814f4ff00293ffd14feca57feafa.d

[llvm-branch-commits] [llvm] 6d5afef - [examples][BuildingAJIT] Use the right layer when adding code in Chapter 3.

Author: Lang Hames Date: 2022-03-02T12:59:20-08:00 New Revision: 6d5afef3a7e6c2c9cc3bdb79e9d0fc88345e0e51 URL: https://github.com/llvm/llvm-project/commit/6d5afef3a7e6c2c9cc3bdb79e9d0fc88345e0e51 DIFF: https://github.com/llvm/llvm-project/commit/6d5afef3a7e6c2c9cc3bdb79e9d0fc88345e0e51.diff LO

[llvm-branch-commits] [llvm] 4fde843 - [ORC] Set ResolverBlockAddr in EPCIndirectionUtils::writeResolverBlock.

Author: Lang Hames Date: 2022-03-02T12:59:20-08:00 New Revision: 4fde843cd5c08c16f15d11308bdefc7bd2af0302 URL: https://github.com/llvm/llvm-project/commit/4fde843cd5c08c16f15d11308bdefc7bd2af0302 DIFF: https://github.com/llvm/llvm-project/commit/4fde843cd5c08c16f15d11308bdefc7bd2af0302.diff LO

[llvm-branch-commits] [clang] f1e7f84 - [clang][tests] Fix ve-toolchain tests with CLANG_DEFAULT_UNWINDLIB

Author: Timm Bäder Date: 2022-03-02T12:59:40-08:00 New Revision: f1e7f848bf3e84906fda52975dbcfc6825710987 URL: https://github.com/llvm/llvm-project/commit/f1e7f848bf3e84906fda52975dbcfc6825710987 DIFF: https://github.com/llvm/llvm-project/commit/f1e7f848bf3e84906fda52975dbcfc6825710987.diff LO

[llvm-branch-commits] [llvm] 65d5327 - [RISCV] More correctly ignore Zfinx register classes in getRegForInlineAsmConstraint.

Author: Shao-Ce SUN Date: 2022-03-03T14:52:36+08:00 New Revision: 65d53279b1fddeae4bd455d588ea7527aed50bb9 URL: https://github.com/llvm/llvm-project/commit/65d53279b1fddeae4bd455d588ea7527aed50bb9 DIFF: https://github.com/llvm/llvm-project/commit/65d53279b1fddeae4bd455d588ea7527aed50bb9.diff L