Author: Djordje Todorovic
Date: 2024-12-19T09:58:25+01:00
New Revision: 7ba9273aff8c6f665316c638aa83620226ddaf83
URL:
https://github.com/llvm/llvm-project/commit/7ba9273aff8c6f665316c638aa83620226ddaf83
DIFF:
https://github.com/llvm/llvm-project/commit/7ba9273aff8c6f665316c638aa83620226ddaf83.d
@@ -887,6 +887,9 @@ struct CounterCoverageMappingBuilder
/// The map of statements to count values.
llvm::DenseMap &CounterMap;
+ CounterExpressionBuilder::ReplaceMap MapToExpand;
+ unsigned NextCounterNum;
chapuni wrote:
The only user shall initialize
@@ -1193,11 +1206,26 @@ std::pair
CodeGenPGO::getIsCounterPair(const Stmt *S) const {
}
void CodeGenPGO::emitCounterSetOrIncrement(CGBuilderTy &Builder, const Stmt *S,
+ bool UseSkipPath, bool UseBoth,
@@ -638,6 +638,10 @@ static unsigned getMaxCounterID(const
CounterMappingContext &Ctx,
unsigned MaxCounterID = 0;
for (const auto &Region : Record.MappingRegions) {
MaxCounterID = std::max(MaxCounterID, Ctx.getMaxCounterID(Region.Count));
+if (Region.Kind == Counte
@@ -241,26 +242,25 @@ computeOffset(ProgramStateRef State, SValBuilder &SVB,
SVal Location) {
static std::pair
getSimplifiedOffsets(NonLoc offset, nonloc::ConcreteInt extent,
SValBuilder &svalBuilder) {
+ const llvm::APSInt &extentVal = extent.getValue();
llvmbot wrote:
@llvm/pr-subscribers-backend-x86
@llvm/pr-subscribers-llvm-selectiondag
Author: None (jofrn)
Changes
`load atomic ` is not valid. This change widens
vector types of atomic load in SelectionDAG
so that it can translate aligned vectors of >1 size.
---
**Stack**:
- #12
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120386
>From b4f0562744c111e21a8cb31269a5433bd0edf763 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:38:23 -0500
Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG
When lowering atom
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120387
>From 37e162b6c33dbd9feebe5939986a0efb2abf937c Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:40:32 -0500
Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes.
Unaligned atomic ve
https://github.com/jofrn created
https://github.com/llvm/llvm-project/pull/120598
`load atomic ` is not valid. This change widens
vector types of atomic load in SelectionDAG
so that it can translate aligned vectors of >1 size.
---
**Stack**:
- #120387
- #120386
- #120385
- #120384
⚠️ *Part o
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120385
>From 3796cf709c242c76dd14d52aa40e8e54c9841d15 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:37:17 -0500
Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load
`load atomic
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120386
>From b4f0562744c111e21a8cb31269a5433bd0edf763 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:38:23 -0500
Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG
When lowering atom
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120385
>From 3796cf709c242c76dd14d52aa40e8e54c9841d15 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:37:17 -0500
Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load
`load atomic
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120387
>From 37e162b6c33dbd9feebe5939986a0efb2abf937c Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:40:32 -0500
Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes.
Unaligned atomic ve
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 37e162b6c33dbd9feebe5939986a0efb2abf937c
d5cbbec6bb3c54592e801c033903358b6cbce6f1 --e
https://github.com/steakhal updated
https://github.com/llvm/llvm-project/pull/120437
>From e82a47f0efe7cba42891b14889ac41a4140b Mon Sep 17 00:00:00 2001
From: Balazs Benics
Date: Wed, 18 Dec 2024 15:57:26 +0100
Subject: [PATCH] [analyzer][NFC] Migrate loc::ConcreteInt to use APSIntPtr
(3/4
https://github.com/steakhal updated
https://github.com/llvm/llvm-project/pull/120438
>From 1f31cdcbf265be767ef5ae4a44f1e28002faba8f Mon Sep 17 00:00:00 2001
From: Balazs Benics
Date: Wed, 18 Dec 2024 15:59:23 +0100
Subject: [PATCH] [analyzer][NFC] Migrate {SymInt,IntSym}Expr to use APSIntPtr
(
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120387
>From 0564ecbe0f1f97f58421039b565f2de168ff357f Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:40:32 -0500
Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes.
Unaligned atomic ve
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120385
>From 4d0be71839fe8d5e9e7242fb616b8b3f9fcb9a5e Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:37:17 -0500
Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load
`load atomic
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120387
>From 0564ecbe0f1f97f58421039b565f2de168ff357f Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:40:32 -0500
Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes.
Unaligned atomic ve
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120386
>From b336c251e05e5a3591dfa4232fb93e245961de4a Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:38:23 -0500
Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG
When lowering atom
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120387
>From 0564ecbe0f1f97f58421039b565f2de168ff357f Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:40:32 -0500
Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes.
Unaligned atomic ve
https://github.com/jofrn edited https://github.com/llvm/llvm-project/pull/120387
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https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120387
>From f7691a8b3c3dccabc106ac21964ef5c86cda8c01 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:40:32 -0500
Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes.
Unaligned atomic ve
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120387
>From f7691a8b3c3dccabc106ac21964ef5c86cda8c01 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:40:32 -0500
Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes.
Unaligned atomic ve
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120385
>From 5f30edff1e50df5e04f8d59a8da38809c5beb845 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:37:17 -0500
Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load
`load atomic
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120387
>From f7691a8b3c3dccabc106ac21964ef5c86cda8c01 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:40:32 -0500
Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes.
Unaligned atomic ve
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120385
>From 5f30edff1e50df5e04f8d59a8da38809c5beb845 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:37:17 -0500
Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load
`load atomic
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120598
>From cbaaeeb0edb63f1d158435d8ba68109f62ef52a6 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Thu, 19 Dec 2024 11:19:39 -0500
Subject: [PATCH] [SelectionDAG] Widen vector types for atomic load
`load atomic ` is not
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120386
>From e0a02b6ddfd8aa827e3d61a3fc455ace49c16fed Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:38:23 -0500
Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG
When lowering atom
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120598
>From cbaaeeb0edb63f1d158435d8ba68109f62ef52a6 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Thu, 19 Dec 2024 11:19:39 -0500
Subject: [PATCH] [SelectionDAG] Widen vector types for atomic load
`load atomic ` is not
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120386
>From e0a02b6ddfd8aa827e3d61a3fc455ace49c16fed Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:38:23 -0500
Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG
When lowering atom
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120598
>From cbaaeeb0edb63f1d158435d8ba68109f62ef52a6 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Thu, 19 Dec 2024 11:19:39 -0500
Subject: [PATCH] [SelectionDAG] Widen vector types for atomic load
`load atomic ` is not
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120386
>From e0a02b6ddfd8aa827e3d61a3fc455ace49c16fed Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:38:23 -0500
Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG
When lowering atom
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120385
>From 5f30edff1e50df5e04f8d59a8da38809c5beb845 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:37:17 -0500
Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load
`load atomic
@@ -59,15 +59,11 @@ class LiveRegMatrix {
unsigned RegMaskVirtReg = 0;
BitVector RegMaskUsable;
- LiveRegMatrix() = default;
+ LiveRegMatrix() : LIUAlloc(new LiveIntervalUnion::Allocator()) {};
mtrofin wrote:
nit: could also do `LIUAlloc(std::make_uniqu
https://github.com/mtrofin approved this pull request.
https://github.com/llvm/llvm-project/pull/120556
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llvmbot wrote:
@llvm/pr-subscribers-backend-aarch64
Author: Akshat Oke (optimisan)
Changes
Use `-passes="regallocgreedy<[all|sgpr|wwm|vgpr]>` to insert the greedy
RA with a filter and `-regalloc-npm=` to control which RA to use in
existing pipeline.
`-regalloc-npm=` is not
llvmbot wrote:
@llvm/pr-subscribers-backend-systemz
Author: Akshat Oke (optimisan)
Changes
Use `-passes="regallocgreedy<[all|sgpr|wwm|vgpr]>` to insert the greedy
RA with a filter and `-regalloc-npm=` to control which RA to use in
existing pipeline.
`-regalloc-npm=` is not
jyknight wrote:
> At this PR, this is the expectation. A later PR needs to handle the other
> vector legalization cases
Well, it also doesn't work after the rest of the series.
As a general comment, I find it difficult to review a series of PRs where the
intermediate state between them is bro
https://github.com/steakhal updated
https://github.com/llvm/llvm-project/pull/120436
>From 09aa29dd6cb4e22e5541ed7c1aaeb715772c3393 Mon Sep 17 00:00:00 2001
From: Balazs Benics
Date: Wed, 18 Dec 2024 15:55:27 +0100
Subject: [PATCH] [analyzer][NFC] Migrate nonloc::ConcreteInt to use APSIntPtr
(
https://github.com/steakhal updated
https://github.com/llvm/llvm-project/pull/120437
>From 0daf63ef3f8607dcc9f290c94db210cf462cc75f Mon Sep 17 00:00:00 2001
From: Balazs Benics
Date: Wed, 18 Dec 2024 15:57:26 +0100
Subject: [PATCH] [analyzer][NFC] Migrate loc::ConcreteInt to use APSIntPtr
(3/4
https://github.com/steakhal updated
https://github.com/llvm/llvm-project/pull/120438
>From d9346f24cbc8930baefb8f17bb88745bc63f0e7e Mon Sep 17 00:00:00 2001
From: Balazs Benics
Date: Wed, 18 Dec 2024 15:59:23 +0100
Subject: [PATCH] [analyzer][NFC] Migrate {SymInt,IntSym}Expr to use APSIntPtr
(
https://github.com/optimisan edited
https://github.com/llvm/llvm-project/pull/120556
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https://github.com/llvm/llvm-project/pull/119540
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https://github.com/matthias-springer edited
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llvmbot wrote:
@llvm/pr-subscribers-llvm-support
Author: Akshat Oke (optimisan)
Changes
...discovered missing while running RAGreedy through the NPM which relies on
moving analyses to the cache.
---
Full diff: https://github.com/llvm/llvm-project/pull/120555.diff
1 Files Affected:
- (
@@ -2595,6 +2595,10 @@ X86TargetLowering::X86TargetLowering(const
X86TargetMachine &TM,
setOperationAction(Op, MVT::f32, Promote);
}
+ setOperationPromotedToType(ISD::ATOMIC_LOAD, MVT::f16, MVT::i16);
RKSimon wrote:
Handle bf16 as well?
https://g
llvmbot wrote:
@llvm/pr-subscribers-mlir-llvm
Author: Matthias Springer (matthias-springer)
Changes
Do not run `cf-to-llvm as part of `func-to-llvm`. This commit fixes
https://github.com/llvm/llvm-project/issues/70982.
This commit changes the way how `func.func` ops are lowered to LLVM.
https://github.com/matthias-springer created
https://github.com/llvm/llvm-project/pull/120580
Do not run `cf-to-llvm as part of `func-to-llvm`. This commit fixes
https://github.com/llvm/llvm-project/issues/70982.
This commit changes the way how `func.func` ops are lowered to LLVM.
Previously,
https://github.com/matthias-springer edited
https://github.com/llvm/llvm-project/pull/120580
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https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/120557
>From f93228ae0597667a7be51dd062f4d31ff2d7f4cf Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 11 Dec 2024 10:57:21 +
Subject: [PATCH 1/4] [RegAlloc][NewPM] Plug Greedy RA in codegen pipeline
---
ll
https://github.com/optimisan ready_for_review
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https://github.com/zero9178 approved this pull request.
LGTM!
https://github.com/llvm/llvm-project/pull/120580
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@@ -94,106 +94,111 @@ struct AssertOpLowering : public
ConvertOpToLLVMPattern {
bool abortOnFailedAssert = true;
};
-/// The cf->LLVM lowerings for branching ops require that the blocks they jump
-/// to first have updated types which should be handled by a pattern operatin
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120386
>From 7ef2576d0b9fe87d81bc2d9d3dd39d30c147a59f Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:38:23 -0500
Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG
When lowering atom
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120385
>From 601c0097843c0dce54d30421dc9c99f76c0772ff Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:37:17 -0500
Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load
`load atomic
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120387
>From 454b8e6f752cfeb9fedc5657b60d9ceec9b54ab0 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:40:32 -0500
Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes.
Unaligned atomic ve
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120387
>From 454b8e6f752cfeb9fedc5657b60d9ceec9b54ab0 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:40:32 -0500
Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes.
Unaligned atomic ve
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120386
>From 7ef2576d0b9fe87d81bc2d9d3dd39d30c147a59f Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:38:23 -0500
Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG
When lowering atom
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120385
>From 601c0097843c0dce54d30421dc9c99f76c0772ff Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:37:17 -0500
Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load
`load atomic
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120385
>From 601c0097843c0dce54d30421dc9c99f76c0772ff Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:37:17 -0500
Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load
`load atomic
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120387
>From 454b8e6f752cfeb9fedc5657b60d9ceec9b54ab0 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:40:32 -0500
Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes.
Unaligned atomic ve
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120386
>From 7ef2576d0b9fe87d81bc2d9d3dd39d30c147a59f Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:38:23 -0500
Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG
When lowering atom
jofrn wrote:
> As a general comment, I find it difficult to review a series of PRs where the
> intermediate state between them is broken, and without any clear indication
> as to what is and isn't supposed to work after each PR.
The tests posted in the review work from that point on, except fo
jyknight wrote:
> The tests posted in the review work from that point on, except [...]
Sure, I agree that the tests which have been added pass. But the tests do not
currently test everything necessary for this feature to be complete.
What I see here is a series of PRs each adding some part of
dwblaikie wrote:
Unit test coverage?
https://github.com/llvm/llvm-project/pull/120555
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https://github.com/steakhal updated
https://github.com/llvm/llvm-project/pull/120436
>From d9ce18fd77617480703c677ad7053516fb2c68f9 Mon Sep 17 00:00:00 2001
From: Balazs Benics
Date: Wed, 18 Dec 2024 15:55:27 +0100
Subject: [PATCH] [analyzer][NFC] Migrate nonloc::ConcreteInt to use APSIntPtr
(
https://github.com/steakhal updated
https://github.com/llvm/llvm-project/pull/120438
>From 45c13070865e7474a13f1d843d13f5eb4ceafa29 Mon Sep 17 00:00:00 2001
From: Balazs Benics
Date: Wed, 18 Dec 2024 15:59:23 +0100
Subject: [PATCH] [analyzer][NFC] Migrate {SymInt,IntSym}Expr to use APSIntPtr
(
https://github.com/steakhal updated
https://github.com/llvm/llvm-project/pull/120437
>From 9841a76e62ad9d9bcdea3ff8c066c19f113c2615 Mon Sep 17 00:00:00 2001
From: Balazs Benics
Date: Wed, 18 Dec 2024 15:57:26 +0100
Subject: [PATCH] [analyzer][NFC] Migrate loc::ConcreteInt to use APSIntPtr
(3/4
https://github.com/steakhal updated
https://github.com/llvm/llvm-project/pull/120438
>From 9bd5b4a297899aeae6bd6ce6373319e1933fc7d8 Mon Sep 17 00:00:00 2001
From: Balazs Benics
Date: Wed, 18 Dec 2024 15:59:23 +0100
Subject: [PATCH] [analyzer][NFC] Migrate {SymInt,IntSym}Expr to use APSIntPtr
(
https://github.com/optimisan ready_for_review
https://github.com/llvm/llvm-project/pull/120556
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https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/118462
>From f29c9e1026e304bc2a559ff8521a0ce566246499 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Tue, 3 Dec 2024 10:12:36 +
Subject: [PATCH 1/2] [CodeGen][NewPM] Port RegAllocPriorityAdvisor analysis to
NPM
https://github.com/optimisan edited
https://github.com/llvm/llvm-project/pull/119540
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https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/119540
error: too big or took too long to generate
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https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/119181
>From f336e93bb82a135efe79195239e1d7379de7e082 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Mon, 9 Dec 2024 07:58:48 +
Subject: [PATCH] Spiller: Deatach legacy pass and supply analyses instead
---
llv
https://github.com/optimisan created
https://github.com/llvm/llvm-project/pull/120554
None
>From d9acb7c026852d1291e071377844692b1d49fd15 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Mon, 16 Dec 2024 08:48:41 +
Subject: [PATCH] [NewPm][CodeGen] Record parameterized machine pass names to
https://github.com/optimisan created
https://github.com/llvm/llvm-project/pull/120555
None
>From 982ad41024bc268a0a20c2458402035ed4ef0045 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Thu, 19 Dec 2024 06:57:46 +
Subject: [PATCH] [Support] Recycler: Implement move constructor
---
llvm/i
https://github.com/optimisan created
https://github.com/llvm/llvm-project/pull/120557
[RegAlloc][NewPM] Plug Greedy RA in codegen pipeline
Error out on AMDGPU for regalloc-npm flag
>From f93228ae0597667a7be51dd062f4d31ff2d7f4cf Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 11 Dec 2024
optimisan wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/120554?utm_source=stack-comment-downstack-mergeability-warning
optimisan wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/120556?utm_source=stack-comment-downstack-mergeability-warning
optimisan wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/120557?utm_source=stack-comment-downstack-mergeability-warning
https://github.com/optimisan created
https://github.com/llvm/llvm-project/pull/120556
None
>From 516482f2e6eeffacff60807253322bda090f24aa Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Thu, 19 Dec 2024 08:33:48 +
Subject: [PATCH] [CodeGen] LiveRegMatrix: Use allocator through a unique_ptr
optimisan wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/120555?utm_source=stack-comment-downstack-mergeability-warning
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 516482f2e6eeffacff60807253322bda090f24aa
20eede6d14e5af2c536d133278d42b5cd01820c9 --e
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120598
>From 3f37dfcfe7c64e88a0ea7bb6a27c82d43a6876c8 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Thu, 19 Dec 2024 11:19:39 -0500
Subject: [PATCH] [SelectionDAG] Widen vector types for atomic load
`load atomic ` is not
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120598
>From 3f37dfcfe7c64e88a0ea7bb6a27c82d43a6876c8 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Thu, 19 Dec 2024 11:19:39 -0500
Subject: [PATCH] [SelectionDAG] Widen vector types for atomic load
`load atomic ` is not
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120386
>From 7ca91cce822c650fdb12a4ff567d1535693aeff9 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:38:23 -0500
Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG
When lowering atom
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120386
>From 7ca91cce822c650fdb12a4ff567d1535693aeff9 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:38:23 -0500
Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG
When lowering atom
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120385
>From 245acf76f68c5c84080a9e5d3e0727e6cd4e6d77 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:37:17 -0500
Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load
`load atomic
https://github.com/jofrn updated
https://github.com/llvm/llvm-project/pull/120387
>From 69525077a9a60df9ce7893ab604a1126ffe9ab09 Mon Sep 17 00:00:00 2001
From: jofrn
Date: Wed, 18 Dec 2024 03:40:32 -0500
Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes.
Unaligned atomic ve
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