[llvm-branch-commits] [CallGraphSection] Add call graph section options and documentation (PR #87572)

github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff c960e4d69a31fa560f45d5b1eb4ba069f47467fb 8d7d2f2b8e335cbeef6fb698ab67c6c0bba4a14b --e

[llvm-branch-commits] [CallSiteInfo][CallGraphSection] Extract and propagate indirect call type ids (PR #87575)

https://github.com/Prabhuk updated https://github.com/llvm/llvm-project/pull/87575 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/19.x: [InstCombine] Drop nsw in negation of select (PR #116097)

https://github.com/AreaZR updated https://github.com/llvm/llvm-project/pull/116097 >From 3065aa94735784806f305b09f7812858fe16fdd5 Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Fri, 8 Nov 2024 16:20:04 +0800 Subject: [PATCH] [InstCombine] Drop nsw in negation of select (#112893) Closes htt

[llvm-branch-commits] [llvm] release/19.x: [InstCombine] Drop nsw in negation of select (PR #116097)

AreaZR wrote: > The cherry-picks here fail to preserve authorship information. Fixed! https://github.com/llvm/llvm-project/pull/116097 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listi

[llvm-branch-commits] [llvm] release/19.x: [llvm][aarch64] Fix Arm64EC name mangling algorithm (#115567) (PR #116273)

llvmbot wrote: @llvm/pr-subscribers-llvm-ir Author: Daniel Paoliello (dpaoliello) Changes Arm64EC uses a special name mangling mode that adds `$$h` between the symbol name and its type. In MSVC's name mangling `@` is used to separate the name and type BUT it is also used for other purpos

[llvm-branch-commits] [clang] [flang] [lld] [llvm] [Flang] LLVM_ENABLE_RUNTIMES=flang-rt (PR #110217)

h-vetinari wrote: I've started trying to build out the state of this PR in conda-forge's infrastructure (which is a bit of a tedious process, because publicly available CI services have puny resources), will report back if I run into any issues. However, there's no need to wait if things are r

[llvm-branch-commits] [clang] [llvm][CallGraphSection] Handle type id metadata (PR #87573)

https://github.com/Prabhuk edited https://github.com/llvm/llvm-project/pull/87573 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/19.x: [SCEV] Fix sext handling for `getConstantMultiple` (#117093) (PR #117136)

llvmbot wrote: @llvm/pr-subscribers-llvm-transforms Author: None (llvmbot) Changes Backport 458dfbd855806461b4508bf8845cafe0411dbfd4 Requested by: @dtcxzyw --- Full diff: https://github.com/llvm/llvm-project/pull/117136.diff 3 Files Affected: - (modified) llvm/lib/Analysis/ScalarEvolu

[llvm-branch-commits] [llvm] release/19.x: [ConstraintElim] Bail out on non-dedicated exits when adding exiting conditions (#116627) (PR #117137)

llvmbot wrote: @llvm/pr-subscribers-llvm-transforms Author: None (llvmbot) Changes Backport 52361d0368b79841be12156bf03cf8c1851e5df7 Requested by: @antoniofrighetto --- Full diff: https://github.com/llvm/llvm-project/pull/117137.diff 2 Files Affected: - (modified) llvm/lib/Transforms/

[llvm-branch-commits] [llvm] release/19.x: [ConstraintElim] Bail out on non-dedicated exits when adding exiting conditions (#116627) (PR #117137)

https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/117137 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/19.x: [ConstraintElim] Bail out on non-dedicated exits when adding exiting conditions (#116627) (PR #117137)

https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/117137 Backport 52361d0368b79841be12156bf03cf8c1851e5df7 Requested by: @antoniofrighetto >From 4e3f5191928641fdf7298ee21fdf09ab0f17a53e Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Mon, 18 Nov 2024 23:41:04 +08

[llvm-branch-commits] [llvm] release/19.x: [ConstraintElim] Bail out on non-dedicated exits when adding exiting conditions (#116627) (PR #117137)

llvmbot wrote: @fhahn What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/117137 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinf

[llvm-branch-commits] [llvm] release/19.x: [MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (#114922) (PR #117105)

https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/117105 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/19.x: [MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (#114922) (PR #117105)

https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/117105 Backport 75c2888209473884cb3fa5720899d8199dafb8cb Requested by: @heiher >From 016267af967b8ff83d8ae2a98e1aeea8a5572f77 Mon Sep 17 00:00:00 2001 From: Zhaoxin Yang Date: Mon, 11 Nov 2024 16:46:22 +0800 Subject:

[llvm-branch-commits] [llvm] release/19.x: [MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (#114922) (PR #117105)

llvmbot wrote: @llvm/pr-subscribers-backend-loongarch Author: None (llvmbot) Changes Backport 75c2888209473884cb3fa5720899d8199dafb8cb Requested by: @heiher --- Full diff: https://github.com/llvm/llvm-project/pull/117105.diff 2 Files Affected: - (modified) llvm/lib/Target/LoongArch/MC

[llvm-branch-commits] [llvm] release/19.x: [MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (#114922) (PR #117105)

llvmbot wrote: @wangleiat What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/117105 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/lis

[llvm-branch-commits] [clang] e7efa82 - Revert "[TargetVersion] Only enable on RISC-V and AArch64 (#115991)"

Author: Piyou Chen Date: 2024-11-21T12:47:23+08:00 New Revision: e7efa82cb1362e8a2eae63fa66954327de50b88a URL: https://github.com/llvm/llvm-project/commit/e7efa82cb1362e8a2eae63fa66954327de50b88a DIFF: https://github.com/llvm/llvm-project/commit/e7efa82cb1362e8a2eae63fa66954327de50b88a.diff LO

[llvm-branch-commits] [llvm] [LoongArch] Fix GOT usage for `non-dso_local` function calls in large code model (PR #117134)

https://github.com/wangleiat milestoned https://github.com/llvm/llvm-project/pull/117134 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/19.x: [SCEV] Fix sext handling for `getConstantMultiple` (#117093) (PR #117136)

https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/117136 Backport 458dfbd855806461b4508bf8845cafe0411dbfd4 Requested by: @dtcxzyw >From f6c67ad7a20fe7bb535242c78b8f06cacc48d521 Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Thu, 21 Nov 2024 17:23:04 +0800 Subjec

[llvm-branch-commits] [llvm] release/19.x: [SCEV] Fix sext handling for `getConstantMultiple` (#117093) (PR #117136)

llvmbot wrote: @antoniofrighetto What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/117136 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mail

[llvm-branch-commits] [llvm] release/19.x: [SCEV] Fix sext handling for `getConstantMultiple` (#117093) (PR #117136)

https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/117136 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/19.x: [SCEV] Fix sext handling for `getConstantMultiple` (#117093) (PR #117136)

llvmbot wrote: @llvm/pr-subscribers-llvm-analysis Author: None (llvmbot) Changes Backport 458dfbd855806461b4508bf8845cafe0411dbfd4 Requested by: @dtcxzyw --- Full diff: https://github.com/llvm/llvm-project/pull/117136.diff 3 Files Affected: - (modified) llvm/lib/Analysis/ScalarEvoluti

[llvm-branch-commits] [llvm] release/19.x: [SDAG][ISel][TableGen][LoongArch] Report error for trivial bitcasts when there are predicate calls (#116075) (PR #116797)

https://github.com/wangleiat approved this pull request. https://github.com/llvm/llvm-project/pull/116797 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/19.x: [MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (#114922) (PR #117105)

https://github.com/wangleiat approved this pull request. https://github.com/llvm/llvm-project/pull/117105 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/19.x: [MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (#114922) (PR #117105)

wangleiat wrote: Some tests need to be fixed. ``` Failed Tests (3): LLVM :: CodeGen/LoongArch/e_flags.ll lld :: ELF/emulation-loongarch.s lld :: ELF/loongarch-interlink.test ``` https://github.com/llvm/llvm-project/pull/117105 ___ llvm-branch-com

[llvm-branch-commits] [llvm] [PassBuilder][CodeGen] Add callback style pass buider (PR #116913)

https://github.com/paperchalice edited https://github.com/llvm/llvm-project/pull/116913 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [lld] [llvm] release/19.x: [MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (#114922) (PR #117105)

heiher wrote: > Some tests need to be fixed. > > ``` > Failed Tests (3): > LLVM :: CodeGen/LoongArch/e_flags.ll > lld :: ELF/emulation-loongarch.s > lld :: ELF/loongarch-interlink.test > ``` Fixed. https://github.com/llvm/llvm-project/pull/117105 _

[llvm-branch-commits] [llvm] [LoongArch] Fix GOT usage for `non-dso_local` function calls in large code model (PR #117134)

https://github.com/wangleiat created https://github.com/llvm/llvm-project/pull/117134 This commit fixes an issue in the large code model where non-dso_local function calls did not use the GOT as expected in PIC mode. Instead, direct PC-relative access was incorrectly applied, leading to linker

[llvm-branch-commits] [llvm] [LoongArch] Fix GOT usage for `non-dso_local` function calls in large code model (PR #117134)

llvmbot wrote: @llvm/pr-subscribers-backend-loongarch Author: wanglei (wangleiat) Changes This commit fixes an issue in the large code model where non-dso_local function calls did not use the GOT as expected in PIC mode. Instead, direct PC-relative access was incorrectly applied, leading

[llvm-branch-commits] [llvm] [LoongArch] Fix GOT usage for `non-dso_local` function calls in large code model (PR #117134)

https://github.com/wangleiat edited https://github.com/llvm/llvm-project/pull/117134 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add v_mfma_f32_16x16x32_bf16 for gfx950 (PR #117053)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes --- Patch is 28.32 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/117053.diff 12 Files Affected: - (modified) clang/test/CodeGenOpenCL/builtins-amdg

[llvm-branch-commits] [llvm] release/19.x: [MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (#114922) (PR #117105)

heiher wrote: This backport is used to address a conditional compilation bug in Rust. see https://github.com/rust-lang/rust/issues/133276#issuecomment-2489955757 https://github.com/llvm/llvm-project/pull/117105 ___ llvm-branch-commits mailing list llv

[llvm-branch-commits] [lld] [llvm] release/19.x: [MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (#114922) (PR #117105)

https://github.com/heiher updated https://github.com/llvm/llvm-project/pull/117105 >From 016267af967b8ff83d8ae2a98e1aeea8a5572f77 Mon Sep 17 00:00:00 2001 From: Zhaoxin Yang Date: Mon, 11 Nov 2024 16:46:22 +0800 Subject: [PATCH 1/2] [MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (#11

[llvm-branch-commits] [llvm] [Github] Add new workflow to build metrics container (PR #117462)

llvmbot wrote: @llvm/pr-subscribers-github-workflow Author: Aiden Grossman (boomanaiden154) Changes This patch adds a new Github Actions workflow to build the metrics container and push it to the Github Container Registry. --- Full diff: https://github.com/llvm/llvm-project/pull/117462.d

[llvm-branch-commits] [libc] 590814b - Revert "[libc] Implement process_mrelease. (#117503)"

Author: lntue Date: 2024-11-26T18:02:08-05:00 New Revision: 590814b3d773187ca1fec7de170bde470a00a875 URL: https://github.com/llvm/llvm-project/commit/590814b3d773187ca1fec7de170bde470a00a875 DIFF: https://github.com/llvm/llvm-project/commit/590814b3d773187ca1fec7de170bde470a00a875.diff LOG: Re

[llvm-branch-commits] [compiler-rt] [TySan] Fix struct access with different bases (PR #108385)

https://github.com/gbMattN updated https://github.com/llvm/llvm-project/pull/108385 >From 4f5a7f198988a45fe64b9d1ba88e68a6d7f14e32 Mon Sep 17 00:00:00 2001 From: Matthew Nagy Date: Thu, 12 Sep 2024 12:36:57 + Subject: [PATCH 1/3] [TySan] Fix struct access with different bases --- compiler

[llvm-branch-commits] [llvm] AMDGPU: Make v2f16 minimum/maximum legal for gfx950 (PR #117738)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes --- Patch is 186.69 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/117738.diff 6 Files Affected: - (modified) llvm/lib/Target/AMDGPU/SIISelLowering.

[llvm-branch-commits] [compiler-rt] [TySan] Fix struct access with different bases (PR #108385)

https://github.com/gbMattN updated https://github.com/llvm/llvm-project/pull/108385 >From 4f5a7f198988a45fe64b9d1ba88e68a6d7f14e32 Mon Sep 17 00:00:00 2001 From: Matthew Nagy Date: Thu, 12 Sep 2024 12:36:57 + Subject: [PATCH 1/2] [TySan] Fix struct access with different bases --- compiler

[llvm-branch-commits] [compiler-rt] [TySan] Fix struct access with different bases (PR #108385)

github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff 8e6e62d0dee48a696afd0c7d53d74eaccef97b5e 6f795458c4c16522533dbdcb4d8ace299bfda9ff --e

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_pk_fp4_{f|bf}16 for gfx950 (PR #117794)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes These instructions have non-standard use of OPSEL bits to select dest write byte. The src2_modifiers operand is used without having its corresponding src2 operand by introducing dummy src2. OPSEL AS

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_sr_{f16|bf16}_f32 instructions (PR #117796)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes Co-authored-by: Shilei Tian --- Full diff: https://github.com/llvm/llvm-project/pull/117796.diff 7 Files Affected: - (modified) llvm/lib/Target/AMDGPU/AMDGPU.td (+10) - (mo

[llvm-branch-commits] [llvm] AMDGPU: MC support for V_CVT_SCALE_SR_FP4 instructions (PR #117795)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes Co-authored-by: Shilei Tian --- Full diff: https://github.com/llvm/llvm-project/pull/117795.diff 5 Files Affected: - (modified) llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmPar

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_sr_pk_fp4 instructions (PR #117798)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes Co-authored-by: Shilei Tian --- Patch is 32.71 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/117798.diff 8 Files Affected: - (

[llvm-branch-commits] [llvm] AMDGPU: MC support for v_cvt_scalef32_sr_{bf8|fp8}_{f16|bf16|f32} (PR #117797)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes Co-authored-by: Shilei Tian --- Full diff: https://github.com/llvm/llvm-project/pull/117797.diff 5 Files Affected: - (modified) llvm/lib/Target/AMDGPU/SIInstrInfo.td (+3) -

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtins & CodeGen support for v_cvt_scalef32_pk_{bf|f}16_{bf|fp}8 for gfx950 (PR #117793)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes OPSEL[0] selects src_word to read. Co-authored-by: Pravin Jagtap --- Patch is 22.27 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/p

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtins & CodeGen support for v_cvt_scalef32_pk_{bf|f}16_{bf|fp}8 for gfx950 (PR #117793)

llvmbot wrote: @llvm/pr-subscribers-clang Author: Matt Arsenault (arsenm) Changes OPSEL[0] selects src_word to read. Co-authored-by: Pravin Jagtap --- Patch is 22.27 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/11779

[llvm-branch-commits] [clang] 638427b - Revert "[NFC][clang] Add ubsan-trap-merge.c test to show absence of nomerge (…"

Author: Thurston Dang Date: 2024-11-26T14:27:18-08:00 New Revision: 638427b08f7308f388b7f0bdaf426ca1f58e1b18 URL: https://github.com/llvm/llvm-project/commit/638427b08f7308f388b7f0bdaf426ca1f58e1b18 DIFF: https://github.com/llvm/llvm-project/commit/638427b08f7308f388b7f0bdaf426ca1f58e1b18.diff

[llvm-branch-commits] [flang] [flang][OpenMP] Rename some `Type` members in OpenMP clauses (PR #117784)

llvmbot wrote: @llvm/pr-subscribers-flang-openmp Author: Krzysztof Parzyszek (kparzysz) Changes The intent is to keep names in sync with the terminology from the OpenMP spec: ``` OmpBindClause::Type -> Binding OmpDefaultClause::Type-> DataSharingAttribute OmpDeviceTypeClaus

[llvm-branch-commits] [flang] [flang][OpenMP] Rename some `Type` members in OpenMP clauses (PR #117784)

llvmbot wrote: @llvm/pr-subscribers-flang-parser Author: Krzysztof Parzyszek (kparzysz) Changes The intent is to keep names in sync with the terminology from the OpenMP spec: ``` OmpBindClause::Type -> Binding OmpDefaultClause::Type-> DataSharingAttribute OmpDeviceTypeClaus

[llvm-branch-commits] [flang] [flang][OpenMP] Rename some `Type` members in OpenMP clauses (PR #117784)

llvmbot wrote: @llvm/pr-subscribers-flang-semantics Author: Krzysztof Parzyszek (kparzysz) Changes The intent is to keep names in sync with the terminology from the OpenMP spec: ``` OmpBindClause::Type -> Binding OmpDefaultClause::Type-> DataSharingAttribute OmpDeviceTypeCl

[llvm-branch-commits] [flang] [flang][OpenMP] Use new modifiers with AFFINITY/ALIGNED/DEVICE (PR #117786)

llvmbot wrote: @llvm/pr-subscribers-flang-openmp Author: Krzysztof Parzyszek (kparzysz) Changes This is a mostly mechanical change from specific modifiers embedded directly in a clause to the Modifier variant. Additional comments and references to the OpenMP specs were added. --- Patch

[llvm-branch-commits] [flang] [flang][OpenMP] Use new modifiers with AFFINITY/ALIGNED/DEVICE (PR #117786)

llvmbot wrote: @llvm/pr-subscribers-flang-semantics Author: Krzysztof Parzyszek (kparzysz) Changes This is a mostly mechanical change from specific modifiers embedded directly in a clause to the Modifier variant. Additional comments and references to the OpenMP specs were added. --- Pa

[llvm-branch-commits] [flang] [flang][OpenMP] Use new modifiers with AFFINITY/ALIGNED/DEVICE (PR #117786)

llvmbot wrote: @llvm/pr-subscribers-flang-parser Author: Krzysztof Parzyszek (kparzysz) Changes This is a mostly mechanical change from specific modifiers embedded directly in a clause to the Modifier variant. Additional comments and references to the OpenMP specs were added. --- Patch

[llvm-branch-commits] [llvm] [AMDGPU] Add liverange split instructions into BB Prolog (PR #117544)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Christudasan Devadasan (cdevadas) Changes The COPY inserted for liverange split during sgpr-regalloc pipeline currently breaks the BB prolog during the subsequent vgpr-regalloc phase while spilling and/or splitting the vector liver

[llvm-branch-commits] [llvm] [NVPTX] Promote v2i8 to v2i16 (#111189) (PR #115081)

github-actions[bot] wrote: @Artem-B (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. h

[llvm-branch-commits] [llvm] release/19.x: [SDAG][ISel][TableGen][LoongArch] Report error for trivial bitcasts when there are predicate calls (#116075) (PR #116797)

github-actions[bot] wrote: @dtcxzyw (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. h

[llvm-branch-commits] [llvm] release/19.x: [SCEV] Fix sext handling for `getConstantMultiple` (#117093) (PR #117136)

github-actions[bot] wrote: @dtcxzyw (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. h

[llvm-branch-commits] [llvm] release/19.x: [ConstraintElim] Bail out on non-dedicated exits when adding exiting conditions (#116627) (PR #117137)

github-actions[bot] wrote: @antoniofrighetto (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to thi

[llvm-branch-commits] [lld] [llvm] release/19.x: [MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (#114922) (PR #117105)

https://github.com/heiher updated https://github.com/llvm/llvm-project/pull/117105 >From 48578ef7ac2540a124b0aca25f3b56118d48fe08 Mon Sep 17 00:00:00 2001 From: Zhaoxin Yang Date: Mon, 11 Nov 2024 16:46:22 +0800 Subject: [PATCH] [MC][LoongArch] Change default cpu in `MCSubtargetInfo`. (#114922

[llvm-branch-commits] [compiler-rt] release/19.x: [compiler-rt] [test] Remove an unintended grep parameter (PR #116774)

github-actions[bot] wrote: @llvmbot Congratulations on having your first Pull Request (PR) merged into the LLVM Project! Your changes will be combined with recent changes from other authors, then tested by our [build bots](https://lab.llvm.org/buildbot/). If there is a problem with a build,

[llvm-branch-commits] [clang] release/19.x: [clang-repl] Improve flags responsible for generating shared wasm binaries (#116735) (PR #116766)

github-actions[bot] wrote: @anutosh491 (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR.

[llvm-branch-commits] [compiler-rt] release/19.x: [compiler-rt] [test] Remove an unintended grep parameter (PR #116774)

github-actions[bot] wrote: @mstorsjo (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR.

[llvm-branch-commits] [lld] [lld][Hexagon] Fix R_HEX_B22_PCREL range checks (#115925) (PR #116906)

github-actions[bot] wrote: @androm3da (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR.

[llvm-branch-commits] [clang] release/19.x: [clang-repl] Improve flags responsible for generating shared wasm binaries (#116735) (PR #116766)

github-actions[bot] wrote: @llvmbot Congratulations on having your first Pull Request (PR) merged into the LLVM Project! Your changes will be combined with recent changes from other authors, then tested by our [build bots](https://lab.llvm.org/buildbot/). If there is a problem with a build,

[llvm-branch-commits] [llvm] release/19.x: [InstCombine] Handle constant GEP expr in `SimplifyDemandedUseBits` (#116794) (PR #116814)

github-actions[bot] wrote: @llvmbot Congratulations on having your first Pull Request (PR) merged into the LLVM Project! Your changes will be combined with recent changes from other authors, then tested by our [build bots](https://lab.llvm.org/buildbot/). If there is a problem with a build,

[llvm-branch-commits] [llvm] release/19.x: [InstCombine] Handle constant GEP expr in `SimplifyDemandedUseBits` (#116794) (PR #116814)

github-actions[bot] wrote: @dtcxzyw (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. h

[llvm-branch-commits] [llvm] release/19.x: [MachineLICM] Don't allow hoisting invariant loads across mem barrier. (#116987) (PR #117154)

github-actions[bot] wrote: @fhahn (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. htt

[llvm-branch-commits] [clang] [flang] [lld] [llvm] [Flang] LLVM_ENABLE_RUNTIMES=flang-rt (PR #110217)

jeanPerier wrote: > Exceptions are unconditionally disabled in `cmake/modules/AddFlangRT.cmake`: > https://github.com/llvm/llvm-project/pull/110217/files#diff-be23c742c88da2fe1ce8d045ad3e39bed2c26ee02ffadcb4c04db40a4857cb55R70 Ah, this only changes for the CUDA build then (using `-DFLANG_RT_E

[llvm-branch-commits] [compiler-rt] [TySan] Fix struct access with different bases (PR #108385)

https://github.com/gbMattN updated https://github.com/llvm/llvm-project/pull/108385 >From 4f5a7f198988a45fe64b9d1ba88e68a6d7f14e32 Mon Sep 17 00:00:00 2001 From: Matthew Nagy Date: Thu, 12 Sep 2024 12:36:57 + Subject: [PATCH 1/3] [TySan] Fix struct access with different bases --- compiler

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtins & Codegen support for v_cvt_scalef32_pk_f32_{fp8|bf8} for gfx950 (PR #117741)

llvmbot wrote: @llvm/pr-subscribers-llvm-ir @llvm/pr-subscribers-clang Author: Matt Arsenault (arsenm) Changes OPSEL[0] determines low/high 16 bits of src0 to read. Co-authored-by: Pravin Jagtap --- Full diff: https://github.com/llvm/llvm-project/pull/117741.diff

[llvm-branch-commits] [clang] [llvm] Builtins & Codegen support for v_cvt_scalef32_pk_{fp|bf}8_{f|bf}16 for gfx950 (PR #117742)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes OPSEL[3] determines low/high 16 bits of word to write. Co-authored-by: Pravin Jagtap --- Patch is 31.14 KiB, truncated to 20.00 KiB below, full version: https://github.com

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_pk32_f32_[fp|bf]6 for gfx950 (PR #117745)

llvmbot wrote: @llvm/pr-subscribers-clang Author: Matt Arsenault (arsenm) Changes Co-authored-by: Pravin Jagtap --- Full diff: https://github.com/llvm/llvm-project/pull/117745.diff 9 Files Affected: - (modified) clang/include/clang/Basic/BuiltinsAMDGPU.def (+2)

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtin & codegen support for v_cvt_scalef32_pk32_{bf|f}16_{bf|fp}6 for gfx950 (PR #117747)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes Co-authored-by: Pravin Jagtap --- Patch is 25.51 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/117747.diff 7 Files Affected:

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtins & Codegen support for v_cvt_scale_fp4<->f32 for gfx950 (PR #117743)

github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff a6099c680697a821a486d785ea36fa346d316a33 f796dfddf398e9dc2f3cabd741267304f850edb7 --e

[llvm-branch-commits] [llvm] AMDGPU: Handle f32 minimum3/maximum3 pattern for gfx950 (PR #117737)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes --- Patch is 37.30 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/117737.diff 3 Files Affected: - (modified) llvm/lib/Target/AMDGPU/SIISelLowering.c

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtins & Codegen support for v_cvt_scalef32_pk_{fp8|bf8}_f32 for gfx950 (PR #117740)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes OPSEL[3] determines low/high 16 bits of word to write. Co-authored-by: Pravin Jagtap --- Patch is 28.12 KiB, truncated to 20.00 KiB below, full version: https://github.com

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtins & Codegen support for: v_cvt_scalef32_[f16|f32]_[bf8|fp8] (PR #117739)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes OPSEL[1:0] collectively decide which byte to read from src input. Builtin takes additional imm argument which represents index (with valid values:[0:3]) of src byte read. Out of bounds checks will a

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtins & Codegen support for v_cvt_scale_fp4<->f32 for gfx950 (PR #117743)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes OPSEL ASM Syntax for v_cvt_scalef32_pk_f32_fp4 : opsel:[x,y,z] where, x & y i.e. OPSEL[1 : 0] selects which src_byte to read. OPSEL ASM Syntax for v_cvt_scalef32_pk_fp4_f32 : opsel:[a,b,c,d] where,

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtins & CodeGen support for v_cvt_scalef32_pk_{f|bf}16_fp4 for gfx950 (PR #117744)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes OPSEL ASM Syntax for v_cvt_scalef32_pk_{f|bf}16_fp4 : opsel:[x,y,z] where, x & y i.e. OPSEL[1 : 0] selects which src_byte to read. Note: Conventional Inst{13} i.e. OPSEL[2] is ignored in asm syntax.

[llvm-branch-commits] [clang] [flang] [lld] [llvm] [Flang] LLVM_ENABLE_RUNTIMES=flang-rt (PR #110217)

h-vetinari wrote: > Compiling this on linux with GCC/gfortran (after fixing > [this](https://github.com/llvm/llvm-project/pull/110298#discussion_r1849519429)) > currently runs into the following for me @Meinersbur, could you let me know if/once you think this should be fixed, then I'll give i

[llvm-branch-commits] [clang] [llvm] AMDGPU: Remove FeatureCvtFP8VOP1Bug from gfx950 (PR #117827)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes --- Patch is 256.37 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/117827.diff 35 Files Affected: - (modified) clang/include/clang/Basic/BuiltinsAMD

[llvm-branch-commits] [llvm] AMDGPU: Verify f8f6f4 formats in assembler (PR #117826)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes Verify the register widths of the corresponding operands match the floating point format expected size. --- Patch is 22.78 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/

[llvm-branch-commits] [clang] [llvm] AMDGPU: Add builtins & codegen support for bitop3_b{16|32} of gfx950. (PR #117823)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes Co-authored-by: Pravin Jagtap --- Patch is 25.19 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/117823.diff 11 Files Affected:

[llvm-branch-commits] [llvm] AMDGPU: Allocate different registers for vdst & src in v_cvt_scalef32* (PR #117822)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes For multipass instructions, overlap on VDST and SRC’s would result in HW race & undefined results. Co-authored-by: Pravin Jagtap --- Patch is 68.02 KiB, truncated to 20.00

[llvm-branch-commits] [flang] [MLIR][OpenMP] Add Lowering support for OpenMP Declare Mapper directive (PR #117046)

@@ -2701,7 +2701,42 @@ static void genOMP(lower::AbstractConverter &converter, lower::SymMap &symTable, semantics::SemanticsContext &semaCtx, lower::pft::Evaluation &eval, const parser::OpenMPDeclareMapperConstruct &declareMapperConstruct) { - TODO(converter.getC

[llvm-branch-commits] [llvm] release/19.x: Bail out jump threading on indirect branches only (#117778) (PR #117869)

llvmbot wrote: @llvm/pr-subscribers-llvm-transforms Author: None (llvmbot) Changes Backport 3c9022c965b85951f30af140da591f819acef8a0 39601a6e5484de183bf525b7d0624e7890ccd8ab Requested by: @nikic --- Full diff: https://github.com/llvm/llvm-project/pull/117869.diff 2 Files Affected: -

[llvm-branch-commits] [llvm] release/19.x: Bail out jump threading on indirect branches only (#117778) (PR #117869)

https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/117869 Backport 3c9022c965b85951f30af140da591f819acef8a0 39601a6e5484de183bf525b7d0624e7890ccd8ab Requested by: @nikic >From 30e75e7bdac13b4139a687adbf42c289c31f3305 Mon Sep 17 00:00:00 2001 From: AdityaK Date: Tue,

[llvm-branch-commits] [llvm] release/19.x: Bail out jump threading on indirect branches only (#117778) (PR #117869)

llvmbot wrote: @hiraditya @nikic What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/117869 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mail

[llvm-branch-commits] [llvm] release/19.x: Bail out jump threading on indirect branches only (#117778) (PR #117869)

https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/117869 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [OMPIRBuilder] Propagate attributes to outlined target regions (PR #117875)

llvmbot wrote: @llvm/pr-subscribers-flang-openmp Author: Sergio Afonso (skatrak) Changes This patch copies the target-cpu and target-features attributes of functions containing target regions into the corresponding outlined function holding the target region. This mirrors what is curren

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_sr_{bf8|fp8}_{f16|bf16|f32} (PR #117821)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes Co-authored-by: Shilei Tian --- Patch is 49.32 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/117821.diff 8 Files Affected: - (

[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtin & CodeGen support for v_cvt_sr_{bf16|f16}_f32 instructions (PR #117824)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes Co-authored-by: Shilei Tian --- Patch is 23.28 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/117824.diff 10 Files Affected: -

[llvm-branch-commits] [clang] [llvm] AMDGPU/clang: Add global_load_lds size check support for gfx950 (PR #117825)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes Co-authored-by: Shilei Tian --- Patch is 212.23 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/117825.diff 28 Files Affected: -

[llvm-branch-commits] [llvm] AMDGPU: Add support for V_CVT_PK_F16_F32 instruction for gfx950 (PR #118300)

llvmbot wrote: @llvm/pr-subscribers-clang @llvm/pr-subscribers-clang-codegen Author: Matt Arsenault (arsenm) Changes Co-authored-by: Shilei Tian --- Patch is 27.52 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/118300.dif

[llvm-branch-commits] [flang] [flang] optimize array function calls using hlfir.eval_in_mem (PR #118070)

https://github.com/jeanPerier updated https://github.com/llvm/llvm-project/pull/118070 >From 4debf91864773ba805a9439cde9b74fc44315acc Mon Sep 17 00:00:00 2001 From: Jean Perier Date: Thu, 28 Nov 2024 08:28:21 -0800 Subject: [PATCH 1/3] [flang] optimize array function calls using hlfir.eval_in_

[llvm-branch-commits] [flang] [flang] optimize array function calls using hlfir.eval_in_mem (PR #118070)

https://github.com/jeanPerier updated https://github.com/llvm/llvm-project/pull/118070 >From 4debf91864773ba805a9439cde9b74fc44315acc Mon Sep 17 00:00:00 2001 From: Jean Perier Date: Thu, 28 Nov 2024 08:28:21 -0800 Subject: [PATCH 1/2] [flang] optimize array function calls using hlfir.eval_in_

[llvm-branch-commits] [llvm] AMDGPU: Add codegen support for gfx950 v_ashr_pk_i8/u8_i32 (PR #118304)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes Co-authored-by: Sirish Pande --- Full diff: https://github.com/llvm/llvm-project/pull/118304.diff 2 Files Affected: - (modified) llvm/lib/Target/AMDGPU/VOP3Instructions.td

[llvm-branch-commits] [flang] [flang] optimize array function calls using hlfir.eval_in_mem (PR #118070)

@@ -24,6 +24,10 @@ namespace Fortran::lower { +struct LoweredResult { + std::variant result; +}; jeanPerier wrote: Updated. https://github.com/llvm/llvm-project/pull/118070 ___ llvm-branch-commits mailing list ll

[llvm-branch-commits] [clang] [llvm] AMDGPU: Allow f16/bf16 for DS_READ_TR16_B64 gfx950 builtins (PR #118297)

llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes Co-authored-by: Sirish Pande --- Full diff: https://github.com/llvm/llvm-project/pull/118297.diff 6 Files Affected: - (modified) clang/include/clang/Basic/BuiltinsAMDGPU.de

[llvm-branch-commits] [clang] release/19.x: [clang-repl] Fix generation of wasm binaries while running clang-repl in browser (#117978) (PR #118077)

github-actions[bot] wrote: @anutosh491 (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR.

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