[llvm-branch-commits] [MSAN] handle AVX vpermi2var (PR #143463)
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp --
llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
``
View the diff from clang-format here.
``diff
diff --git a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
index 72a340925..e2dfcaae7 100644
--- a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
@@ -4192,7 +4192,7 @@ struct MemorySanitizerVisitor : public
InstVisitor {
void handleAVXVpermil2var(IntrinsicInst &I) {
assert(I.arg_size() == 3);
assert(I.getArgOperand(0)->getType() == I.getArgOperand(2)->getType());
-assert(I.getType() == I.getArgOperand(0)->getType() );
+assert(I.getType() == I.getArgOperand(0)->getType());
assert(I.getArgOperand(1)->getType()->isIntOrIntVectorTy());
IRBuilder<> IRB(&I);
Value *AShadow = getShadow(&I, 0);
``
https://github.com/llvm/llvm-project/pull/143463
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[llvm-branch-commits] [MSAN] handle AVX vpermi2var (PR #143463)
https://github.com/fmayer updated https://github.com/llvm/llvm-project/pull/143463 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [MSAN] handle AVX vpermi2var (PR #143463)
https://github.com/fmayer updated https://github.com/llvm/llvm-project/pull/143463 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [MSAN] handle AVX vpermi2var (PR #143463)
@@ -4175,6 +4175,25 @@ struct MemorySanitizerVisitor : public
InstVisitor {
setShadow(&I, IRB.CreateBitCast(CI, getShadowTy(&I)));
setOriginForNaryOp(I);
}
+ // Instrument AVX permutation intrinsic.
+ // We apply the same permutation (argument index 1) to the shadows.
+ void handleAVXVpermil2var(IntrinsicInst &I) {
+IRBuilder<> IRB(&I);
thurstond wrote:
Please add some assertions that check whether the instruction is suitable for
this handler:
- number of operands
- type and size of each operand
- relation of input and output operands
https://github.com/llvm/llvm-project/pull/143463
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[llvm-branch-commits] [MSAN] handle AVX vpermi2var (PR #143463)
https://github.com/thurstond edited https://github.com/llvm/llvm-project/pull/143463 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [MSAN] handle AVX vpermi2var (PR #143463)
https://github.com/thurstond requested changes to this pull request. Please add assertions and more tests (comments inline). https://github.com/llvm/llvm-project/pull/143463 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [MSAN] handle AVX vpermi2var (PR #143463)
@@ -5130,6 +5149,26 @@ struct MemorySanitizerVisitor : public
InstVisitor {
handleAVXVpermilvar(I);
break;
}
+case Intrinsic::x86_avx512_vpermi2var_d_128:
+case Intrinsic::x86_avx512_vpermi2var_d_256:
+case Intrinsic::x86_avx512_vpermi2var_d_512:
+case Intrinsic::x86_avx512_vpermi2var_hi_128:
+case Intrinsic::x86_avx512_vpermi2var_hi_256:
+case Intrinsic::x86_avx512_vpermi2var_hi_512:
+case Intrinsic::x86_avx512_vpermi2var_pd_128:
+case Intrinsic::x86_avx512_vpermi2var_pd_256:
+case Intrinsic::x86_avx512_vpermi2var_pd_512:
+case Intrinsic::x86_avx512_vpermi2var_ps_128:
+case Intrinsic::x86_avx512_vpermi2var_ps_256:
+case Intrinsic::x86_avx512_vpermi2var_ps_512:
+case Intrinsic::x86_avx512_vpermi2var_q_128:
+case Intrinsic::x86_avx512_vpermi2var_q_256:
+case Intrinsic::x86_avx512_vpermi2var_q_512:
+case Intrinsic::x86_avx512_vpermi2var_qi_128:
+case Intrinsic::x86_avx512_vpermi2var_qi_256:
+case Intrinsic::x86_avx512_vpermi2var_qi_512:
+ handleAVXVpermil2var(I);
thurstond wrote:
Please precommit tests to cover all these instructions.
(AFAICS the tests only cover llvm.x86.avx512.vpermi2var.d.512,
llvm.x86.avx512.vpermi2var.pd.512, llvm.x86.avx512.vpermi2var.ps.512,
llvm.x86.avx512.vpermi2var.q.512.)
https://github.com/llvm/llvm-project/pull/143463
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[llvm-branch-commits] [MSAN] handle AVX vpermi2var (PR #143463)
llvmbot wrote:
@llvm/pr-subscribers-compiler-rt-sanitizer
Author: Florian Mayer (fmayer)
Changes
---
Patch is 71.59 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/143463.diff
3 Files Affected:
- (modified) llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp (+39)
- (modified)
llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
(+148-112)
- (modified) llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
(+147-111)
``diff
diff --git a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
index 4d8dda7098aea..e05ea8b759e0b 100644
--- a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
@@ -4175,6 +4175,25 @@ struct MemorySanitizerVisitor : public
InstVisitor {
setShadow(&I, IRB.CreateBitCast(CI, getShadowTy(&I)));
setOriginForNaryOp(I);
}
+ // Instrument AVX permutation intrinsic.
+ // We apply the same permutation (argument index 1) to the shadows.
+ void handleAVXVpermil2var(IntrinsicInst &I) {
+IRBuilder<> IRB(&I);
+Value *AShadow = getShadow(&I, 0);
+Value *Idx = I.getArgOperand(1);
+Value *BShadow = getShadow(&I, 2);
+insertShadowCheck(Idx, &I);
+
+// Shadows are integer-ish types but some intrinsics require a
+// different (e.g., floating-point) type.
+AShadow = IRB.CreateBitCast(AShadow, I.getArgOperand(0)->getType());
+BShadow = IRB.CreateBitCast(BShadow, I.getArgOperand(2)->getType());
+CallInst *CI = IRB.CreateIntrinsic(I.getType(), I.getIntrinsicID(),
+ {AShadow, Idx, BShadow});
+
+setShadow(&I, IRB.CreateBitCast(CI, getShadowTy(&I)));
+setOriginForNaryOp(I);
+ }
// Instrument BMI / BMI2 intrinsics.
// All of these intrinsics are Z = I(X, Y)
@@ -5130,6 +5149,26 @@ struct MemorySanitizerVisitor : public
InstVisitor {
handleAVXVpermilvar(I);
break;
}
+case Intrinsic::x86_avx512_vpermi2var_d_128:
+case Intrinsic::x86_avx512_vpermi2var_d_256:
+case Intrinsic::x86_avx512_vpermi2var_d_512:
+case Intrinsic::x86_avx512_vpermi2var_hi_128:
+case Intrinsic::x86_avx512_vpermi2var_hi_256:
+case Intrinsic::x86_avx512_vpermi2var_hi_512:
+case Intrinsic::x86_avx512_vpermi2var_pd_128:
+case Intrinsic::x86_avx512_vpermi2var_pd_256:
+case Intrinsic::x86_avx512_vpermi2var_pd_512:
+case Intrinsic::x86_avx512_vpermi2var_ps_128:
+case Intrinsic::x86_avx512_vpermi2var_ps_256:
+case Intrinsic::x86_avx512_vpermi2var_ps_512:
+case Intrinsic::x86_avx512_vpermi2var_q_128:
+case Intrinsic::x86_avx512_vpermi2var_q_256:
+case Intrinsic::x86_avx512_vpermi2var_q_512:
+case Intrinsic::x86_avx512_vpermi2var_qi_128:
+case Intrinsic::x86_avx512_vpermi2var_qi_256:
+case Intrinsic::x86_avx512_vpermi2var_qi_512:
+ handleAVXVpermil2var(I);
+ break;
case Intrinsic::x86_avx512fp16_mask_add_sh_round:
case Intrinsic::x86_avx512fp16_mask_sub_sh_round:
diff --git
a/llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
b/llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
index 5aeaa1221cd21..96f82c4d49a0a 100644
--- a/llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
+++ b/llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
@@ -13700,8 +13700,8 @@ define <16 x
i32>@test_int_x86_avx512_vpermi2var_d_512(<16 x i32> %x0, <16 x i32
; CHECK-LABEL: @test_int_x86_avx512_vpermi2var_d_512(
; CHECK-NEXT:[[TMP1:%.*]] = load i64, ptr inttoptr (i64 add (i64 ptrtoint
(ptr @__msan_param_tls to i64), i64 128) to ptr), align 8
; CHECK-NEXT:[[TMP2:%.*]] = load <16 x i32>, ptr @__msan_param_tls, align 8
-; CHECK-NEXT:[[TMP3:%.*]] = load <16 x i32>, ptr inttoptr (i64 add (i64
ptrtoint (ptr @__msan_param_tls to i64), i64 64) to ptr), align 8
; CHECK-NEXT:[[TMP4:%.*]] = load <16 x i32>, ptr inttoptr (i64 add (i64
ptrtoint (ptr @__msan_param_tls to i64), i64 136) to ptr), align 8
+; CHECK-NEXT:[[TMP14:%.*]] = load <16 x i32>, ptr inttoptr (i64 add (i64
ptrtoint (ptr @__msan_param_tls to i64), i64 64) to ptr), align 8
; CHECK-NEXT:call void @llvm.donothing()
; CHECK-NEXT:[[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
; CHECK-NEXT:br i1 [[_MSCMP]], label [[TMP5:%.*]], label [[TMP6:%.*]],
!prof [[PROF1]]
@@ -13714,9 +13714,15 @@ define <16 x
i32>@test_int_x86_avx512_vpermi2var_d_512(<16 x i32> %x0, <16 x i32
; CHECK-NEXT:[[TMP8:%.*]] = xor i64 [[TMP7]], 87960930222080
; CHECK-NEXT:[[TMP9:%.*]] = inttoptr i64 [[TMP8]] to ptr
; CHECK-NEXT:[[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP9]], align 64
-; CHECK-NEXT:[[_MSPROP:%.*]] = or <16 x i32> [[TMP2]], [[TMP3]]
-; CHECK-NEXT:[[_MSPROP1:%.*]] = or <16 x i32> [[_MSPROP]], [[TMP4]]
-; CHECK-NEXT:[[TMP10:%.*]]
[llvm-branch-commits] [MSAN] handle AVX vpermi2var (PR #143463)
https://github.com/fmayer created https://github.com/llvm/llvm-project/pull/143463 None ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
