https://llvm.org/bugs/show_bug.cgi?id=25280
Matthias Braun <ma...@braunis.de> changed: What |Removed |Added ---------------------------------------------------------------------------- Status|NEW |RESOLVED Resolution|--- |WORKSFORME Assignee|unassignedclangbugs@nondot. |ma...@braunis.de |org | --- Comment #2 from Matthias Braun <ma...@braunis.de> --- On llvm trunk r251064 "opt -O3" requires 30 seconds for optimisation, 22 seconds for two runs of Value Propagation, which isn't great but still good for a file this size. The codegen part (llc -O3) requires around 8 seconds for either the optimized or nonoptimized .ll file (top being "Eliminate PHI nodes for register allocation" with 5 seconds) for the unoptimized file. Having PHI elimination on the top is again strange, but 8 seconds for codegeneration is fine. So it seems this no longer reproduces with llvm ToT. Maybe upgrading to llvm 3.7 will already be enough for you. I'm closing this bugreport, technically the bug is still present in 3.6 but I don't think it is worth fixing it when llvm ToT doesn't reproduce. opt-top: ---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name --- 11.9388 ( 42.4%) 0.7151 ( 35.9%) 12.6539 ( 41.9%) 12.6571 ( 41.9%) Value Propagation 11.4563 ( 40.6%) 0.7037 ( 35.4%) 12.1600 ( 40.3%) 12.1624 ( 40.3%) Value Propagation 1.3507 ( 4.8%) 0.0091 ( 0.5%) 1.3598 ( 4.5%) 1.3600 ( 4.5%) Global Value Numbering 0.5758 ( 2.0%) 0.0107 ( 0.5%) 0.5866 ( 1.9%) 0.5865 ( 1.9%) Function Integration/Inlining 0.1924 ( 0.7%) 0.1918 ( 9.6%) 0.3841 ( 1.3%) 0.3841 ( 1.3%) Lazy Value Information Analysis 0.1918 ( 0.7%) 0.1914 ( 9.6%) 0.3832 ( 1.3%) 0.3833 ( 1.3%) Lazy Value Information Analysis 0.2077 ( 0.7%) 0.0041 ( 0.2%) 0.2119 ( 0.7%) 0.2119 ( 0.7%) Combine redundant instructions 0.1389 ( 0.5%) 0.0030 ( 0.2%) 0.1418 ( 0.5%) 0.1418 ( 0.5%) Combine redundant instructions 0.1340 ( 0.5%) 0.0013 ( 0.1%) 0.1353 ( 0.4%) 0.1353 ( 0.4%) Combine redundant instructions 0.1139 ( 0.4%) 0.0032 ( 0.2%) 0.1171 ( 0.4%) 0.1170 ( 0.4%) Combine redundant instructions 0.1109 ( 0.4%) 0.0026 ( 0.1%) 0.1135 ( 0.4%) 0.1134 ( 0.4%) Combine redundant instructions 0.1025 ( 0.4%) 0.0026 ( 0.1%) 0.1051 ( 0.3%) 0.1050 ( 0.3%) Combine redundant instructions 0.0759 ( 0.3%) 0.0139 ( 0.7%) 0.0898 ( 0.3%) 0.0903 ( 0.3%) Print module to stderr 0.0855 ( 0.3%) 0.0002 ( 0.0%) 0.0857 ( 0.3%) 0.0857 ( 0.3%) Induction Variable Simplification 0.0829 ( 0.3%) 0.0018 ( 0.1%) 0.0847 ( 0.3%) 0.0847 ( 0.3%) Combine redundant instru llc-top: 5.0728 ( 59.5%) 0.0057 ( 2.6%) 5.0784 ( 58.1%) 5.0816 ( 57.9%) Eliminate PHI nodes for register allocation 1.2483 ( 14.7%) 0.1065 ( 48.7%) 1.3548 ( 15.5%) 1.3741 ( 15.7%) X86 DAG->DAG Instruction Selection 0.3867 ( 4.5%) 0.0120 ( 5.5%) 0.3987 ( 4.6%) 0.3988 ( 4.5%) Merge disjoint stack slots 0.2768 ( 3.2%) 0.0116 ( 5.3%) 0.2884 ( 3.3%) 0.2887 ( 3.3%) Greedy Register Allocator 0.2743 ( 3.2%) 0.0022 ( 1.0%) 0.2765 ( 3.2%) 0.2769 ( 3.2%) Simple Register Coalescing 0.1547 ( 1.8%) 0.0009 ( 0.4%) 0.1556 ( 1.8%) 0.1566 ( 1.8%) Machine Instruction Scheduler 0.0932 ( 1.1%) 0.0104 ( 4.7%) 0.1036 ( 1.2%) 0.1036 ( 1.2%) Live Interval Analysis 0.0780 ( 0.9%) 0.0099 ( 4.6%) 0.0880 ( 1.0%) 0.0947 ( 1.1%) X86 Assembly / Object Emitter 0.0873 ( 1.0%) 0.0036 ( 1.7%) 0.0910 ( 1.0%) 0.0909 ( 1.0%) Live Variable Analysis 0.0608 ( 0.7%) 0.0003 ( 0.1%) 0.0611 ( 0.7%) 0.0611 ( 0.7%) Control Flow Optimizer 0.0503 ( 0.6%) 0.0010 ( 0.5%) 0.0513 ( 0.6%) 0.0513 ( 0.6%) Machine Common Subexpression Elimination 0.0454 ( 0.5%) 0.0006 ( 0.3%) 0.0460 ( 0.5%) 0.0477 ( 0.5%) CodeGen Prepare 0.0454 ( 0.5%) 0.0014 ( 0.6%) 0.0468 ( 0.5%) 0.0468 ( 0.5%) Virtual Register Rewriter 0.0386 ( 0.5%) 0.0006 ( 0.3%) 0.0392 ( 0.4%) 0.0391 ( 0.4%) Prologue/Epilogue Insertion & Frame Finalization 0.0357 ( 0.4%) 0.0006 ( 0.3%) 0.0363 ( 0.4%) 0.0363 ( 0.4%) Module Verifier 0.0337 ( 0.4%) 0.0006 ( 0.3%) 0.0343 ( 0.4%) 0.0343 ( 0.4%) Module Verifier -- You are receiving this mail because: You are on the CC list for the bug.
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